Critical Thickness For Plastic Relaxation Research Articles

(Electronics and Photonics Division Award) Epitaxy of Group-IV Semiconductors for Nanoelectronics and Optoelectronics

Epitaxy stands for the deposition of a perfectly ordered layer on a monocrystalline substrate, which is typically, for group-IV semiconductors, bulk Si or Silicon-On-Insulator (SOI). If the layer is chemically different from the substrate and lattice parameters are not the same, epitaxy can be of two types. If the atomic columns of the substrate extend into the layer with the same in-plane lattice parameter, the layer will be pseudomorphic. The built-in strain will be compressive if the layer has a larger lattice parameter than that of the substrate or tensile if it is lower. If the layer thickness exceeds the so-called critical thickness for plastic relaxation, it will relax, with the formation of misfit dislocations to accomodate the lattice parameter mimatch.Epitaxy of group-IV semiconductors is key for numerous Si-based nanoelectronics and optoelectronics devices. Although they crystallize in the same diamond structure, C, Si, Ge and Sn bandgaps (5.47, 1.12, 0.66 and -0.41 eV), lattice parameters (3.57, 5.43, 5.66 and 6.49 Å) and fusion temperatures (> 4000°C, 1414°C, 938°C and 232°C) are very different. This can be an advantage (bandgap and mobility engineering in devices) or a difficulty (when growing stacks). Finally, although Si and Ge are miscible in all proportions, solid solubilities of C in Si and Sn in Ge are exceedingly low (less than 10-4 % and 0.8%, respectively). Low growth temperatures and high growth rates will then be mandatory in order to have high quality alloys.In that presentation, I will show how epitaxy can be put to good use in order to boost the properties of devices. Layers or stacks were grown on 200 mm and 300 mm diameter wafers in industrial Reduced-Pressure – Chemical Vapour Deposition tools with temperatures in the 300°C-900°C range and pressures in the 20-100 Torr range, typically. Precursors were mono-methysilane (for C), silane, dichlorosilane or disilane (for Si), germane or digermane (for Ge) and tin tetrachloride (for Sn). Finally, diborane and phosphine were the P-type and N-type dopant precursors, respectively.The electrical properties of p-type Metal Oxyde Semiconductor – Field Effect Transistors (MOSFETs) can be improved by the insertion of a thin pseudomorphic SiGe layer beneath the gate of transistors. The compressive strain in it will boost by a factor of ~2 the hole mobility in pMOSFETs. The use of SiGe:B in the sources and drains regions on each side of such devices will help in minimizing the contact resistivity and increasing the compressive strain in the channel. Ramping-up, at high temperatures, the Ge concentration in microns thick layers grown on Si and capping them with constant composition layers will result in SiGe virtual substrates which are almost fully relaxed (e.g. with a lattice parameter close to that of bulk SiGe), slightly defective (Threading Dislocations Density (TDD) around 105 cm-2) and with surface cross-hatches. Growing thin tensily-strained Si layers on top and transferring them onto oxydized Si will result in strained SOI substrates, with an increase by a factor of two of the electron mobility in n-type MOSFETs built on top. Using low contact resistance tensily-strained SiP sources and drains will further boost nMOSFET performances.Microns-thick Ge layers grown directly on Si thanks to a low temperature/high temperature approach can be used as templates for III-V epitaxy. The surface root mean square roughness will be less than 1 nm and the TDD around 107 cm-2 with some short duration thermal cycling. Ge can also be grown selectively in trenches at the end of Si waveguides and near infra-red photo-detectors processed. Microns-thick SiGe layers (capped with Si) and pure Ge layers (capped with SiGe) can otherwise be used to fabricate mid and long Infra-Red waveguides. Mid-IR supercontinuum light was generated when sending ultrashort light pulses in such waveguides. Finally, germanium can be transformed into a direct bandgap semiconductor thanks to high amounts of tensile strain or some alloying with more than 8% of tin. Optically pumped lasing at room temperature was recently achieved in bonded or pillared micro-disks made of thick, plastically relaxed GeSn 16-17% layers.Finally, the feasability of selectively etching SiGe versus Si can be used to fabricate stacked nanosheet MOSFETs, with superior ION/IOFF tradeoffs for a given footprint. The core structures of such devices are epitaxial Si/SiGe superlattices, with the alternance of typically ten nm thick Si and SiGe layers. SiGe layers are later on selectively etched. The resulting voids are conformally filled with gate dielectrics and metals. We recently succeeded in stacking seven Si nanosheets, with a record nMOSFET saturation current of 2.8mA/µm for a 1V drain voltage. Figure 1

Controlling the relaxation mechanism of low strain Si1−xGex/Si(001) layers and reducing the threading dislocation density by providing a preexisting dislocation source

Strain relaxed Si1−xGex buffer layers on Si(001) can be used as virtual substrates for the growth of both strained Si and strained SiGe, which are suitable materials for sub-7 nm CMOS devices due to their enhanced carrier mobility. For industrial applications, the threading dislocation density (TDD) has to be as low as possible. However, a reduction of the TDD is limited by the balance between dislocation glide and nucleation as well as dislocation blocking. The relaxation mechanism of low strain Si0.98Ge0.02 layers on commercial substrates is compared to substrates with a predeposited SiGe backside layer, which provides threading dislocations at the edge of the wafer. It is shown that by the exploitation of this reservoir, the critical thickness for plastic relaxation is reduced and the formation of misfit dislocation bundles can be prevented. Instead, upon reaching the critical thickness, these preexisting dislocations simultaneously glide unhindered from the edge of the wafer toward the center. The resulting dislocation network is free of thick dislocation bundles that cause pileups, and the TDD can be reduced by one order of magnitude.

A predictive model for plastic relaxation in (0001)-oriented wurtzite thin films and heterostructures

In this work, we present an experimental and theoretical study of the process of plastic strain relaxation of (0001)-oriented wurtzite heterostructures. By means of transmission electron microscopy and atomic force microscopy, we show that plastic relaxation of tensile strained AlxGa1-xN/GaN heterostructures proceeds predominantly by nucleation of a-type misfit dislocations in the 13⟨112¯0⟩|0001 slip-system driven by a three-dimensional surface morphology, either due to island growth or due to cracking of the layer. Based on our experimental results, we derive a quantitative model for the dislocation nucleation process. With the shear stress gradients at the nucleation sites of a-type misfit dislocations obtained by the finite element method, we calculate the critical thickness for plastic relaxation of strained wurtzite films and heterostructures as dependent on the surface morphology. The crucial role of the growth mode of the film on the strain relaxation process and the resulting consequences is discussed in the paper.

Critical thickness of GaN on AlN: impact of growth temperature and dislocation density

Critical thickness and strain relaxation of c-plane GaN layers grown by molecular beam epitaxy on AlN were studied as a function of growth temperature and threading dislocation density (TDD). For this purpose we used AlN/sapphire templates and AlN single crystals with TDDs of ∼109 cm−2 and ∼103 cm−2, respectively. Whereas at high growth temperature (900 °C) the critical thickness for plastic relaxation is only 3 monolayers (MLs) for both substrates, this value drastically increases when decreasing the growth temperature. It reaches ∼30 MLs when GaN is deposited at 750 °C on AlN single crystals. We also observed that the strain relaxation rate strongly depends on TDD. These results exemplify the lack of efficient gliding planes in III-nitrides when grown along the c-axis, which, combined with low kinetics, allows for plastic relaxation to be frozen out. Achieving pseudomorphic GaN layers on AlN is of interest for two-dimensional electron gases based on AlN/GaN/AlN heterostructures lattice-matched to AlN single crystal substrates.

The Peculiarities of Strain Relaxation in GaN/AlN Superlattices Grown on Vicinal GaN (0001) Substrate: Comparative XRD and AFM Study.

Superlattices (SLs) consisting of symmetric layers of GaN and AlN have been investigated. Detailed X-ray diffraction and reflectivity measurements demonstrate that the relaxation of built-up strain in the films generally increases with an increasing number of repetitions; however, an apparent relaxation for subcritical thickness SLs is explained through the accumulation of Nagai tilt at each interface of the SL. Additional atomic force microscopy measurements reveal surface pit densities which appear to correlate with the amount of residual strain in the films along with the appearance of cracks for SLs which have exceeded the critical thickness for plastic relaxation. These results indicate a total SL thickness beyond which growth may be limited for the formation of high-quality coherent crystal structures; however, they may indicate a growth window for the reduction of threading dislocations by controlled relaxation of the epilayers.

Critical thickness for plastic relaxation of SiGe on Si(001) revisited

We have revisited the critical thickness for plastic relaxation hc of SiGe on Si(001). To that end, we have started from prime 200-mm Si(001) wafers and grown (at 20 Torr with SiH2Cl2 and GeH4) various thickness and Ge content SiGe layers in an Epi Centura reduced-pressure–chemical-vapor-deposition chamber. Growth temperature was reduced from 700 °C to 550 °C, as the Ge content increased from 12% to 52%, to minimize surface roughening. X-ray diffraction (XRD) was performed on all samples to determine hc for the various Ge contents probed. Fully strained layers were characterized by: (i) peaks at a constant incidence angle that became narrower and more intense as the thickness increased, and (ii) the presence of numerous thickness fringes on each side of the layers’ peaks. Meanwhile, broader, less intense peaks (without thickness fringes) closer to the Si substrate peak were associated with plastically relaxed SiGe layers. Plastic strain relaxation was more gradual and less complete in higher Ge content layers grown at lower temperatures. We then performed haze and atomic force microscopy (AFM) measurements to have wafer and local scale quantifications of the surface roughening, which occurs when exceeding hc. For 12%, 22%, and 32% Ge, the haze and the surface roughness drastically increased for thicknesses greater than hc. For 42% Ge, the haze and the surface roughness were low for layers that had barely begun to relax, and became much larger for layers that were more plastically relaxed. Finally, for 52% Ge, there was a continuous but less pronounced increase of the haze and surface roughness when getting close to or exceeding hc. The critical thickness for plastic relaxation inferred from XRD was, for Ge content 22% and above, approximately two times higher than predicted by the People and Bean theory [Appl. Phys. Lett. 49, 229 (1986)]. However, some of the thickest SiGe 32%–52%, layers, considered fully strained in XRD, were observed by AFM to have a few “plow” lines, which are the surface signatures of misfit dislocations.

Dislocation-induced electron and hole levels in InAs quantum-dot Schottky diodes

Self-assembled InAs quantum dots (QDs) have been incorporated into GaAs Schottky diodes. We intentionally introduce defects by growing the QDs above the critical thickness for plastic relaxation. The strain-relaxed QDs introduce electrically active defects in n- as well as p-type diodes. We identify dislocation induced defects and point defects, and can show that in n-type GaAs the EL6 defect plays a major role in the relaxation of QDs. Furthermore, we compare the introduction of defects in strain relaxed QDs grown by looped and non-looped deposition and depending on an in-situ annealing step. We observe that looped deposited QDs exhibit a better quality compared to non-looped QDs even if they are grown beyond the critical thickness for plastic relaxation. An introduction of an annealing step after the growth of the QDs completely removes the defects in both QD system.

Low density InAs/(In)GaAs quantum dots emitting at long wavelengths

We present research carried out on molecular beam epitaxy grown InAs/(In)GaAs quantumdot structures for single-photon operation at long wavelengths. The optical andmorphological properties of the structures are studied as functions of quantum dot growthparameters and of the InGaAs upper confining layer thickness and composition. We showthat low growth rate, high growth temperature and reduced quantum dot coverage arevery effective in reducing the quantum dot density but, owing to In desorptioneffects and quantum dot size reduction, this result is not always concomitant withthe achievement of long wavelength emission. To this aim, we show that the useof InGaAs upper confining layers allows the redshift of quantum dot emissionenergy without affecting their density. Both the thickness and composition ofthe InGaAs layer have to be carefully chosen to provide a complete coverage ofquantum dots and not to exceed the critical thickness for plastic relaxation. Ourresults led to the preparation of quantum dot structures with densities in the low109 cm−2 range,1.33 µm emission at 10 K and full widths at half maximum of 22 meV.

In‐situ X‐ray diffraction during epitaxial growth of ZnSe‐based heterostructures on (001)GaAs

AbstractWe developed a real‐time in‐situ X‐ray (RIX) diffraction technique for the detailed layer characterisation during epitaxial deposition of ZnSe‐based alloys on (001)GaAs substrates. A conventional molecular beam epitaxy chamber was equipped with a Cu X‐ray tube. The 113 reflection of the deposited structure is detected in static geometry by a CCD and is immediately analyzed in terms of strain, composition, thickness and strain relaxation behavior of the deposited layer. The in‐situ monitoring of ZnCdSe layers reveals a delay of heteroepitaxial growth start on GaAs, a gradual layer degradation due to dislocation formation, and a critical thickness for plastic relaxation which depends on the Cd content, consistent with an energy‐balance model. ZnCrSe alloy layers can be deposited with Cr content up to 2% at low substrate temperature TS = 210 °C. The layers appear to be epitaxial alloys with good quality, but a broadening of the Bragg peaks without a significant plastic relaxation is observed. Epitaxial growth and layer properties are studied as function of deposition conditions. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Growth of SiGe/Si superlattices on silicon-on-insulator substrates for multi-bridge channel field effect transistors

We have studied in reduced pressure chemical vapor deposition the growth kinetics of Si and Si0.8Ge0.2 on bulk Si(001) and on silicon-on-insulator (SOI) (100nm buried oxide/20nm Si over-layer) substrates. For this, we have grown miscellaneous Si/Si0.8Ge0.2 superlattices on both types of substrates that we have studied mainly in secondary ions mass spectrometry but also in X-ray diffraction. Systematic Si and SiGe growth rate decreases (together with a Ge concentration increase) occurred on SOI substrates as the stack thickness increased from zero to more than 100nm. Such phenomena are most likely associated to a decrease of the SOI surface temperature by 12–13°C compared to bulk. For Si, the growth rate on SOI increased back again towards the bulk value as the stack thickness neared two hundred nanometers. This is linked to a SOI surface temperature that went 5°C back up. Such a knowledge will be most useful to form in the near future regular superlattices on SOI substrates that will serve as the active regions of multi-bridge channel field effect transistors. Three periods Si/SiGe superlattices with either 20% or 31% of Ge and varying SiGe layer thickness were also grown on bulk Si(001) to study the critical thickness for plastic relaxation of the compressive strain that builds up in such stacks.

TEM measurement of the misfit stress by a curvature method in semiconducting epitaxial system

The misfit stress induced by a lattice mismatch is determined by a curvature analysis performed by Transmission Electron Microscopy on plan view samples. The different samples examined consist of Ga $_{1-x}$ In x As layers grown by molecular beam epitaxy on a (100) GaAs substrate, with a nominal mismatch of 0.7 and 1.4%. The layer thicknesses are lower than the critical thickness for plastic relaxation. The curvature radius as well as the substrate thickness are determined directly by bend contour analysis. For each sample, the measurement was performed on different areas corresponding to different substrate thicknesses. The experimental value of the in-plane component of the stress is deduced by applying the Stoney's formula over the whole range of substrate thickness. The accuracy of the method is better than 15%. Experimental values of the misfit stress are ten to fifty per cent lower than the theoretical value calculated for pseudomorphic layers. This discrepancy is discussed in terms of partial relaxation.

Si1−xGex Island Formation by Post-Growth Anneal on Supercritical Layers Grown by RPCVD

ABSTRACTSiGe island layers have been created by post growth anneal on supercritical layers grown at low temperatures (500°C) and high hydrogen pressures (40 Torr). The epitaxial growth has been performed in a commercially available single wafer RPCVD reactor using SiH2Cl2 and GeH4 as precursor gasses. SiGe layers grown under these conditions exceed the critical thickness for the onset of elastic relaxation reported for lower hydrogen pressures as well as the critical thickness for plastic relaxation by more than one order of magnitude. A subsequent anneal step is used to form the islands. This procedure allows some degree of control in the formation of SiGe islands. High island densities and uniform size distributions were achieved. Photoluminescence as well as electroluminescence measurements of these layers show strong emission from SiGe.

Electroluminescence of strained SiGe/Si selectively grown above the critical thickness for plastic relaxation

Electroluminescence of strained Si0.80Ge0.20/Si(001) pin diodes has been investigated experimentally and by quantitative modeling. The key aspect of this investigation was that by selective epitaxial growth the experimental critical thickness for plastic relaxation (80 nm at Tepi=700 °C and large areas) could be increased in finite pads. SiGe layers with thickness of 60, 72 or 370 nm have been grown within the intrinsic i region of pin structures. Samples free of misfit dislocations revealed electroluminescence with the SiGe no-phonon peak and its transversal optical–phonon replica corresponding to interband transitions. It was found that by increasing the thickness of the SiGe layer the drop in the electroluminescence with increasing temperature could be shifted to higher temperature, so that for the 370 nm thick SiGe sample the emission was observed to persist still at 300 K. Modeling based on drift-diffusion and carrier recombination equations was used to simulate the current–voltage characteristics of the pin diodes and their band gap electroluminescence. It was found that the modeling results can account for the temperature and thickness dependence of the electroluminescence. Hole and electron Shockley–Read–Hall recombination times could be evaluated.