(Electronics and Photonics Division Award) Epitaxy of Group-IV Semiconductors for Nanoelectronics and Optoelectronics

Abstract

Epitaxy stands for the deposition of a perfectly ordered layer on a monocrystalline substrate, which is typically, for group-IV semiconductors, bulk Si or Silicon-On-Insulator (SOI). If the layer is chemically different from the substrate and lattice parameters are not the same, epitaxy can be of two types. If the atomic columns of the substrate extend into the layer with the same in-plane lattice parameter, the layer will be pseudomorphic. The built-in strain will be compressive if the layer has a larger lattice parameter than that of the substrate or tensile if it is lower. If the layer thickness exceeds the so-called critical thickness for plastic relaxation, it will relax, with the formation of misfit dislocations to accomodate the lattice parameter mimatch.Epitaxy of group-IV semiconductors is key for numerous Si-based nanoelectronics and optoelectronics devices. Although they crystallize in the same diamond structure, C, Si, Ge and Sn bandgaps (5.47, 1.12, 0.66 and -0.41 eV), lattice parameters (3.57, 5.43, 5.66 and 6.49 Å) and fusion temperatures (> 4000°C, 1414°C, 938°C and 232°C) are very different. This can be an advantage (bandgap and mobility engineering in devices) or a difficulty (when growing stacks). Finally, although Si and Ge are miscible in all proportions, solid solubilities of C in Si and Sn in Ge are exceedingly low (less than 10-4 % and 0.8%, respectively). Low growth temperatures and high growth rates will then be mandatory in order to have high quality alloys.In that presentation, I will show how epitaxy can be put to good use in order to boost the properties of devices. Layers or stacks were grown on 200 mm and 300 mm diameter wafers in industrial Reduced-Pressure – Chemical Vapour Deposition tools with temperatures in the 300°C-900°C range and pressures in the 20-100 Torr range, typically. Precursors were mono-methysilane (for C), silane, dichlorosilane or disilane (for Si), germane or digermane (for Ge) and tin tetrachloride (for Sn). Finally, diborane and phosphine were the P-type and N-type dopant precursors, respectively.The electrical properties of p-type Metal Oxyde Semiconductor – Field Effect Transistors (MOSFETs) can be improved by the insertion of a thin pseudomorphic SiGe layer beneath the gate of transistors. The compressive strain in it will boost by a factor of ~2 the hole mobility in pMOSFETs. The use of SiGe:B in the sources and drains regions on each side of such devices will help in minimizing the contact resistivity and increasing the compressive strain in the channel. Ramping-up, at high temperatures, the Ge concentration in microns thick layers grown on Si and capping them with constant composition layers will result in SiGe virtual substrates which are almost fully relaxed (e.g. with a lattice parameter close to that of bulk SiGe), slightly defective (Threading Dislocations Density (TDD) around 105 cm-2) and with surface cross-hatches. Growing thin tensily-strained Si layers on top and transferring them onto oxydized Si will result in strained SOI substrates, with an increase by a factor of two of the electron mobility in n-type MOSFETs built on top. Using low contact resistance tensily-strained SiP sources and drains will further boost nMOSFET performances.Microns-thick Ge layers grown directly on Si thanks to a low temperature/high temperature approach can be used as templates for III-V epitaxy. The surface root mean square roughness will be less than 1 nm and the TDD around 107 cm-2 with some short duration thermal cycling. Ge can also be grown selectively in trenches at the end of Si waveguides and near infra-red photo-detectors processed. Microns-thick SiGe layers (capped with Si) and pure Ge layers (capped with SiGe) can otherwise be used to fabricate mid and long Infra-Red waveguides. Mid-IR supercontinuum light was generated when sending ultrashort light pulses in such waveguides. Finally, germanium can be transformed into a direct bandgap semiconductor thanks to high amounts of tensile strain or some alloying with more than 8% of tin. Optically pumped lasing at room temperature was recently achieved in bonded or pillared micro-disks made of thick, plastically relaxed GeSn 16-17% layers.Finally, the feasability of selectively etching SiGe versus Si can be used to fabricate stacked nanosheet MOSFETs, with superior ION/IOFF tradeoffs for a given footprint. The core structures of such devices are epitaxial Si/SiGe superlattices, with the alternance of typically ten nm thick Si and SiGe layers. SiGe layers are later on selectively etched. The resulting voids are conformally filled with gate dielectrics and metals. We recently succeeded in stacking seven Si nanosheets, with a record nMOSFET saturation current of 2.8mA/µm for a 1V drain voltage. Figure 1