Conventional Pulse Width Modulation Research Articles

A Simplified PWM Strategy for Open-Winding Flux Modulated Doubly-Salient Reluctance Motor Drives With Switching Action Minimization

In this article, a simplified pulsewidth modulation (PWM) strategy is proposed for open-winding flux modulated doubly-salient reluctance motor (FMDRM) drives for switching action minimization and common-mode voltage (CMV) reduction. Conventionally, the open-winding converter topology is utilized to achieve the zero-sequence current flow path and dc-biased sinusoidal current excitation for the FMDRM, where the switching actions of power switches are doubled compared to the conventional modular three-phase converter, leading to higher switching losses. Different from the conventional space vector PWM scheme, the reference voltages of converter legs are directly calculated by the reference phase voltages in the proposed PWM scheme. In addition, a rotor-position-based sector division method is proposed to deal with the sector imbalance caused by the distorted back electromotive force (back EMF). Furthermore, different leg voltage clamping methods are respectively developed in odd and even sectors for switching action minimization, which can achieve voltage stress balance and CMV reduction. With the proposed scheme, the switching actions in each switching cycle can be reduced by half, which effectively increases the system efficiency of the FMDRM drive. Experiments are carried out on a three-phase 12/8 FMDRM prototype to verify the effectiveness of the proposed scheme.

An alternate hybrid PWM for uniform thermal sharing in single phase voltage-source inverter

The most prevalent reason for IGBT failure in voltage-source inverter (VSI) is thermal stress, which is influenced by the topology and modulation technique adopted. Hence, it is crucial to understand the impact of common sinusoidal pulse width modulation (PWM) strategies on the thermal behavior of VSI and develop improved PWM techniques. This paper presents an alternate hybrid PWM (AHPWM) switching sequence for a single-phase VSI to decrease its thermal stress and prolong its lifetime. To evaluate the number of cycles to failure of VSI, power loss and thermal analysis were conducted for VSI with AHPWM and compared with conventional PWMs. The thermal cycles experienced by IGBTs with different modulation techniques were experimentally validated using a laboratory prototype of VSI. These findings suggest that by employing AHPWM, the likelihood of VSI failure is reduced by at least one-and-a-half times, resulting in lower VSI maintenance costs.

Modified RPWM Strategy Based on Level-Shifted Random Carrier and Power Balance to Reduce the PWM Voltage Noise in Three-Phase CHB Inverters

Aimed at the pulse width modulation (PWM) voltage noise and power imbalance in three-phase cascaded H-Bridge (CHB) inverters, a modified random PWM (RPWM) strategy, named the power-balanced RPWM (PB-RPWM) strategy, is proposed in this paper. The PB-RPWM strategy mainly includes three steps: (1) random pulse signals are generated by compared modulation wave with level-shifted random carriers; (2) the random pulse signals are circularly distributed between CHB units by a logic operation method, and then the driving pulse signals of switching devices are produced; (3) the driving pulse signals are used to control the inverter. Under the PB-RPWM strategy, the spectra of the line voltage become uniform and continuous, that is, the PWM voltage noise of the line voltage can be effectively reduced. The output voltage of a single H-bridge unit can contain three basic voltages within 3/2 TA, that is, the power balance between CHB units can be realized. When compared with conventional non-random and random PWM strategies, the PB-RPWM strategy has a lower PWM voltage noise and smaller total harmonic distortion (THD). When compared with the level-shifted PWM (LS-PWM) strategy, the PB-RPWM strategy has a balanced power performance. The effectiveness and feasibility of the PB-RPWM strategy is verified by abundant simulations and experiments.

Air-Pinch PWM Valve to Regulate Flow Rate of Hollow-Cone Nozzles for Variable-Rate Sprayers

Highlights Air-pinch PWM valve was investigated as an alternative to electric PWM valves to manipulate hollow-cone nozzles. Air-pinch and electric PWM valves performed comparable accuracy in flow rate modulations. Droplet sizes from hollow-cone nozzles with both PWM valves were comparable across DUCs ranging from 20% to 100%. Air-pinch PWM valve had great potential of use due to its capacity to isolate the internal parts of the valve from chemicals. Abstract. Electric pulse width modulation (PWM) solenoid valves are commonly used to regulate nozzle flow rates to achieve precision variable-rate spray applications. However, some pesticide formulations, such as wettable powders and adhesive additives, can potentially cause a malfunction such that the valve cannot completely shut off during flow rate modulation if spray lines are not cleaned thoroughly after spray applications. An air-pinch PWM valve was evaluated as a potential alternative to conventional PWM valves to modulate the flow rates of hollow-cone nozzles used on air-assisted orchard sprayers. With the air-pinch valve, spray mixtures only passed through a flexible tube to avoid chemicals directly contacting the moving components inside the valve chamber. The flow rate modulation was performed by pinching and releasing the tube back and forth with air-pilot PWM actions. Evaluations included the flow rate modulation capability along with droplet size distributions from three disc-core hollow-cone nozzles coupled with the PWM pinch valve and compared with a conventional electric PWM valve. Both air-pinch and electric PWM valves performed comparably in the flow rate modulation accuracy and droplet size distribution for hollow-cone nozzles operated at 414 and 827 kPa pressures across the duty cycles (DUCs) ranging from 10% to 100%, except for the air-pinch valve that could not activate at 10% DUC. The flow rates of nozzles modulated with both PWM valves at all DUCs were 5.3% greater on average than the target flow rates, while the flow rates were similar at 90% and 100% DUCs. Droplet size classifications based on ASABE Standard S-572.3 were generally consistent across DUCs ranging from 20% to 100% for the same nozzle and pressure with the air-pinch PWM valve and from 10% to 100% with the conventional electric PWM valve. The consistency of droplet sizes across DUCs and accuracy of flow rate modulations demonstrated the potential advantage of using the air-pinch PWM solenoid valve as an alternative for precision variable-rate sprayers to accurately apply different chemicals. Keywords: Droplet size, Flow rate control, Pesticide, Pinch valve, Precision farming, Pulse width modulation.

Neural Network-Based Optimisation of Sinusoidal PWM Controller for VSI-Driven BLDC Motor

Abstract Although increasing the number of switches increases the switch losses, most designed controllers focus on controlling an inverter circuit with more than six switches. The paper aims to address this issue that arises in implementation of the voltage source inverter (VSI) for brushless DC (BLDC) motors. It optimises the sinusoidal pulse width modulation (PWM) controller, minimising total harmonic distortion (THD) while keeping the VSI’s circuit at six switches to avoid increased switching losses. This was achieved by applying an artificial neural network (ANN) to generate a signal, which combines with the already existing reference and carrier signals. The addition of the new signal to the existing signals contributed to generating more pulses compared with the conventional sinusoidal PWM. Simulink was used to design the system and analyse its performance with the conventional and neutral point clamped (NPC) VSI systems. Results indicated that the proposed system performs better when controlled with an LCC filter. Compared with the control experiments, its output waveform has the lowest THD value, which is 6.04%. The switching losses of all the systems were also computed. Results from the computation indicated that the proposed system is capable of reducing the switching losses by 0.6 kW compared with the NPC VSI brushless DC motor (BLDCM) system. BLDCM speed was tested across various conditions; the results are reported in Section 5.

Multi-Level Inverter Fed Induction Motors Based on Simplified and Efficient Modulation Techniques

Speed control of three phase and single phase induction motors represents a very important issue in residential and industrial applications. This paper presents a voltage to frequency speed control of both single phase and three phase induction motors derived by multi-level inverters (MLIs). 15-level and 31-level multi-level inverters are considered. Both MLIs are operated by applying two proposed simplified and efficient modulation techniques in addition to the application of conventional multicarrier sinusoidal pulse width modulation technique MC-SPWM. The proposed modulation techniques overcome several difficulties related to MC-SPWM. The scaler voltage to frequency control method operates very well during starting along with step changes in motor speeds. Simulation results verify the high performance of the proposed modulation techniques when controlling both induction motors based on 15-level and 31-level MLIs.

Symmetrical Nine-Phase Drives with a Single Neutral-Point: Common-Mode Voltage Analysis and Reduction

Power converters generate switching common mode voltage (CMV) through the pulse width modulation (PWM). Several problems occur in the drive systems due to the generated CMV. These problems can be dangerous to the insulation and bearings of the electric machine windings. In recent years, many modulation methods have been developed to reduce the CMV in multiphase machines. Symmetrical nine-phase machines with single-neutral are considered in this paper. In this case, conventional PWM uses eight active vectors of different magnitudes in combination with two zero states in a switching cycle, and this generates maximum CMV. This paper proposes two PWM schemes to reduce the CMV in such a system. The first scheme is called active zero state (AZS). It replaces the zero vectors with suitable opposite active vectors. The second scheme uses ten large active vectors during switching and is called SVM-10L. Compared with conventional strategies, the AZS reduces the peak CMV by 22.2%, and the SVM-10L reduces the peak CMV by 88.8%. Moreover, this paper presents a carrier-based implementation of the proposed schemes to simplify the implementation. The proposed schemes are assessed using simulations and experimental studies for an induction motor load under different case studies.

Investigations on the Modulation Strategies for Performance Improvement of a Controlled Wind Energy System

The challenges faced in an isolated wind energy conversion system (WECS) are larger transient times, high steady-state error, and larger harmonic content. To overcome these issues, an adaptive voltage controller (AVC) along with the load current observer (LCO) could be the better proposition. However, the AVC and LCO, in conjunction with the conventional space vector pulse width modulation (SVPWM) technique to operate the three-phase inverter of WECS, would not be able to further improve these parameters. This paper proposes the use of the unified voltage SVPWM (UVSVPWM) technique along with the AVC and LCO, which could improve the transient behavior by about 30% as well as reduce the harmonic content of the load voltage and current by about 70% and 2%, respectively. This paper considers an isolated WECS connected to the linear load, which is operated under balanced as well as unbalanced load conditions. The proposed control technique is verified for both the balanced and unbalanced cases using MATLAB/Simulink.

Clamping Modulation Scheme for Low-Speed Operation of Three-Level Inverter Fed Induction Motor Drive With Reduced CMV

This article introduces a family of carrier-based pulse width modulation (PWM) schemes for three-level (3 L) inverter fed motor drive for low-speed operation. The proposed PWM in dual-inverter topology (DIT) simultaneously clamps two phases of each inverter throughout the fundamental cycle, which reduces the switching transition in the pole voltage and common-mode voltage (CMV). Four PWM variants in the family (i.e., PWM-1–PWM-4) are discussed and compared with conventional discontinuous PWM schemes. A mapping of the gating pulse is derived to extend the proposed PWM to a classical 3 L inverter fed star-connected motor drive. The gating pulses are generated using triangular carrier comparison with synchronous sampling. The steady-state and dynamic performances of PWM are validated both in DIT fed open-end winding induction motor (IM) drive and neutral point clamped (NPC) inverter fed star-connected IM drive. It is observed that the proposed PWM gives inherent capacitor voltage balance in the NPC topology. PWM-1 has a higher linear modulation range than conventional zero clamp PWM and leads to reduced CMV in the NPC topology. PWM-2 and PWM-3 give reduced CMV in DIT. PWM-4 has fault tolerance to single-phase open-switch and short-switch failure in DIT.

Control and Performance of 240-Clamped Space Vector PWM in Three-Phase Grid-Connected Photovoltaic Converters Under Adverse Grid Conditions

This article evaluates the performance of a relatively new pulsewidth modulation (PWM) method i.e., 240 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> -clamped space vector PWM (240CPWM), in three-phase grid-connected photovoltaic (PV) converters under various grid voltage conditions. 240CPWM is a minimum switching loss PWM method that reduces the switching loss by 85% at unity power factor and has better total harmonic distortion (THD) as compared to conventional space vector PWM. A unique six-pulse dynamically varying dc-link voltage is required for 240CPWM. Typically, a three-phase grid-connected PV system consists of a dc–dc stage followed by a dc–ac stage. In this article, the dc–dc stage is operated in closed-loop control to shape the dynamic dc-link voltage required for 240CPWM. The dc–ac stage is operated in the current control mode using a proportional–integral controller along with a harmonic compensator to ensure sinusoidal grid currents along with maximum power point tracking. The modulation index of the dc–ac stage is uncontrolled and fixed at the maximum value, and the primary control mechanism changes the magnitude, phase, and wave shape of the dc-link voltage. The coordinated control of dc–dc and dc–ac stages is ensured for better dynamic performance and grid support functions. Finally, the performance of the grid-connected PV converter with 240CPWM is validated using a three-phase 3-kW 208-V hardware prototype under nonunity power factors, voltage unbalance, and voltage sag/swell conditions for the first time. The implemented control with 240CPWM achieves smooth operation under nonunity power factor and grid voltage disturbance conditions with THD as low as 3.5% and peak combined efficiency of dc–dc and dc–ac stages as 96.4%.

Asymmetrical PWM Scheme to Widen the Operating Range of the Three-Phase Series-Capacitor Buck Converter

The three-phase series-capacitor (3P-SC) buck converter is analyzed extensively in this study for high-voltage step-down applications with a wide input voltage range. This structure is attractive due to its high step-down conversion ratio and inherent current balancing. However, the inductor currents of the 3P-SC converter become unbalanced when the duty cycle exceeds 1/3. This results in significant stress and reduces the utilization of switching devices. This article proposes an asymmetrical pulsewidth modulation (PWM) scheme for the 3P-SC converter to overcome the limitations of the conventional PWM scheme. By using the proposed switching scheme, the duty cycle can be increased to one while retaining the high conversion ratio and current balancing functionality. Thereafter, the proposed asymmetrical PWM strategy is generalized for multiphase series-capacitor (nP-SC) converters. Finally, to validate the performance of the proposed PWM strategy, a 1.2-kW prototype 3P-SC converter is fabricated and tested.

Investigation of common mode voltages of single stage boost inverter for five phase induction motor drive

In this manuscript, the single stage boost inverter is proposed to eliminate the common-mode voltage (CMV) and electromagnetic interference (EMI) in the motor drives. The proposed topology has the capability of eliminating the effects of intrinsic CMV without any additional filters, active or passive elements, and modified pulse width modulated (PWM) techniques. This topology is proposed with the rearrangement of filter components from ac side to mid place in such a way that the capacitor constantly clamped to the DC bus, and the inductor is placed at the mid-point of half-bridge module and supply to achieve the high gain. This arrangement is also eliminating the effect of switching natured common-mode voltage, which generally occurs in any conventional PWM inverter. Conventional PWM techniques can be implemented to this topology without any modification in the control strategy. The proposed topology is simulated in a MATLAB Simulink to verify the operation and CM reduction capabilities with the results of experimental prototype. In the manuscript, the proposed topology is compared with the traditional inverters and modulation schemes in terms of the CMV effect elimination to explain its effectiveness.

A PWM Method of H-Bridge Converter With Temperature Rise Balancing and Minimization Based on Periodically Alternating Employment of Power Devices

Aiming at the temperature rise and thermal control issues of power devices in H-bridge converters under conventional pulsewidth modulation (PWM) methods, a novel PWM method of H-bridge converter with temperature rise balancing and minimization based on periodically alternating employment of power devices is proposed. In the proposed method, two novel operation mechanisms of power devices are alternately applied into the eight regions with the identical and opposite polarities of reference voltage and input current, which are composed of two fundamental frequency periods. All active switches and antiparallel diodes in H-bridge converters are made to work alternately in these eight regions, each of them is designed to keep in <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state in one region, operate in switching state in another two regions, and inactive in the left other five regions. This way, the power dissipation and temperature rise of all the devices are balanced and minimized, and H-bridge converters no longer suffer from the dead-time effect on current quality and dc-bus voltage utilization. The implementation strategy of the proposed modulation method is discussed in detail. Simulation and experimental results are presented that verify the effectiveness of the proposed method and the corresponding implementation strategy at different operating points.

A Hybrid DPWM for Vienna Rectifiers Based on the Three-Level to Two-Level Conversion

In view of the large neutral-point (NP) voltage fluctuation and the high low-frequency harmonics in the input current of conventional discontinuous pulse width modulation (DPWM) for the Vienna rectifier, a hybrid DPWM (HDPWM) is proposed on the basis of three-level to two-level conversion. The proposed HDPWM combines the modulation degree of freedom, namely the vector synthesis direction and the equivalent zero vector distribution coefficient. Under the two-level modulation unit, the shift angles that satisfy the predefined NP balance requirement for HDPWM are accurately calculated. Compared with the continuous PWM and conventional DPWM, the proposed HDPWM could effectively suppress the zero-crossing distortion, reduce the NP fluctuation and the switching losses. Simulation and experiment results demonstrate that the proposed HDPWM could reduce the NP voltage fluctuation to 1/2 of the conventional DPWM with reduced input current low-frequency harmonics and no zero-crossing distortion.

Type-1 and type-2 fuzzy logic-based space vector modulation for two-level inverter fed induction motor

Two-level inverter control with type-1 and type-2 fuzzy logic-based space vector pulse-width modulation (PWM) method for induction motor drive (IMD) is presented in this paper. A new sampling time independent strategy with type-1 and type-2 fuzzy based methods are used in generating three phase duty ratios which are directly obtained without mathematical equations. The conventional method of space vector modulation (SVM) produces the duty ratios for the inverter which are sampling time dependent. However, in type-1 and type-2 fuzzy based space vector PWM algorithms, the three phases duty ratios generated are sampling time independent and with a new integrated dead-time insertion in SVM itself, can be implemented practically for any switching frequency. As the rule-base for Mamdani non-singleton interval type-1 and type-2 fuzzy inference systems are designed manually, with the expert knowledge of conventional space vector PWM, the duty ratios of the inverter are generated such that the performance of the IMD is improved. The simulation studies for aforementioned cases is performed in matrix laboratory (MATLAB) and experimental validation for the proposed space vector PWM algorithms is validated using real-time sacraetheologiae magister (STM) hardware with STM32F429I Cortex M4 processor for a 1 hp IMD.

An Analytical Discontinuous Space-Vector PWM for Three-Level Inverters With Unbalanced DC-Link Voltages

When faced with unbalanced dc-link voltages of three-level inverters, extra harmonics will be generated with reduced linear modulation region if the conventional pulsewidth modulation (PWM) for balanced dc-link voltages is adopted. In this article, in order to suppress output harmonics and maximize the linear modulation region, as well as to reduce switching losses, the discontinuous space-vector PWM (DSVPWM) is investigated and improved for three-level inverters with unbalanced dc-link voltages. First, subsectors in the vector diagram with unbalanced dc-link voltages are optimally redivided for low switching losses, and concisely determined by a cutting-line method. Then, the modulation waves are analytically derived based on the calculated dwell times of the vector states. And an analytical DSVPWM for dealing with unbalanced dc-link voltages is proposed and implemented by a carrier-based algorithm, which can significantly reduce the computation burden. Finally, the proposed analytical DSVPWM is verified through comparative experiments, presenting its merits of high linear modulation region, high efficiency, and relatively low output harmonics.

A Simple SVM Technique on Three-Phase MPUC7 Inverter for Solar Photovoltaic System

In This paper, a simple single-dimension Space Vector Modulation (SVM) technique is introduced to implement on three-phase thirteen-level Modified Packed U-Cell (MPUC) inverter for photovoltaic system in which many DC sources are available. The three-phase thirteen-level converter consists of three single-phase seven-level MPUCs that each phase has six switches and two isolated DC sources. One major advantage of proposed method is to produce an output voltage with nearly constant amplitude in desired range in case of input DC voltage fluctuations, which is common in renewable sources like Photovoltaic Systems (PV). On the other hand, the conventional Pulse Width Modulation (PWM) strategies do not have such capability. Thus, the converter behavior is investigated for the proposed control method and Level Shift PWM (LS-PWM) and it is shown that the LS-PWM method does not function properly when the DC voltage varies. In order to produce an output voltage with seven equal levels, which results in reduction of the switching losses and Total Harmonic Distortion (THD), it is necessary to trigger switches in proper way. Consequently, two switching patterns are introduced and the significant decrease in power loss due to the second switching pattern is shown. Furthermore, it is investigated that in three-phase mode, the 3rd order line-voltage harmonics are eliminated well and the voltage and current THD are further improved by the proposed method. To validate the proposed SVM technique, MATLAB Simulink simulation results are presented and a comparative analysis is done between the proposed method and LS-PWM.

A hybrid reference pulse width modulation technique for binary source multilevel inverter

The article presents a seven-level reduced switch asymmetrical multilevel inverter with two different methods of pulse width modulation (PWM) techniques. Phase disposition (PD) PWM and hybrid variable-frequency phase disposition PWM (HVFPD-PWM) are the two different PWM methods for making the quality of output voltage waveform. In the first method, the unipolar sine reference with triangular carriers is used. In the second method, the hybrid unipolar reference (sinusoidal with trapezoidal) is proposed with variable frequency carriers to generate the switching pulses for asymmetric multilevel inverter (MLI). The main objective of this proposed method is to reduce the total harmonic distortion in the output voltage waveforms. A comprehensive comparison of the proposed HVFPD-PWM and the conventional PD-PWM with asymmetrical seven-level inverter is presented to show the enriched performances of the proposed method. The performance and viability of the suggested PWM are evaluated through simulation and experimental results using an asymmetrical seven-level inverter. The total harmonic distortion for the proposed PWM method (16.95%) is significantly reduced as compared with the conventional PWM method (18.01%) at the modulation index of one.

Influence of Random Modulated Power Converter on G3 Power Line Communication

Power Line Communication (PLC) technologies are being used in many applications and offer the advantage of utilizing existing power cables for both power and data transmission, thus minimizing cost and complexity. Nevertheless, PLC technology requires further investigation to solve possible co-existence issues. Indeed, recent studies confirmed that alternative modulation schemes such as Random Pulse Width Modulation (RPWM), applied to switching-mode power converters to minimize conducted emissions, detrimentally interfere with the PLC system. This paper presents an experimental test campaign aimed at investigating the effects of RPWM on the G3-PLC system, with the final goal of understanding the conditions under which RPWM schemes can be considered as an effective alternative to conventional Pulse Width Modulation (PWM) in applications involving PLC systems. In details, the effects of different RPWM parameters such as switching frequency, modulation index, and Random Number Update Rate (RNUR) on the G3-PLC is investigated. In addition, different RPWM schemes such as Random Frequency Modulation (RFM) and Random Pulse Position Modulation (RPPM) are compared in terms of performance so as to highlight which RPWM is best suited to assure coexistence with PLC systems. The impact of RPWM on the communication channel is evaluated in terms of Frame Error Rate (FER), Channel Capacity, and Channel Capacity Loss metrics. Experimental results confirmed that randomly modulated converters with switching frequencies near the G3-PLC bandwidth cause more significant disturbance and possible coexistence issues than the switching frequencies out of this range. Results also show that the modulation index and the RNUR of RPWM have a direct effect on the communication channel. Moreover, a trade-off between Electromagnetic Interference (EMI) reduction and coexistence issues is observed: RFM, which is very effective for EMI reduction, is found to be very disruptive for G3-PLC, compared to alternative random modulation techniques such as RPPM.

Multi-Stacked Superbuck Converter-Based Single-Switch Charger Integrating Cell Voltage Equalizer for Series-Connected Energy Storage Cells

Voltages of series-connected energy storage cells, such as electric double-layer capacitors (EDLCs) and lithium-ion batteries, need to be equalized to ensure years of safe operation. However, to this end, a voltage equalizer is necessary in addition to a charger, increasing the system complexity and cost. This paper proposes a family of transformerless single-switch integrated chargers that merge a charger and equalizer into a single unit, achieving a simplified system and circuit. Proposed integrated chargers are derived by stacking multiple conventional pulse width modulation (PWM) converters, such as a superbuck converter, that contain two inductors and one energy transfer capacitor. Detailed operation analyses, including an investigation on the impact of component tolerance on voltage equalization performance, are also performed. Experimental charging tests using a 12-W prototype were performed for four EDLC cells. All cells were charged with eliminating voltage imbalance and demonstrating the charging and equalization performance of the proposed integrated charger.