Conventional Insulated Gate Bipolar Transistor Research Articles

Novel majority carrier accumulation insulated gate bipolar transistor with Schottky junction

Insulated gate bipolar transistor (IGBT) is the core of modern power semiconductor device, and has been widely used due to its excellent electrical characteristics. A novel majority carrier accumulation mode IGBT with Schottky junction contact gate semiconductor layer (AC-SCG IGBT) is proposed and investigated by TCAD simulation in this article. When the AC-SCG IGBT is in the on-state, a forward bias is applied to the gate. Due to the very low forward voltage drop (<i>V</i><sub>F</sub>) of the Schottky barrier diode, the potential of the gate semiconductor layer is almost equal to the gate potential, which can accumulate a large number of majority carrier electrons in the drift region. In addition to the electrons existing, these accumulated electrons increase the conductivity of the drift region, thus significantly reducing <i>V</i><sub>F</sub>. Therefore, the doping concentration of the drift region is not limited by <i>V</i><sub>F</sub>. The lightly doped drift region can make AC-SCG IGBT have a higher breakdown voltage (BV). Moreover, it also reduces the barrier capacitance in the turn-off process, thus the overall Miller capacitance is small, which can quickly turn off and reduce the turn-off time (<i>T</i><sub>off</sub>) and turn-off loss (<i>E</i><sub>off</sub>). The simulation results indicate that at the BV of 600 V, the <i>V</i><sub>F</sub> of 0.84 V for the proposed AC-SCG IGBT is reduced by 46.2% compared with that for the conventional IGBT (<i>V</i><sub>F</sub> of 1.56 V). The <i>E</i><sub>off</sub> of the AC-SCG IGBT (0.77 mJ/cm<sup>2</sup>) is reduced by 52.5% compared with that for the conventional IGBT (1.62 mJ/cm<sup>2</sup>), and the <i>T</i><sub>off</sub> (155.8–222.7 ns) is reduced by 30%. The contradiction between <i>V</i><sub>F</sub> and <i>E</i><sub>off</sub> is eliminated. In addition, the proposed AC-SCG IGBT has a better anti-latch-up capability and is coupled with its higher BV, so it has a larger forward biased safe operating area (FBSOA). The proposed novel structure meets the development requirements for future IGBT device performance, and has great significance for guiding the development of the power semiconductor device field.

Structural parameter analysis on 6.5 kV integrated time and space carrier controllable dual-gate HiGT (i-TASC)

A dual-gate insulated gate bipolar transistor (IGBT), which achieves low loss through dynamic gate control, is a remarkable technology. However, the influence of device structures on switching loss has not been analyzed in detail. In this paper, we clarify the optimal structure in terms of turn-off loss (E off) reduction for a proposed dual-gate high conductivity IGBT (dual gate HiGT, or i-TASC) that can dynamically control the stored carriers with one-chip fabrication. A boundary region (TS) is introduced in the i-TASC and the conductivity modulation before the turn-off can be sufficiently suppressed by securing the width of TS. A prototyped 6.5 kV i-TASC demonstrates 45% lower E off compared with the conventional single-gate IGBTs.

3-D Segmented Gate Concept: A New IGBT Solution for Reduced Loss and Improved Safe-Operating Area

In this article, the “segmented gate (SG)” concept is proposed and implemented in trench gate to realize both low loss and wide safe-operating area (SOA) for insulated-gate bipolar transistors (IGBTs). The poly gate of the proposed IGBT is split into segments along the trench and each segmented poly gate is surrounded by the poly emitter. This unique 3-D trench architecture is demonstrated under numerical studies to be highly effective in enhancing the short-circuit ruggedness, the turn-off capability, and the latch-up immunity. It enables a 37% reduction in saturation current and a 90% reduction in Miller capacitance. The proposed design also shows an improved trade-off relationship between ON-state voltage and turn-off loss. For the same turn-off loss, the ON-state voltage of the proposed IGBT is reduced by 0.25 V when compared with the conventional carrier-stored trench IGBT.

Improvement Breakdown Voltage by a Using Crown-Shaped Gate

In this paper, a crown-shaped trench gate formed by a sidewall spacer in insulated gate bipolar transistors (IGBT) is proposed to improve breakdown voltage. When a sidewall spacer is added to trench bottom corners, the electric field is distributed to the surface of the sidewall spacer and decreased to 48% peak value of the electric field. Thus, the sidewall spacer IGBT improved to 5% breakdown voltage. Another study proposed an additional oxide layer for trench bottom corners and improved breakdown voltage similar to the proposed IGBT. Previous studies have shown degradation in other electrical characteristics. However, this study shows a sidewall spacer IGBT that increases the current over 3% compared to a conventional trench IGBT when the applied gate voltage is under 4 V. Additionally, the turn-off loss characteristic is similar to conventional trench IGBT. Therefore, the breakdown voltage of the IGBT was improved while maintaining similar electrical properties to existing IGBTs through the crown-shaped gate.

Cell Design Consideration in SiC Planar IGBT and Proposal of New SiC IGBT With Improved Performance Trade-Off

In silicon carbide (SiC) planar insulated-gate bipolar transistor (IGBT), a large distance between neighboring p-bodies is beneficial to enhance the on-state conductivity modulation, but will expose the gate oxide to high electric field in off-state. With p-bodies placed closer, the gate oxide field is reduced, but the conductivity modulation is suppressed. In this work, a new SiC planar IGBT with oxide shield is proposed and studied by TCAD simulations. The proposed SiC IGBT achieves improved trade-off between on-state voltage drop (VON) and maximum gate oxide electric field (Eox-m). When a quite larger distance between neighboring p-bodies is adopted in the proposed SiC IGBT, a low VON is obtained, while the Eox-m can be kept at a small value with the oxide shielding structures protecting the gate oxide. Switching characteristics are also studied, and the proposed SiC-IGBT delivers much better trade-off between turn-off energy loss (EOFF) and VON than the conventional SiC planar IGBT.

1.2 kV Stepped Oxide Trench Insulated Gate Bipolar Transistor with Low Loss for Fast Switching Application

In this article, a gate engineering technique is used in Insulated gate bipolar transistor (IGBT) for fast switching applications. The modification consists of stepped oxide pattern at gate terminal with n-poly layer sandwiched between two p-poly layers. The oxide thickness increases from top to bottom so as to create a stepped structure. The oxide thickness is lesser on channel side and higher on collector side. The less thickness beside the channel increases gate to emitter charges (QGE) by extracting extra charges along the channel. The presence of these extra charges also increases the collector current density resulting reduction in the area specific on-resistance (Ron.A). On the other hand, the higher thickness at the bottom side of gate offers reduction in gate to collector charges (QGC). Furthermore, to elongate the impact of QGC reduction, the low doped p-col region has been facilitated which also play an important role to increase the breakdown voltage by reducing corner electric field. This p-col region creates charge extraction path to swept out charges from the drift region while turn-off event and makes the device to turn-off quickly. The collective improvement in QGE and QGC provides fast switching to the proposed device by improving turn-off time by 63% and also reduces turn-off loss (Eoff) by 55% as compared to the conventional device. Furthermore, the change in the workfunction also provides the reduction of channel peak electric field and offers 10% increment in the BV as compared to the conventional IGBT.

Resolution Improvement in a High-Power Magnetic Resonance Imaging Gradient Power Amplifier

High-resolution gradient power amplifiers are required to generate high-fidelity gradient fields in magnetic resonance imaging (MRI) systems. Various aspects of gradient power amplifiers have been the subject of research in the past years, however, systematic analysis and design methods for its resolution improvement have not been sufficiently addressed. This article addresses this research gap with comprehensive analysis and design methods for resolution improvement. First, a method for systematic resolution characterization of the MRI gradient power amplifier with gradient coil is proposed. Second, noise modeling with respect to the critical aspects in the system resolution degradation is developed and discussed. Third, the resolution improvement methods of bandwidth optimization, pseudorandom code modulation, and utilizing silicon carbide (SiC) switching power devices are proposed and analyzed, achieving a resolution at the one part in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${10^6}$</tex-math></inline-formula> level. Finally, the resolution improvement methods are experimentally validated in a 1000 V/400 A SiC gradient power amplifier. The experimental results show a 3.6 times reduction in the peak spurious signals and resolution improvement at all current levels and pulse lengths, compared to a conventional insulated gate bipolar transistor GPA. These results prove the validity of the proposed methods for resolution improvement in a high-power MRI gradient power amplifier, enabling future high-power and high-resolution amplifier designs.

Experimental Investigation on Displacement Damage Effects of Trench Field-Stop Reverse-Conducting Insulated-Gate Bipolar Transistor

The insulated-gate bipolar transistor (IGBT) is characterized by metal-oxide-silicon (MOS)-gating, high current density, and high blocking capabilities. The trench field-stop reverse-conducting IGBT (TFR-IGBT) is distinguished from conventional IGBT (CON-IGBT) by trench MOS gate, field-stop layer, and collector-short structure. As a composite structure made of MOS and bipolar junction transistors (BJTs), TFR-IGBT is susceptible to displacement damage (DD). This work reports the DD effects on TFR-IGBT with the fast neutron fluence up to a fluence of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−2</sup> . The transfer, forward conductive, and forward blocking characteristics are degraded subsequent to neutron exposures. The suppression of the hump current in the transfer curve is observed by neutron-induced damage. This article proposes, from a device physics perspective, the mechanism behind the characteristics degradation from DD in TFR-IGBT. The dependencies of the key parameters on neutron fluence are analytically modeled. Our models provide a good fit to the experimental data of the IGP20N65H5 TFR-IGBT subjected to fission neutrons.

A 4H-SiC trench IGBT with controllable hole-extracting path for low loss

A novel 4H-SiC trench insulated gate bipolar transistor (IGBT) with a controllable hole-extracting (CHE) path is proposed and investigated in this paper. The CHE path is controlled by metal semiconductor gate (MES gate) and metal oxide semiconductor gate (MOS gate) in the p-shield region. The grounded p-shield region can significantly suppress the high electric field around gate oxide in SiC devices, but it weakens the conductivity modulation in the SiC trench IGBT by rapidly sweeping out holes. This effect can be eliminated by introducing the CHE path. The CHE path is pinched off by the high gate bias voltage at on-state to maintain high conductivity modulation and obtain a comparatively low on-state voltage (V ON). During the turn-off transient, the CHE path is formed, which contributes to a decreased turn-off loss (E OFF). Based on numerical simulation, the E OFF of the proposed IGBT is reduced by 89% compared with the conventional IGBT at the same V ON and the V ON of the proposed IGBT is reduced by 50% compared to the grounded p-shield IGBT at the same E OFF. In addition, the average power reduction for the proposed device can be 51.0% to 81.7% and 58.2% to 72.1% with its counterparts at a wide frequency range of 500 Hz to 10 kHz, revealing a great improvement of frequency characteristics.

A Novel Converter-Level IGBT Junction Temperature Estimation Method Based on the Bus Voltage Ringing

Insulated gate bipolar transistor (IGBT) junction temperature monitoring is crucial for converter's healthy management and condition monitoring. However, most conventional IGBT junction temperature estimation methods are device-level, which means that monitoring junction temperatures of all IGBTs in converters require the same number of monitoring units as IGBTs, which is of high complexity and cost. A converter-level IGBT junction temperature estimation method based on the dc bus voltage ringing is proposed in this article. The peak values of the bus voltage ringing during switching transient display a linear dependence on the junction temperatures of the corresponding switching IGBTs. Hence, the bus voltage ringing can be used for estimating the junction temperatures of the IGBTs in a converter. The validity of the proposed method is verified by experiments on a double-pulse and three-phase converter. Besides, implementation schemes and calibration approaches for practical applications are discussed. The proposed method has a higher resolution as compared with a traditional <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state voltage-based IGBT junction temperature monitoring method. Besides, the proposed method reduces the circuit complexity, size, and cost, and it is easy to install. Moreover, the proposed method has a fast response and high resolution, and it does not disturb the normal operation. The proposed method is independent of bond wire degradation of the IGBT module.

Power cycling failure analysis of double side cooled IGBT modules for automotive applications

A three-phase half-bridge insulated gate bipolar transistor (IGBT) module is designed and prototyped as the assembly of heat sink-substrate-post-chip-substrate-heat sink to realize high power density and good thermal performance for electric and hybrid electric vehicle applications. This paper reports the failure modes different from those fatigue of the chip-near interconnections in the conventional IGBT modules and a method to identify the weak points in two IGBT module samples during power cycling tests with timescale of seconds. Details presented include packaging structure and advantages of the designed IGBT module, conditions of the power cycling tests, thermal performance and power cycling lifetimes of the two module samples, small ranges containing the weak points to be determined with the recorded VCE parameters, the exact weak points, failure modes and mechanisms to be identified with optical microscopy and scanning electronic microscopy observation. The results obtained can be used as feedback to optimize the design and further improve the power cycling reliability of the present double side cooled IGBT module. The principle established through this work can also be applied to optimize the thermo-mechanical design and improve the reliability of other double side cooled power modules.

Thermal Performances and Annual Damages Comparison of MMC Using Reverse Conducting IGBT and Conventional IGBT Module

Insulated gate bipolar transistor (IGBT) modules in modular multilevel converters (MMCs) have inherent unbalanced power loss distribution and temperature swing. Some chips may become the hotspots and have much larger temperature swing than others, which seriously compromises the lifetime of the IGBT modules. Therefore, effective improvement measures that are low cost become crucial for the IGBT modules in MMC. Reverse conducting IGBT (RC-IGBT) constructs the IGBT and freewheel diode in a single chip, which has the advantages of lower thermal resistance, lower switching loss, and larger heat capacity. In this article, a new generation of RC-IGBT module and conventional IGBT (Con-IGBT) module from Fuji Electric with the same packaging are both used in the MMC. A newly defined current density for RC-IGBT and Con-IGBT module is proposed. The thermal performances and annual damages of the two modules under different power factors are comprehensively compared at the same module current density. The results show that when the power factor is greater than 0.4, using RC-IGBT can significantly improve the thermal performance of MMC submodules (SMs) and extend their lifetime. In addition, the reasons for the comparison results are also discussed in this article. Finally, the advantages of RC-IGBT in terms of thermal performances are verified by experiment. This article also provides a guideline for the design of MMC SMs.

A new trench gate field stop insulated gate bipolar transistor (IGBT) with a significant reduction in Miller capacitance

In this paper, a new trench-gate field-stop insulated gate bipolar transistor (IGBT) structure having improved performances is proposed, investigated and compared with the properties of the conventional trench-gate field-stop IGBT. An npn structure is introduced to the gate trench in order to reduce the Miller capacitance and gate-collector charge through the introduction of the two diode capacitances in series. The simulation results demonstrate that the proposed structure exhibits a significant improvement in the following two aspects, without degrading the other performances. The first is the reduction of the Miller capacitance by 92.0% and 48.3% at Vce = 0 V and Vce = 20 V, respectively and the second is the reduction in gate-collector charge by 66.7%.

A New SiC Planar-Gate IGBT for Injection Enhancement Effect and Low Oxide Field

A new silicon carbide (SiC) planar-gate insulated-gate bipolar transistor (IGBT) is proposed and comprehensively investigated in this paper. Compared to the traditional SiC planar-gate IGBT, the new IGBT boasts a much stronger injection enhancement effect, which leads to a low on-state voltage (VON) approaching the SiC trench-gate IGBT. The strong injection enhancement effect is obtained by a heavily doped carrier storage layer (CSL), which creates a hole barrier under the p-body to hinder minority carriers from being extracted away through the p-body. A p-shield is located at the bottom of the CSL and coupled to the p-body of the IGBT by an embedded p-MOSFET (metal-oxide-semiconductor field effect transistors). In off-state, the heavily doped CSL is shielded by the p-MOSFET clamped p-shield. Thus, a high breakdown voltage is maintained. At the same time, owing to the planar-gate structure, the proposed IGBT does not suffer the high oxide field that threatens the long-term reliability of the trench-gate IGBT. The turn-off characteristics of the new IGBT are also studied, and the turn-off energy loss (EOFF) is similar to the conventional planar-gate IGBT. Therefore, the new IGBT achieves the benefits of both the conventional planar-gate IGBT and the trench-gate IGBT, i.e., a superior VON-EOFF trade-off and a low oxide field.

A split-gate trench IGBT with low Miller capacitance and dV/dt noise

A novel trench insulated gate bipolar transistor (IGBT) with a split-gate structure is proposed herein, where the polysilicon electrode in the trench is divided into two parts and insulated by the polysilicon oxide, thus decreasing the overlap between the gate electrode and n-drift region. Due to this split-gate structure, much lower Miller capacitance can be achieved. The performance of the proposed split-gate IGBT device, in particular the turn-on dV/dt controllability, is discussed. The simulation results show that the proposed split-gate IGBT can achieve a much better tradeoff between the maximum reverse-recovery dVKA/dt of the free-wheeling diode and the turn-on loss (Eon) of the IGBT compared with the conventional IGBT design. The reverse-recovery dVKA/dt can be decreased by 56% at the same Eon as in the IGBT. Moreover, a feasible manufacturing process for the split-gate structure is proposed.

Alternated Trench-Gate IGBT for Low Loss and Suppressing Negative Gate Capacitance

A new gate structure in the trench-gate insulated-gate bipolar transistor (IGBT) design is proposed and analyzed for power-loss reduction and the suppression of electromagnetic-interference (EMI) noise. Although the turn-off loss and the ON-state voltage drop ${V}_{\text {ce(sat)}}$ are improved by the injection-enhancement (IE) effect, the IE effect caused dynamic avalanche that limits the turn-off loss reduction. In addition, EMI noise is induced by high dI / dt and large surge current due to the negative gate capacitance. This article shows that the dynamic avalanche and the negative gate capacitance can be suppressed by the management of the electric field concentration and hole current flow around the trench gate by the proposed alternated trench-gate (AT) IGBT structure, and both low power loss and good switching controllability can be obtained. The device simulation results show that the AT-IGBT improves the turn-on surge current ${I}_{\text {surge}} - {V}_{\text {ce(sat)}}$ tradeoff compared with the conventional IGBTs.

Study on the IGBT Using a Deep Trench Filled With SiO2 and High-k Dielectric Film

A novel insulated gate bipolar transistor (IGBT) using a deep trench filled with SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and high-k dielectric film (HKF) is presented. The deep trench with the HKF can provide rapid depletion of the drift region during the turn-off transient, eliminating the tail current and reducing the turn-off loss. According to the simulation results, with a relative permittivity of 475 and a 400 nm thickness for the HKF, the proposed device obtains a 62% reduction in the turn-off loss compared to a conventional field stop IGBT at the same on-state voltage and breakdown voltage. Moreover, compared to an IGBT using a trench filled with HK dielectric, the proposed device is more feasible to be fabricated and has a lower gate-to-anode capacitance, which can reduce the current and voltage oscillations during the turn-off transient.

Carrier‐storage‐enhanced superjunction IGBT with n‐Si and p‐3C‐SiC pillars

A carrier-storage-enhanced superjunction (SJ) insulated gate bipolar transistor (IGBT) with n-Si and p-3C-SiC pillars (Si/SiC SJ IGBT) is studied. At the on-state, the n-Si/p-SiC heterojunction acts as a barrier for holes in the n-Si pillar, which helps to enhance the carrier-storage effect in the n-Si pillar and improves the tradeoff between turn-off loss ( E off ) and on-state voltage drop ( V CE(sat) ). It is found by simulations that V CE(sat) of the Si/SiC SJ IGBT can be 0.35 V lower than that of the conventional SJ IGBT with the same breakdown voltage ( V B = 1450 V). Under E off = 5 mJ/cm 2 , V CE(sat) of the Si/SiC SJ IGBT is 1.22 V, which is 0.30 and 0.81 V lower than V CE(sat) of the conventional SJ IGBT and the field stop IGBT, respectively.

Comparative Design of Gate Drivers with Short-Circuit Protection Scheme for SiC MOSFET and Si IGBT

Short-circuit faults are the most critical failure mechanism in power converters. Among the various short-circuit protection schemes, desaturation protection is the most mature and widely used solution. Due to the lack of gate driver integrated circuit (IC) with desaturation protection for the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), the conventional insulated gate bipolar transistor (IGBT) driver IC is normally used as these two devices have similar gate structure and driving mechanism. In this work, a gate driver with desaturation protection is designed for the 1.2-kV/30-A SiC MOSFET and silicon (Si) IGBT with the off-the-shelf driver IC. To further limit voltage-overshoot at the rapid turn-off transient, the active clamping circuit is introduced. Based on the experiments of switching characterization and short-circuit test, the SiC MOSFET shows faster switching speed, more serious electromagnetic interference (EMI) issue, lower switching loss (half), and higher short-circuit current (1.6 times) than the Si IGBT, even with a slower gate driver. Thus, a rapid response speed is required for the desaturation protection circuit of SiC MOSFET. Due to the long delay time of the existing desaturation protection scheme, it is technically difficult to design a sub- μ s protection circuit. In this work, an external current source is proposed to charge the blanking capacitor. A short-circuit time of 0.91 μ s is achieved with a reliable protection. Additionally, the peak current is reduced by 22%.

Modeling and Analysis of a New Pressure Contact Package for High-Current Large-Die IGBTs

Megawatt-class power converters need insulated gate bipolar transistors (IGBTs) with kiloampere current ratings. Conventional IGBT power modules face difficulty to meet the reliability and over-current requirements due to bond wires, solder joint, and single-side cooling limitations. Press-pack IGBTs overcome these drawbacks, but demands extremely tight tolerance control in chip screening and matching, module parts manufacturing, and assembly. In this paper, a new pressure contact package for high-current large-die IGBTs is proposed, modeled, and experimentally studied to allow a simpler packaging process. A large IGBT die, many times the size of a typical IGBT die, is designed with a unique layout of multiple segmented emitter pads and a common gate pad. A patterned polymer positioning frame is placed onto the die. Metal contact spacers are placed in the openings of the frame to connect the emitter lid to the IGBT emitter sectors. A collector contact disc is placed between the IGBT die and the collector lid. Finite-element (FE) analysis is conducted to evaluate the mechanical and thermal performance of the new package. A 3300-V, 14-cm2 active area, round-shape IGBT die is fabricated and packaged. Excellent electrical and thermal characteristics are demonstrated to validate the feasibility of the IGBT and package concept.