Component Boards Research Articles

Automation of the Process for Obtaining the Safety Panel Used on a Road Vehicle

Industrial automation focused on the manufacture of component boards in the construction of the car's electrical panel is necessary to achieve high productivity at the lowest possible cost without compromising on quality, because an error or failure of the fuse panel can cause significant material damage.

Accelerative reliability tests for Sn3.0Ag0.5Cu solder joints under thermal cycling coupling with current stressing

The lead‑tin solder has already been replaced by the lead-free solder gradually in most industrial applications according to the RoHS restriction. However, the reliability test duration and the failure mechanism of lead-free solders are always a concerned problem that must be addressed when designing a new electronic product. In this paper, a thermo-electric accelerated test (TEC) method, as well as its corresponding failure mechanism, was discussed to consider the feasibility of reducing the reliability test duration. Compared with the traditional thermal cycling (TC) test, the lifetime of the component boards decreased apparently in the thermo-electric accelerated test, including both the time-to-failure and the cycles-to-failure based on the Weibull distribution. The main failure mode in TEC test is the cracks propagating along the boundaries of the recrystallized grains at the corner of a solder joint, similar as the TC test. The higher acceleration rate of TEC test might be related to the intermetallic evolution both at the interface and in the solder bulk. Thus, it could be concluded that the thermo-electric test would be a valuable option to achieve highly accelerated reliability test for electronic products.

Failure mechanism of lead-free component boards in thermomechanical test based on recrystallization enhanced cracking

The purpose of this paper is to make a comprehensive understanding of the trends between the lifetime and the thermomechanical test setup parameters, based on the physical failure mechanism of SnAgCu solder interconnections in the component boards. The thermomechanical tests, including thermal cycling and thermal shock, were employed to investigate the failure of the component boards under different loading conditions. The in situ observation during the thermomechanical tests was employed to study the microstructure evolution and the crack propagation of solder interconnections. Electrical failures of the component boards under all setup conditions are mainly caused by the cracks, which propagate along the continuous network of the high-angle grain boundaries produced by the distinguished recrystallization of solder interconnections. The propagation of cracks is highly dependent on the expansion of the recrystallized volume in the solder interconnections. In addition, the expansion of the recrystallization would be influenced by the setup parameters of the thermomechanical test. The paper discusses the relationship among the four factors of the lifetime, the crack growth, the restoration phenomenon and the test setup parameters, in order to explain the complicated trend between the component board lifetime and the setup parameters.

Briefing: Experimental and theoretical bending stiffness of cross-laminated timber panels

Cross-laminated timber (CLT) is an engineered timber product comprising boards of strength-graded timber glued together in laminae to form large plane sections. CLT sections are used to create structural elements including walls, floors and roofs. This briefing paper presents the results of a series of stiffness tests, including both composite sections and their constituent individual component boards. The composite results are compared with the output of three widely used design calculation methods: the shear analogy method, the gamma method and the K-method. This comparison demonstrates the sensitivity of the calculated stiffness to the variation in component stiffness between recorded and graded values. As there is a lack of readily available in-depth test data linking recorded component stiffness to recorded composite stiffness, this paper aims to improve the understanding of the link between these two values. The results have shown that the gamma method was the only design calculation that remained conservative, whether using characteristic properties or true recorded stiffnesses.

The Reliability of Microalloyed Sn-Ag-Cu Solder Interconnections Under Cyclic Thermal and Mechanical Shock Loading

In this study, the performance of three microalloyed Sn-Ag-Cu solder interconnection compositions (Sn-3.1Ag-0.52Cu, Sn-3.0Ag-0.52Cu-0.24Bi, and Sn-1.1Ag-0.52Cu-0.1Ni) was compared under mechanical shock loading (JESD22-B111 standard) and cyclic thermal loading (40 ± 125°C, 42 min cycle) conditions. In the drop tests, the component boards with the low-silver nickel-containing composition (Sn-Ag-Cu-Ni) showed the highest average number of drops-to-failure, while those with the bismuth-containing alloy (Sn-Ag-Cu-Bi) showed the lowest. Results of the thermal cycling tests showed that boards with Sn-Ag-Cu-Bi interconnections performed the best, while those with Sn-Ag-Cu-Ni performed the worst. Sn-Ag-Cu was placed in the middle in both tests. In this paper, we demonstrate that solder strength is an essential reliability factor and that higher strength can be beneficial for thermal cycling reliability but detrimental to drop reliability. We discuss these findings from the perspective of the microstructures and mechanical properties of the three solder interconnection compositions and, based on a comprehensive literature review, investigate how the differences in the solder compositions influence the mechanical properties of the interconnections and discuss how the differences are reflected in the failure mechanisms under both loading conditions.

Thermal Cycling Reliability of Sn-Ag-Cu Solder Interconnections. Part 1: Effects of Test Parameters

The work presented in part 1 of this study focuses on identifying the effects of thermal cycling test parameters on the lifetime of ball grid array (BGA) component boards. Detailed understanding about the effects of the thermal cycling parameters is essential because it provides means to develop more efficient and meaningful methods of reliability assessment for electronic products. The study was carried out with a single package type (BGA with 144 solder balls), printed wiring board (eight-layer build-up FR4 structure), and solder interconnection composition (Sn-3.1Ag-0.5Cu) to ensure that individual test results would be comparable with each other. The effects of (i) temperature difference (ΔT), (ii) lower dwell temperature and lower dwell time, (iii) mean temperature, (iv) dwell time, and (v) ramp rate were evaluated. Based on the characteristic lifetimes, the thermal cycling profiles were categorized into three lifetime groups: (i) highly accelerated conditions, (ii) moderately accelerated conditions, and (iii) mildly/nonaccelerated conditions. Thus, one might be tempted to use the highly accelerated conditions to produce lifetime statistics as quickly as possible. However, to do this one needs to know that the failure mechanisms do not change from one lifetime group to another and that the failure mechanisms correlate with real-use failures. Therefore, in part 2 the observed differences in component board lifetimes will be explained by studying the failure mechanisms that take place in the three lifetime groups.

Thermal Cycling Reliability of Sn-Ag-Cu Solder Interconnections—Part 2: Failure Mechanisms

Part 1 of this study focused on identifying the effects of (i) temperature difference (ΔT), (ii) lower dwell temperature and shorter dwell time, (iii) mean temperature, (iv) dwell time, and (v) ramp rate on the lifetime of ball grid array (with 144 solder balls) component boards. Based on the characteristic lifetime, the studied thermal cycling profiles were categorized into three groups: (i) highly accelerated conditions, (ii) moderately accelerated conditions, and (iii) mildly/nonaccelerated conditions. In this work, the observed differences in component board lifetime are explained by studying the failure mechanisms and microstructural changes that take place in the three groups of loading conditions. It was observed that, under the standardized thermal cycling conditions (highly accelerated conditions), the networks of grain boundaries formed by recrystallization provided favorable paths for cracks to propagate intergranularly. It is noteworthy that the coarsening of intermetallic particles was strong in the recrystallized regions (the cellular structure had disappeared completely in the crack region). However, under real-use conditions (mildly/nonaccelerated conditions), recrystallization was not observed in the solder interconnections and cracks had propagated transgranularly in the bulk solder or between the intermetallic compound (IMC) layer and the bulk solder. The real-use conditions showed slight coarsening of the microstructure close to the crack region, but the solder bulk still included finer IMC particles and β-Sn cells characteristic of the as-solidified microstructures. These findings suggest that standardized thermal cycling tests used to assess the solder interconnection reliability of BGA144 component boards create failure mechanisms that differ from those seen in conditions representing real-use operation.

The reliability of component boards studied with different shock impact repetition frequencies

As a result of the ever-shortening time to market of new electronic products there is a clear need to make the currently employed reliability assessment procedures more efficient. However, while trying to achieve these cost savings it is important to pay attention to how much reliability tests can be accelerated without producing misleading lifetime statistics or irrelevant failure modes and mechanisms. Therefore, the primary objective of this work was to clarify the effects of impact repetition frequency on the lifetime and failure mechanisms of electronic component boards. The reliability assessments were conducted with four package types (BGA288, BGA144, QFN72, and μSMD36) with the intention of including different package dimensions and interconnection shapes and sizes in the scope of evaluation. Three shock impact repetition frequencies (0.01Hz, 0.1Hz, and 1.6Hz) were used to study the sensitivity of their lifetime to the time between the shock impacts. The results showed that the impact repetition frequency has a significant effect on the average lifetime of the studied packages: the average number of impacts-to-failure increased with increased impact repetition frequency. A change in the impact repetition frequency did not, however, change the primary failure mode and the failure mechanism. In order to explain this observation, the formation of residual stresses in the solder interconnections from shock impacts and their relaxation during the time between the shock impacts were evaluated by employing FEM, which showed that at room temperature the stress relaxation by creep of solder is significant even at less than 10s time frame. The effect of the stress relaxation on the lifetime of the component boards was studied experimentally by repeating the impact tests at elevated temperature with the intention of influencing rate of stress relaxation. The results showed that the relaxation of the residual stresses has a significant effect on the component boards shock reliability (at less than 1% risk level). The results presented in this paper indicate that the impact repetition frequency should be taken into account, especially when reliability assessments are being carried out with different testers, since the interval between the shock impacts varies from one test system to another.

Shock impact reliability characterization of a handheld product in accelerated tests and use environment

The effect of mechanical shock impacts is a key factor in the reliability of modern handheld products. Due to differences in product enclosures, impact orientations, strike surfaces and mountings of component boards, the loading conditions induced in a true product drop differ from those encountered in standardized board-level tests. In order to better understand the correlation between board-level drop testing and actual drops of a complete device, series of board and product-level drop tests were conducted using specialized test boards. The mechanical shock impact response of the commercial handheld device component board was characterized with the help of acoustic excitation laser vibrometry and finite element analysis. The results were used to design the mechanically compatible specialized test board for both 4-point supported board-level and unsupported product-level drop tests. Special care was taken to ensure that the vibration behavior of the test board accurately represented the vibration behavior of the commercial component board. Additional board-level drop tests were conducted using a JEDEC JESD22-B111 compliant component board for comparison. The drop test results showed that, even though the test board design and supporting method have a marked influence on the strain conditions and lifetime of solder interconnections, the primary failure mode and mechanism under the product-level drop tests is comparable to that typically encountered in the standard JEDEC JESD22-B111 board-level drop tests. More detailed analyses suggest that the comparability of the shock impact loading conditions affecting solder interconnections can be characterized using three metrics: (1) the maximum component board strain rate, (2) the maximum board strain amplitude and (3) the damping of the component board.

On the effects of temperature on the drop reliability of electronic component boards

The effects of package temperature on failure mechanisms and lifetimes under mechanical shock loading were studied with the help of five different types of high-density packages (a WL-CSP and four CSP-BGAs) assembled on both double-layer and multi-layer FR4 boards. The localized heating of the packages by means of integrated heating elements was utilized in order to produce similar hot spots to those occurring in products in service. The results showed that the temperature can have a significant effect on the lifetimes of component boards under mechanical shock loading but that the effect varied according to the structures of the component boards. The average number of drops to failure of the WL-CSP component boards increased significantly with an increase in the temperature of the package, while the average number of drops to failure of the CSP-BGA component boards generally decreased. On the other hand, the drop reliability of one out of four CSP-BGA component board types was insensitive to temperature. The failure modes and mechanisms were clarified with the help of physical failure analyses that revealed different failure modes in the component boards. Furthermore, depending on the component board type, the primary failure mode may change with temperature from that identified at room temperature. Particular attention was paid to the nucleation and propagation of cracks at different test temperatures. Computational case studies were designed in order to identify the significance of a change in temperature on three factors: (a) the stiffness of the PWB; (b) the strength and elastic modulus of the solder, and (c) the thermomechanical loads. The influences of each factor on the strains and stresses in the proximity of the solder interconnections were evaluated by means of the finite element method. The results of the statistical and physical failure analyses were rationalized with the help of the results from the finite element analyses. They showed that the effects of a change in temperature on the lifetimes of the component boards under mechanical shock loading can be explained by changes in the nucleation site and/or the propagation of cracks. The results presented in this paper point out that single-load reliability tests can form an incomplete understanding of the failure mechanisms in real service environments and modifications to the currently employed reliability test standards that are needed.

Localized recrystallization and cracking of lead-free solder interconnections under thermal cycling

Abstract

The Role of Recrystallization in the Failure of SnAgCu Solder Interconnections Under Thermomechanical Loading

The chip scale packaged/ball grid array component boards were thermally cycled according to the IEC 68-2-14N standard (+125°C/-45°C, 15 min dwells, 5 min ramps). The as-solidified microstructures of Sn-rich solder interconnections were composed of relatively few, typically from two to five, large tin colonies distinguished by high-angle boundaries. However, during the thermal cycling tests the as-solidified microstructures transformed gradually into more or less equiaxed grain structure by recrystallization. It is suggested that cracking of solder interconnections under thermomechanical loadings is enhanced by the recrystallization, because the network of newly formed grain boundaries extending through the interconnections provide favorable paths for cracks to propagate intergranularly. The incubation time of recrystallization was about 50% of the average cycles-to-failure. The decrease of stored energy in high-stacking fault energy metals such as Sn takes place very effective by the recovery. Therefore, microstructures recrystallize only under restricted loading conditions: dynamic loading condition where strain hardening is more effective than recovery. Therefore, the experimentally observable transformation of the microstructures by recrystallization enables us, in principle, to correlate the field use loading conditions with those produced in accelerated reliability tests. Furthermore, the recrystallization provides the means to incorporate the effects of microstructural evolution into the lifetime prediction models.

Thermomechanical reliability characterization of a handheld product in accelerated tests and use environment

Thermomechanical reliability of electronics has commonly been studied by employing accelerated temperature cycling (ATC) tests. However, due to the localized heat dissipation in modern electronic devices, operational power cycling (OPC) is considered a more realistic testing alternative. In order to characterize the thermomechanical reliability of modern high-density electronics, the failure modes, mechanisms and lifetimes of a contemporary commercial handheld device were studied under the ATC and OPC conditions. The experimental measurements and finite element analysis (FEA) showed distinct differences in the thermomechanical response of the device component boards under the OPC and ATC conditions. The results from FEA showed that the interconnection deformations during the OPC test were mostly in the elastic region of the solder, whereas those during the ATC tests reached well into the plastic region. The inclusion of the product enclosure further emphasized this difference, as the enclosure restricted the thermal expansion of the component board during OPC testing. The experimental test results were consistent with the FEA results, as the device failed due to solder interconnection cracking under the ATC conditions within 18 days of testing, but those under the OPC conditions remained operational even after 460 days. Finally, FEA estimations suggest that even three times higher power dissipation levels compared to those found in contemporary handheld devices would result in many years of lifetime in OPC testing.

FEM simulations for reliability assessment of component boards drop tested at various temperatures

Drop reliability of surface mount electronic components is usually studied by drop tests according to the standard (JESD22-B111). The present study assessed the drop reliability of four different component boards. The component boards were tested at elevated temperatures and also simulated via the finite element method. It has been found that temperature had a significant influence on the drop reliability of the component boards. Therefore, numerical experiments were designed to elucidate the temperature effects on the reliability. The simulation results provide convincing explanations for the three failure modes distinguished by the fracture morphologies.

A novel impact test system for more efficient reliability testing

Portable electronic products such as mobile phones experience various loadings in their use environments but accidental drops are encountered most frequently. Over the past few years the drop reliability of electronic assemblies has been studied by means of the travelling table test apparatuses described in the JESD22-B111 drop test standard. There are, however, a few essential shortcomings related to this approach: for example, (1) testing can be time-consuming as a result of the low impact repetition frequency (0.1 Hz) characteristic of the approach; (2) the peak deceleration amplitude varies from one pulse to another; (3) packages placed at different locations on the printed wiring board experience highly dissimilar loading conditions, and (4) the lifetime of a particular location varies significantly from one board to another. In order to overcome these shortcomings an alternative impact test method is presented in this paper. The new method is based on the use of a pneumatic cylinder to produce the desired shock pulses, for example those defined in the JESD22-B110A and JESD22-B111 standards. The measurements showed that the pneumatic test system is capable of producing peak deceleration well above the maximum (2900 G) stated in the JESD22-B110A. More importantly, a testing time an order of magnitude shorter was achieved by increasing the drop impact repetition frequency; an impact repetition frequency of 1.6 Hz was achieved with the pneumatic shock impact tester. Two improved component board attachments based on the support of the full board width were designed in order to simplify the bending motion of component boards. Both the finite element calculations and the experimental results showed that under the full board width support conditions the bending of the component board is more uniform and different component locations experience more equal strains as compared to bending under the conventional 4-point support conditions. The reliability tests that were performed verified that the full board width support produces the same failure modes and that the lifetimes of packages at different locations on the printed wiring board are more comparable with each other with the full board width support than they are with the conventional 4-point support. The benefits of the pneumatic tester that was developed are related to the time needed for testing, the stability of the impact pulse over long periods of time, and the more consistent lifetime statistics achieved by the simplified bending of the component board during testing.

Computational Assessment of the Effects of Temperature on Wafer-Level Component Boards in Drop Tests

The drop reliability of wafer-level chip-scale package (WL-CSP) component boards used in portable devices was studied by employing mechanical shock loads (JESD22-B111 standard) at different temperatures. The drop tests were carried out at room temperature (23 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">deg</sup> C), 75 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">deg</sup> C, 100 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">deg</sup> C, and 125 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">deg</sup> C. The elevated temperatures were achieved by integrated heater elements in the components. The number of drops-to-failure increased significantly with increasing temperature. The physical failure analysis revealed that the outermost solder interconnections at the four corners of the components failed from the component side. At room temperature, the cracks propagated solely along the intermetallic layers but the increase of testing temperature progressively changed their propagation paths from the intermetallic layers into the bulk solder. Since the temperature 1) decreases the strength and elastic modulus of solders, 2) diminishes the stiffness of printed wiring boards, and 3) introduces thermally induced stresses, the finite-element method was employed to evaluate their combined effects. The calculations showed that due to the increases in testing temperature, the peeling stress is reduced markedly, while the equivalent plastic strain is only slightly increased at the interfacial regions of the solder interconnections. The reduction of the stresses increases the proportion of the bulk solder cracking relative to the cracking of the intermetallic layers and therefore the number of drops-to-failure increases as a function of increasing test temperature.

Reliability of CSP Interconnections Under Mechanical Shock Loading Conditions

Failure modes and mechanisms under mechanical shock loading were studied by employing the statistical and fractographic research methods, and the finite element (FE) analysis. The SnAgCu-bumped components were reflow-soldered with the SnAgCu solder paste on Ni(P)|Au-coated and organic solderability preservative-coated multilayer printed wiring boards with and without micro-via structure in the soldering pads. The component boards were designed, fabricated, assembled, and drop tested according to the JESD22-B111 standard for portable electronic products. The test data were analyzed by utilizing the Weibull statistics, and the characteristic lifetimes (eta) and shape parameters (beta) were calculated. Statistically significant differences in the reliability were found between the different coating materials and pad structures. The results on the failed assemblies showed good correlation between the failure modes and the FE calculations. Under high deformation rates the solder material undergoes strong strain-rate hardening, which increases the stresses in the interconnections as compared to those in the thermal cycling tests. Therefore, the failure mechanisms under high deformation rates differed essentially from those observed in thermal cycling tests

Changes in the PCB world with new packaging technologies and the integration of passive components into the PCB

New developments in the semi‐conductor industry lead to higher I/O counts. Packaging is changing to new, smaller packages, like TCPs and CSPs, and the pitch density increases as well. For the fanout of such pages on the PCB, new design rules have to be applied. Blind via holes, sequential build‐up technologies, new ways to form holes, new materials, a lot of questions for the PCB manufacturer. The integration of passive components, such as bypass capacitors and pull up and pull down resistors, into the PCB, go along with the next generation of packaging technology. This adds complexity to the printed circuit boards, leading to a new generation of PCBs that could better be called Integrated Component Boards (ICB). These boards offer a much higher price/area for the PCB manufacturer and at the same time give the OEM better performance with fewer assembly steps and much smaller units.

Development of a Fluxless Soldering Process for Surface Mount Technology

In the surface mount industry, microelectronic devices are reflow soldered to printed circuit boards with the benefit of mildly activated rosin (RMA) based fluxes. The residues from these fluxes, when not properly cleaned from the component boards, have been cited for decreased circuit life due to corrosion of the solder joints and loss of insulating resistance. Post‐solder cleaning operations with CFC (chlorofluorocarbon) solvents have been deemed environmentally harmful. Hence, there is a great need in the surface mount community for a no‐clean or fluxless solder reflow process. The BOC Group has developed a novel, proprietary process, by which circuit boards and their components are attached with a solder paste under a reactive fluxing atmosphere. The post‐solder residue is non‐corrosive and so minimal that it does not require a post‐solder cleaning operation. The solder joints exhibit good wetting, excellent joint strength and are essentially void‐free. Assembled circuits processed in this way meet all the criteria for ionic cleanliness and surface insulation resistance without post‐solder cleaning.

Automatic Inspection of Component Boards Using 3‐D and Greyscale Vision

Recently great interest has developed for a high speed, flexible machine vision system which can accurately determine solder paste and component placement for both process verification and quality control inspection. Present SMT inspection systems must cope with the unpredictable appearance of components and backgrounds and are often used only to determine presence and absence. This paper describes a new approach which combines greyscale data with a three‐dimensional map of the board under test. Originally this method was proposed as a robust technique for locating components in low contrast greyscale images. However, experience working with manufacturers and developers of placement equipment has shown that emerging SMT inspection requirements indicate the importance of three‐dimensional information. In addition to the detection of components and measurement of orientation, examples are shown of solder paste volume measurements, lead co‐planarity, and tombstone effect detection.