Complex Programmable Logic Device Research Articles

A new approach for synchro shaft position measurement using pulse width modulation

In this paper, an angle measurement system for a synchro transmitter is presented. It is based on the concept of pulse width modulation, which enables determination of the shaft angle of a synchro transmitter. A dedicated electronic scott-T gives the resolver format signals from a synchro transmitter. Triangular signal is used along with scott-T sine, cosine signals to generate pulse width modulated signals. The linear evaluation of time duration window (TDW), the quadrant detection and shaft angle in digital form demonstrates the effectiveness of the proposed converter. The measurement system is designed using op-amps, complex programmable logic device (CPLD) and a microcontroller. The microcontroller software design is also introduced. The experimentation on designed board with real synchro’s outputs has been demonstrated to validate the proposed approach.

Single Chip Solution: Implementation of Soft Core Microcontroller Logics in FPGA

This paper proposes a miniaturized model for a particular application by implementing its control circuitry in field programmable gate array (FPGA). This model replaces the conventional circuitry which contains separate unit of microcontroller and complex programmable logic device (CPLD) with a single FPGA chip. Thus it provides a reduced and efficient utilization of resources with increased configurability and flexibility.

The Application and Adaptation of the Two Sources of Code and Natural Encoding Method for Designing a Model of Microprogram Control Unit with Base Structure

The article presents a modification to the method which applies two sources of data. The modification is depicted on the example of a compositional microprogram control unit (CMCU) model with base structure implemented in the complex programmable logic devices (CPLD). First, the conditions needed to apply the method are presented, followed by the results of its implementation in real hardware.

A Grating Generator for 3D Scanner Using CPLD

In the three-dimensional scanners (3D scanners), the grating generator is a key hardware. The commercial video projector is always used to act as the electronic grating generator normally. But there are some defects existed. Such as, the size is too large to setup in the case, it is not easy to be controlled by a single chip microcomputer, etc. To solve these problems, in this paper, a new type of grating generator was designed. A complex programmable logic device (CPLD) chip is used to control a liquid crystal on silicon (LCOS) video chip directly, and it works well.

Fault Test Equipment of Launcher Control System Based on Embedded System

The fault test equipment of mine launcher system is developed. This equipment is divided into two functional parts: master controller, an industrial processing computer and corresponding application software, which mainly engages in human-machine interactions, controlling the testing process, diagnosing the fault as well as display the output, and slave controller that performs data acquisition, signal conditioning, connection and transformation. Its hardware is composed of main control circuit with two complex programmable logic device (CPLD) chips, signal conditioning circuit, serial interface module and dedicated interface adapter unit. In addition, the application software of master controller is modular and object-oriented and developed by LabWIEW. The slave controller software is developed in VHDL that performs sampling and configuration of firing control and configuration signals. And the software consists of the five key modules: baud rate generator, enable module, pulse signal count module, data acquisition module of high level signals and communication module. Thus the equipment actually provides effective technical method in improving the repair and support skills for the mine launcher control system.

A New Improved Data Acquisition System for Electrical Capacitance Tomography

To improve the precision and speed of the system, a new 16-electrode electrical capacitance tomography (ECT) system based on DSP was designed. The measure system adopts 16 electrodes combined and floating capacitance sensor array, and with the phase located loop circuit to eliminate ECT systems additional phase error. The digital signal processor (DSP) is the core of data acquisition system, the computing and control unit includes a DSP (TMS320C5416) and a complex programmable logic device (CPLD). The communication module of the designed system is developed based on HPI parallel transmission technology, which can implement high-speed communication between ECT system and PC. Simulation results show that the sensitivity distribution was more uniform and the reconstructed images for objects were improved obviously by using 16-combined and floating electrodes sensor.

Image Acquisition Method Based on TMS320DM642

A method of the image acquisition based on digital signal processor (DSP) is introduced. DSP, complex programmable logic device (CPLD) and contact image sensor (CIS) are combined in the hardware design, and the time-sequence analysis of the image acquisition process is also presented. Practical application indicates that this method has high accuracy and is rapid enough to satisfy the requirement of real-time acquisition.

A New Technology of Pulse by Pulse for NPC Three-Level Inverters

When Neutral Point Clamped (NPC) three-level photovoltaic grid-connected inverter is overloaded or in short state, the control by software could not judge immediately, but the power switch components of the inverter would be broken. The technology of Pulse by Pulse is an important method to protect the power switch components. This paper studies the principle of traditional technology of Pulse by Pulse, then analyzes a new technology of Pulse by Pulse based on Complex Programmable Logic Device (CPLD), finally a 3KW NPC three-level grid-connected inverter is set up with the new technology of Pulse by Pulse and the feasibility is demonstrated through the experiments.

Design of Condenser Rubber Ball Cleaning Counting System Based on CPLD

The working condition of the condenser in power plant is an important factor that affects the economic operation of the power plant. Rubber ball cleaning is a main method to deal with the condenser fouling. The thesis, dealing with the problem of counting errors of rubber ball in the process of condenser cleaning, based on CPLD(Complex Programmable Logic Device) technology, designs a programme have rubber balls checking and counting automatically. The program takes use of the controlled laser sensors to count the number of rubber balls in every single pipe and the parallel processing capacity of CPLD,and have the number of different pipes counted and shown. Experiments have proved its constancy and accuracy.

Study on Magnetic Induced Polarization Technology and Instruments

In order to solve the difficult-ground areas of electromagnetic prospecting, we study magnetic induced polarization technology and instruments. Adopting the techniques such as GPS synchronization, CPLD(Complex Programmable Logic Device), digital PWM(Pulse-Width Modulation) constant current, VHDL(Very high speed integrated circuit Hardware Description Language) programming, a magnetic induced polarization instruments have been developed, which include transmitter, receiver, and three components magnetic field compensator. Instruments have functions such as high-power constant-current supplying, frequency-selective anti-interference receiving, GPS high-precision synchronizing, and amplitude-frequency response of magnetic sensor is flat. Using gradient configuration to obser the original data include magnetic field strength, magnetic polarization rate, phase, and get the magnetometric resistivity, the percent frequency efficiency by the further processing. For magnetic induced polarization instruments, we develop performance testing and the field experiments.

A complex programmable logic device-based high-precision electrical capacitance tomography system

In this paper, a high-precision measurement system for electrical capacitance tomography (ECT) is presented. A low-cost complex programmable logic device (CPLD) is employed to accomplish logic control, signal generation, data acquisition, digital demodulation and communication with the aid of external components. By adopting a simple digital demodulator recently developed by the authors, the demodulation to ac signals becomes rather simple and resource-saving. A double-T-switches configuration is developed to improve the precision and lower the limit of multi-channel capacitance measurement. A capacitance network is constructed for system calibration. A square ECT sensor with 16 electrodes is constructed to test the practical performance of the measurement system. With a data acquisition rate of 185 frame s−1, the signal-to-noise ratio and standard deviation of capacitance measurement can reach up to 70 dB and 0.09 fF, respectively. Image reconstruction experiment has validated the CPLD-based ECT system.

A Digital Switching Demodulator for Electrical Capacitance Tomography

In this paper, a digital switching demodulator is presented for use in ac-based electrical capacitance tomography systems. Implementing a switching phase-sensitive demodulator (PSD) digitally offers the following advantages: 1) Demodulation can be implemented using a programmable digital device, and hence, CMOS switches, which are used in a conventional switching PSD, are no longer needed; 2) compared with the widely used digital quadrature PSD, this proposed demodulator is simple in configuration because neither a reference signal nor multiplication is required; 3) according to the specific requirements, the new demodulator can be implemented in two operation modes, i.e., the amplitude mode and the phase-sensitive mode; and 4) because only subtractions and accumulations are needed, the proposed demodulator can be easily implemented with low-cost logic devices, e.g., a complex programmable logic device (CPLD). By simulation, the feasibility and effectiveness of the proposed demodulator have been confirmed. CPLD-based and field-programmable-gate-array-based capacitance measurement circuits are constructed, and the performances of different demodulation methods are compared. Both simulation and experiment show that the proposed demodulator can provide demodulation results with high signal-to-noise ratio. The system design can be simplified using the digital switching demodulator.

Capacitive Sensor Estimation Based on Self-Configurable Reference Capacitance

A number of capacitance readout systems presented in the literature and covered by recent patents are briefly described while a biosensor array readout system developed by the authors is presented in this paper. This biosensor array readout system is based on a charge sensitive amplifier that estimates accurately the difference between a selfconfigurable reference capacitance and a biosensor. In the specific implementation, the self-configurable reference capacitance is automatically configured to a value between 0 and 630pF in steps of 10pF. The configuration of the reference capacitance is controlled by a simple finite state machine that can be implemented using a simple CPLD (Complex Programmable Logic Device) such as Altera EPM7064SLC44-10. The proposed system can be used to measure an absolute biosensor capacitance of up to 640pF with a theoretical sensitivity of 2.5fF. The 2.5fF resolution can be achieved using a low cost/high accuracy 12-bit ADC (Analogue/Digital Converter) like a one that has been described by the authors in a recent patent instead of a 17-bit ADC that would be required to measure the biosensor capacitance value with the same accuracy if a constant 320pF reference capacitor had been used. For this reason, the proposed architecture leads to a lower area/power and higher accuracy implementation compared to a read out circuit that would use a fixed reference capacitance. Although the design of the proposed system was inspired by the development of a biosensor array readout system, a similar architecture can be used by any sensor application that should support a broad capacitive input range with high resolution. Keywords: Biosensor readout, configurable reference capacitors, analogue-to-digital conversion, charge sensitive amplifier, switched capacitance interface.

Design and Implementation of Digital Signal Generator Based on LPC2132

A design method of the digital signal generator, based on LPC2132 as the master control chip, is introduced in this paper. The system has used of a chip of the direct digital frequency synthesizer (DDS) and a complex programmable logic device(CPLD) to produce the sine wave, square wave and triangle wave, and has designed circuits of analog signal amplification and gain control. Realized the switch of different signal through the keyboard, it is a new kind of the digital signal source, which has performances including stabilizing waveform, higher precision, adjustable amplitude and frequency on the permitted scope.

Effect of ESD on complex programmable logic device and field programmable gate arrays

Complex electronics devices are becoming more sensitive to electrostatic discharge (ESD). These components are being developed with higher density (extra memory bits per unit volume) and are becoming faster (MHz, GHz, THz, etc.). These upgrades in technology do not come without a technological price. By enhancing the products' performance to meet the users' demands and requirements, one drawback is the reduction in the ESD sensitivity voltage levels. Indirect and direct air/contact discharge test has been conducted on the ALS-SDA-CPLD/FPGA trainer kit linked to the digital to analog converter (DAC) module. The Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD) are found to be very ESD sensitive. The FPGA 3s50 IC was affected during the contact discharge to the input pin. There was damage to the bond pad as well as the metal top layer was damaged. The DAC ICs were affected during the ESD discharge one due to direct ESD effects and the other due to indirect ESD effects. There was dielectric breakdown damage observed in the CPLD 9572 IC.

Research on Multi-Mode Pulse Power Supply for Array Micro Holes Machining in Micro-EDM

According to the processing needs of pulse power supply for the micro hole machining, a multi-mode pulse power supply including RC mode, controlled resistance mode, controlled capacitor mode, and other several power supply modes is developed for the micro- EDM system, whose CPU circuit is based on a microprocessor and two complex programmable logic devices (CPLD). In micro- EDM, the micro-energy pulse power not only realizes nanosecond grade electrical pulse signal, but also can achieve a wide range of optional in energy with the cont rol of power transistors and electrical relays which can choose the electrical processing mode, open circuit voltage, resistance, capacitance, pulse-on time, pulse-off time and so on. Finally, 2×128 array holes with deviation of 2μm in diameter can be stably realized with the multi-mode pulse power supply.

Research on Precision Pulse Power Technology of WEDM

High speed wire electrical discharge machining (WEDM-HS) has been an extremely important and irreplaceable means of processing precision parts in aerospace, mold and other fields owing to its unique advantages. The pulse power is the key component of the WEDM, which directly restricts the improvement of WEDM overall performance. At present, the pulse power used in commercial WEDM-HS equipment, whose processing surface roughness and machining accuracy are low, is generally applied to rough machining. This paper develops a multi-mode precision pulse power based on micro controller unit (MCU) and double complex programmable logic devices (CPLD), of which electric parameters can be widely adjusted. Effects of capacitance on achievable processing thickness and surface roughness are analyzed under controllable resistance and capacitance precision pulse power mode. By properly selecting capacitance to make triple of charging time equal to pulse duration, the best surface roughness and minimum single pulse energy are obtained when pulse duration, pulse interval and current-limiting resistance remain constant. The paper also analyzes and optimizes the parameters affecting surface roughness and processing speed through orthogonal experiment. Then five-cutting experiments are conducted using the optimized machining parameters, obtaining that the best surface roughness reaches 0.96m when workpiece thickness is 40mm.

科学级CCD远程图像采集系统

The design method of a fiber transmission remote image acquisition system based on a high resolution EXview CCD is presented and the main units in the system are introduced in detail.The system utilizes a special IC to achieve time driving and takes double Complex Programmable Logic Devices(CPLDs) to complete the logic control.In order to improve dynamic ranges,it uses a 16 bit high resolution Digital to Analog Converter(ADC) to digitalize video signals.Furthermore,the system can transfer mass video data in long-distances based on the TLK1501,and can perform data terminal collection with a computer by a USB.Finally,two important parameters: dynamic range and the system gain are estimated in an experiment.The system offers its specifications are a resolution of 1.4 million pixels,digitizer type of 16 bits,and remote transmission less than 30 km.Moreover,its dynamic range is 60-65 dB,system gain is 2.34 ADU/e-.Experiments show that designed system is fit for the science research which demands for the best quality mentioned above.

Data Compression Algorithm for Efficient Data Transmission in Digital Optical Repeaters

Today, the demand for high-speed data communication and mobile communication has exploded. Thus, there is a growing need for optical communication systems that convert large volumes of data to optical signals and that accommodate and transmit the signals across long distances. Digital optical communication with these characteristics consists of a master unit (MU) and a slave unit (SU). However, the digital optical units that are currently commercialized or being developed transmit data without compression. Thus, digital optical communication using these units is restricted by the quantity of optical frames when adding diversity or operating with various combinations of CDMA, WCDMA, WiBro, GSM, LTE, and other mobile communication technologies. This paper suggests the application of a data compression algorithm to a digital signal processor (DSP) chip as a field programmable gate array (FPGA) and a complex programmable logic device (CPLD) of a digital optical unit to add separate optical waves or to transmit complex data without specific changes in design of the optical frame.

Simulation and Application of PLD in Electric Power System Circuit

Programmable Logic Device(PLD) has been widely used in hardware circuit, and it has evolved into two types: Complex Programmable Logic Device(CPLD) and Field Programmable Gate Array(FPGA). This paper takes small current grounding in electric power system as background, uses xc95144, a representative CPLD of Xilinx Company in the signal collecting circuit to collect voltage and current signals, and do some other operations to spare circuit board area. This paper also tries to translate the schematic into VHDL-described text and do simulation to the text.