Complex Programmable Logic Device Research Articles

Sequential Switching Hybrid Single-carrier Sinusoidal Modulation for Cascaded Multi-level Inverter

This article presents a generalized hybrid single-carrier sinusoidal modulation control for cascaded multi-level inverters. This scheme combines the features of fundamental frequency modulation and single-carrier sinusoidal modulation strategies. The main characteristic of this modulation is the reduction of switching losses with better harmonic performance. A sequential switching scheme is embedded in this hybrid modulation to overcome differential heating among the power devices. Single-carrier sinusoidal modulation and its base modulation design are implemented on a TMS320F2407 digital signal processor. A complex programmable logic device realizes a hybrid pulse width modulation algorithm, and it is integrated with a digital signal processor for hybrid single-carrier sinusoidal modulation generation. The feasibility of this hybrid modulation is verified by spectral analysis, power loss analysis, simulation and experimental results.

Configuration scheme for small scale Multi-FPGA systems

Multi-FPGA systems have tremendous potential, providing a high-performance computing substrate for many different applications. These systems harness multiple FPGAs, connected in a fixed pattern, to implement complex logic structures. In order to use such a system effectively, it is a key for constructing a good performance hardware platform. The configuration scheme is an important part in hardware design. This paper aims at small scale Multi-FPGA systems composed of SRAM-based FPGAs developed by Xilinx Corporation, proposes a novel configuration technique by using Platform Flash PROM XCF32P. Using this scheme, only adopting one XCF32P and one Complex Programmable Logic Device (CPLD) we can configure four FPGAs with monolithic configuration data smaller than 8Mbit. When the number of FPGA is more than four, Design revisioning allows the user to cascade more XCF32P PROMs to realize. Since Xilinx Platform PROM and Xilinx FPGA/CPLD are used to get a single-vender solution, the design for hardware and software is simplified.

Efficient sequential switching hybrid modulation techniques for multiphase multilevel inverters

This study presents certain sequential switching hybrid modulation strategies, and compared for multiphase multilevel inverters. Hybrid modulation represents the combination of fundamental frequency, and multilevel sinusoidal modulations and designed for performance of the well-known alternative phase opposition disposition, phase shifted carrier, carrier-based space vector modulation and single-carrier sinusoidal modulations. The main characteristic of these modulations are the reduction of switching losses with good harmonic performance. A simple sequential switching and base pulse-width modulation (PWM) circulation techniques are embedded with these modulations, to achieve balanced power dissipation among the devices within a cell and for series connected cells, equal load sharing and balanced DC-link capacitor voltages. Multilevel sinusoidal PWM and its base modulation design are implemented on a TMS320F2407 digital signal processor (DSP). Complex programmable logic device realises hybrid control algorithm with base PWM circulation and integrated with DSP for sequential switching hybrid PWM generation. The feasibility of these modulations are theoretically analysed for five-level and then generalised for N-level, validated by simulation and confirmed practically for a five-level inverter.

A hand vein recognition system based on DSP and CPLD

The hand vein recognition system based on digital signal processing (DSP) and complex programmable logic device (CPLD) is designed according to the requirements for equipment volume, accuracy and reaction speed. The overall structure and detailed implementation of the system hardware architecture are discussed in this paper. Moreover, the design philosophy and specific realization of system software as well as core algorithms are explored. The recognition system owns many good characteristics, such as high-degree integration, simple structure, flexible programming, convenient application and so on, which make it suitable for circumstances with high requirements for personal identification.

Analysis and Implementation of Multiphase Multilevel Hybrid Single Carrier Sinusoidal Modulation

This paper proposes a hybrid single carrier sinusoidal modulation suitable for multiphase multilevel inverters. Multiphase multilevel inverters are controlled by hybrid modulation to provide multiphase variable voltage and a variable frequency supply. The proposed modulation combines the benefits of fundamental frequency modulation and single carrier sinusoidal modulation (SC-SPWM) strategies. The main characteristics of hybrid modulation are a reduction in switching losses and improved harmonic performance. The proposed algorithm can be applied to cascaded multilevel inverter topologies. It has low computational complexity and it is suitable for hardware implementations. SC-SPWM and its base modulation design are implemented on a TMS320F2407 digital signal processor (DSP). A Complex Programmable Logic Device realizes the hybrid PWM algorithm and it is integrated with a DSP processor for hybrid SC-SPWM generation. The feasibility of this hybrid modulation is verified by spectral analysis, power loss analysis, simulation and experimental results.

Compact CPLD Board Designing and Implemented for Digital Clock

ABSTRACT The work describes the design and implementation of Complex Programmable Logic Devices (CPLDs) board for many digital applications in the educational and research field laboratory in the university. The objective of designed board is to implement the digital logic, which can be used for any digital application and take advantages of CPLDs features like reconfigurable architecture, high speed operation, pin locking, in-system programming (ISP) for digital system design. This CPLD board size is relatively compact; so it can be easily mounted. On board power supply and variable frequency oscillator improves functionality of overall board. The design includes some cost effective embedded control and communication interface to build digital application to work more efficiently in the market. Keywords Reconfigurable architecture, CPLD, Digital Design, Digital Clock, PLDs. 1. NTRODUCTION The process of designing digital hardware has changed dramatically over the past few years. Unlike previous generations of technology, in which board-level prototype designs included large numbers of SSI chips containing basic gates, virtually every prototype digital design produced today consists mostly of programmable logic devices [7]. This applies not only to digital logic circuits, but also for robotics applications like sensing, actuation, manipulation. Programmable logic offers the digital circuit designer the possibility of changing design function even after it has been built. A programmable logic device (PLD) can be programmed, erased, and reprogrammed many times, allowing easier prototyping and design modification. PLDs can be programmed from personal computer (PC) or workstation running special software. This software is often associated with a set of programs that allow us to design circuits for various PLDs [2]. For successful implementation of digital design and, it is essential to have suitable CPLD board for teaching and learning CPLD programming as well as for real time application development. It should be affordable, user friendly and flexible. The following sections describe the design of the CPLD board, application of the board, the benefits of the board, and finally concluding remarks. The implementation of the CPLD board used here is digital clock. The complete module consists of many sub modules of onboard and in CPLD chip like power supply, variable frequency crystal oscillator and I/Os are onboard and counter, multiplex, decoder, and comparator are designed inside the CPLD chip. The time displayed is in the form of binary coded decimal and seven segments.

Online lightning and internal overvoltages monitoring system in 10 kV distribution networks

The design and realization of an online overvoltage monitoring system for distribution network are introduced. The system can capture both lightning and internal overvoltage waveforms automatically. A variable sampling technique is employed to solve the conflict between high-speed data acquisition and the data storage with large capacity by using complex programmable logic device (CPLD). The performances of low damping resistor–capacitor divider, signal conditioning circuit, data acquisition card, acquisition control, and waveform analysis software are analyzed in detail. The long-term operation shows that the system is effective in providing scientific support for fault analysis of power system. Copyright © 2010 John Wiley & Sons, Ltd.

Efficient Hybrid Carrier Based Space Vector Modulation for a Cascaded Multilevel Inverter

This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

An Adaptive Flux Observer With Online Estimation of DC-Link Voltage and Rotor Resistance For VSI-Based Induction Motors

An adaptive observer is proposed for concurrent estimation of rotor fluxes, unknown dc-link voltage, and rotor resistance of induction motor with voltage source inverters. For the reported flux observers and parameter estimators, the implied assumption had been that the input voltages were measured by sensors, or presumed to be known, for example while plug-in converters were utilized. However, this assumption may not be valid due to bus voltage variations, such as for battery powered servo drives, or propulsion system in hybrid electric vehicles. A drift in input voltage measurement results in state and parameter estimation errors. The proposed observer is capable of concurrent flux and dc-link voltage observation with online tuning of rotor resistance, while the phase currents and rotor speed are measured. No terminal voltage measurement is needed for this adaptive observer. The stability of the proposed observer is proved based on a Lyapunov function. Besides, it is shown that injection of a diagnosis signal is necessary to force the estimated parameters converge to the right values regardless of their initial conditions. A complex programmable logic device is implemented for the experimental setup, which controls an intelligent power module including insulated gate bipolar transistors. Extensive simulation and experimental tests verify the asymptotic convergence of the proposed observer.

Design and development of wiring harness test based on S3C44B0

PurposeThe purpose of this paper is to introduce a design method of an embedded advanced RISC machines (ARM) hardware circuit using the microprocessor S3C44B0 as a core according to a testing principle of wiring harness.Design/methodology/approachThe microprocessor module is designed with the S3C44B0 of Samsung Corp. The microprocessor send test instructions to the wiring harness circuit, receive and store the test data, get and display the test results by the liquid crystal display, and the wiring harness testing circuit is implemented by complex programmable logic device. The uClinux operating system is transplanted into the ARM hardware platform, and the developing and loading code of the uClinux device driver and a basic flow chart is given.FindingsThe combination of S3C44B0 and uClinux embedded microprocessors achieved a powerful wiring harness tester driver development. This structure leads to a flexible configuration and convenient extension.Research limitations/implicationsA Linux development environment is established and the device drivers compiled into the kernel. But the development of the application program and the user operating interface of the wiring harness have not been completed yet.Practical implicationsAfter the development of the application program and the user operating interface of the wiring harness, this device should be able to find practical application in the industry.Originality/valueThis wiring harness tester can detect different failures at the first time through the wiring harness on‐test to ensure the product quality, reduce the labor intensity, improve the working efficiency, and enhance the test accurately.

The Design and Implementation of Motion Control Card Based on DSP

A hardware implement scheme is proposed based on digital signal processor, and the complex programmable logic device and industry standard architecture bus is proposed. The dual-port random access memory communication circuit, I/O port address decoding circuit, two axis control output circuit and position detecting circuit are developed, the main program and interrupt-serving program of digital signal processor are designed by the idea of modularization. The static accuray of the motion control card is tested via special experimental device. The present analysis show that the designed circuit is effective and the static control precision of motion control card is satisfied.

Compact CPLD Board for Prototyping Digital & Robotics Applications

paper presents the implementation of Complex Programmable Logic Devices (CPLDs) board for digital and robotics applications for digital and robotics laboratory in the university. The objective of designed board is to take advantages of CPLDs features like reconfigurable architecture, high speed operation, pin locking, in-system programming (ISP) for robotics platform design and digital system design. This CPLD board size is relatively compact; so it can be easily mounted on mobile robots. On board power supply and variable frequency oscillator improves functionality of overall board.

Comparison of transient and steady-state performances analysis for a dual-channel switched reluctance machine operation under different modes

This study deals with the comparison of the dynamic modelling, the transient and steady-state performances analysis and experimental verification for a 12/8 dual-channel switched reluctance machine (DCSRM) under single- and dual-channel operation modes. The DCSRM has inherent short flux paths capability, and the magnetic circuits for both the channels share most of the magnetic real estate in the machine under dual-channel excitation mode. According to the different flux patterns, the dynamic models for the DCSRM operating under different modes are presented. In this proposed dual-channel operation model, the mutual coupling between different phases in each channel of the DCSRM is considered. By using the dynamic models, various transient and steady-state performances such as starting up speed under closed-loop control, phase currents, phase flux linkages, total torque characteristics and sudden change in torque operation are predicted and compared for the DCSRM under different modes and excitation conditions. It is shown that when the DCSRM operation is under dual-channel mode, it has faster acceleration performance and the torque is more than two times of that under single-channel mode. Finally, an experimental laboratory set-up based on digital signal processor and complex programmable logic device (CPLD) is built, which verify the proposed modelling and analysis. The experimental results of transient and steady-state performances are compared with the simulation results in the DCSRM systems under single- and dual-channel operation modes.

基于CPLD工作模式可调的线阵CCD驱动电路设计

A driving circuit design of TCD1707D was presented.It could overcome the shortcoming of common circuit which is needed to change the hardware or programme in case the condition has been modified.This design shows two flexible working modes,one is internal burst mode,the other is external burst mode.In the external burst mode,the users can control the time of exposure and signal outputs by means of external triggered pulse.Integration time and driving frequency of CCD can be tuned simultaneously in the other mode.The function is carried out by setting internal and external triggered respectively with complex programmable logic device (CPLD) and an external control.CPLD is combined with the control circuit,so external commands can produce corresponding control signals to drive curcuit nomally.And then through the pins of CPLD,the output signals can be transfered to the CCD chip.In addition,in order to solve the EMC problem,the article presents a linear CCD periphery circuit,which is improved the quality of CCD signal outputs.This method has the advantages of convenient debugging,simple circuit and high integration level.It is proved by experiments that the system outputs basically match the simulation,and the signal outputs are more reliable,more stable and less interferential than common system.And the system could fulfill a wide range of users’ needs,especially can be used for accurate high-speed measurement and push-broom.

Design and Implementation of a Cpld-Based Multilevel Inverter Depending on a Complex Programmable Logic Device (CPLD)

A complex programmable logic device (CPLD) based multilevel inverter has been designed and implemented. The design involves three main parts. The first part is the switching angle generator (SAG), which determines the switching angles from an optimized primitive angle. The second part is the switching pulse generator (SPG), which controls the drive circuit of the inverter. The timing circuit is the third part, which provides the necessary timing for both SAG and SPG. Implementing both SAG and SPG using a CPLD device mean high speed cycle time. Hence an accurate timing for the switching angles is obtained compared to other procedures that uses software for calculating and generating the switching angles, such as microcontroller. MATLAB work space has been used to acquire and analyze the inverter output via the PC sound card. Results of the implemented inverter staircase output voltage, as well as the output frequency spectrum are obtained.

Design and Implementation of a Cpld-Based Multilevel Inverter Depending on a Complex Programmable Logic Device (CPLD)

A complex programmable logic device (CPLD) based multilevel inverter has been designed and implemented. The design involves three main parts. The first part is the switching angle generator (SAG), which determines the switching angles from an optimized primitive angle. The second part is the switching pulse generator (SPG), which controls the drive circuit of the inverter. The timing circuit is the third part, which provides the necessary timing for both SAG and SPG. Implementing both SAG and SPG using a CPLD device mean high speed cycle time. Hence an accurate timing for the switching angles is obtained compared to other procedures that uses software for calculating and generating the switching angles, such as microcontroller. MATLAB work space has been used to acquire and analyze the inverter output via the PC sound card. Results of the implemented inverter staircase output voltage, as well as the output frequency spectrum are obtained.

An automatic optical inspection system for inspection of CMOS compact camera module assembly

This paper presents the development of an automatic inspection system to check lens focus status and white balance level and to inspect defects including black and white defect, dim defect, color defect, and line defects in manufacturing process of compact camera module. To check the imaging status and inspect the defects of compact camera module, a unique image capturing system is developed to get image data from CMOS sensor at high speed. It has a complex programmable logic device, and the camera link and the frame grabber is used to transfer and store images to PC. Several kinds of unique image charts are designed to inspect the various types of defects in compact camera module, and they are implemented and displayed on the LCD monitor directly to reduce handling and exchanging time of inspection charts during test procedures. Various image processing algorithms are developed to analyze the captured image from each test chart and to find and verify the defects of camera modules. The experimental results show that the proposed system is able to reliably inspect various types of defects with high precision and high speed in real manufacturing condition.

An Embedded System of Real-Time Acquisition and Display of Images

In this paper, we propose a design of an embedded system which based on CPLD (Complex Programmable Logic Device) and only one chip of SRAM (Static RAM) in order to acquire and display the images real-time. The system uses Omni Vision’s CMOS color image sensor OV7725 as the image acquisition chip and a 5.6-inch TFT-LCD (Thin Film Transistor Liquid Crystal Display), 18bit (RGB666) colors with resolution of 640 × 480 pixels, to display the images real-time, and the device of CPLD (EPM7160E) to control the timing, image format conversion, and TFT-LCD drive signal. At the same time the embedded system use one chip of SRAM as a cache memory to save an image quickly. The experimental results show that the system designed, with high practical value but less hardware, is easy to capture and display the images stably.

DC SQUID Modulation Electronics for Operation With HTS DC SQUID Magnetometers in the Unshielded Environment

The new variant of DC SQUID modulation electronics for functioning with HTS DC SQUID magnetometers in the unshielded environment, was designed, manufactured and tested. The electronics was optimized for operation with new ultrasensitive HTS DC SQUID magnetometer providing magnetic field resolution of about 15 fT/radicHz at frequencies above 10 Hz and 30 fT/radicHz at 1 Hz. The central commutation core of electronics was based on a complex programmable logic device (CPLD). It has allowed to include into the SQUID-electronics the flexible system of a bias reversal which provides a stable magnetometer operation for various configurations of wiring in the cryostat and various HTS DC SQUID topologies. The electronics was manufactured in one compact box with size 110 mm times60 mm times 15 mm. The channel has standard bandwidth of about 100 kHz with greatly increased dynamic range due to high coupling (8 mV/Phi0) of feedback signal with main SQUID's loop.

Enhancing Learning Effectiveness in Digital Design Courses Through the Use of Programmable Logic Boards

Incorporating programmable logic devices (PLD) in digital design courses has become increasingly popular. The advantages of using PLDs, such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGA), have been discussed before. However, previous studies have focused on the experiences from the point of view of the instructor, with some general impressions from the students. This paper instead focuses on the students' point of view, and most importantly, investigates whether the use of programmable logic has helped facilitate the learning process. This investigation was based on the results of a comprehensive survey that was given to the class shortly before the end of the term, and a comparison of final exam scores between a previous class that did not use PLDs and the current class that did use PLDs. The surveys and their test scores provide solid evidence as to gauge whether using PLDs really does benefit students trying to learn digital design and basic computer architecture.