Complementary Metal Oxide Semiconductor Chip Research Articles

Surface-modified CMOS biosensors

Biosensors translate biological events into electronic signals that quantify biological processes. They are increasingly used in in vitro diagnostics applications that leverage their ability to process small sample volumes. One recent trend has been to integrate biosensors with complementary metal-oxide-semiconductor (CMOS) chips to provide enhanced miniaturization, parallel sensing, and low power consumption at a low cost. CMOS-enabled biosensors are used in monitoring DNA hybridization, enzymatic reactions, and cell proliferation, to name a few applications. This paper explores the materials and processes used in emerging CMOS biosensors. We discuss subtractive and additive processes for creating electrodes for electrochemical sensing applications. We discuss functionalization techniques for creating bioelectronic interfaces that allow molecular events to be transduced into the electrical domain using a plurality of modalities that are readily provided by CMOS chips. Example modalities featured are optical sensing, electrochemical detection, electrical detection, magnetic sensing, and mechanical sensing.

A review of emerging trends in photonic deep learning accelerators

Deep learning has revolutionized many sectors of industry and daily life, but as application scale increases, performing training and inference with large models on massive datasets is increasingly unsustainable on existing hardware. Highly parallelized hardware like Graphics Processing Units (GPUs) are now widely used to improve speed over conventional Central Processing Units (CPUs). However, Complementary Metal-oxide Semiconductor (CMOS) devices suffer from fundamental limitations relying on metallic interconnects which impose inherent constraints on bandwidth, latency, and energy efficiency. Indeed, by 2026, the projected global electricity consumption of data centers fueled by CMOS chips is expected to increase by an amount equivalent to the annual usage of an additional European country. Silicon Photonics (SiPh) devices are emerging as a promising energy-efficient CMOS-compatible alternative to electronic deep learning accelerators, using light to compute as well as communicate. In this review, we examine the prospects of photonic computing as an emerging solution for acceleration in deep learning applications. We present an overview of the photonic computing landscape, then focus in detail on SiPh integrated circuit (PIC) accelerators designed for different neural network models and applications deep learning. We categorize different devices based on their use cases and operating principles to assess relative strengths, present open challenges, and identify new directions for further research.

Achromatic CMOS-Integrated Four-Bit Orbital Angular Momentum Mode Detector at Three Wavelengths.

The simultaneous detection of the orbital angular momentum (OAM) and wavelength offers new opportunities for optical multiplexing. However, because of the dispersion of lens functions for Fourier transformation, the mode conversions at distinct wavelengths cannot be achieved in the same plane. Here we propose an ultracompact achromatic complementary metal oxide semiconductor (CMOS)-integrated OAM mode detector. Specifically, a spatial multiplexed scheme, randomly interleaving the phase distributions for distributing the superposed OAM modes into preset positions at distinct wavelengths, is presented. In addition, such a nanoprinted achromatic OAM detector featuring a microscale size and a short focal length can be integrated onto a CMOS chip. Consequently, the four-bit incident light beams at three discrete wavelengths (633, 532, and 488 nm) can be distinguished with a high degree of accuracy evaluated by the average standardized Euclidean distance of ∼0.75 between the analytical and target results. Our results showcase a miniaturized platform for achieving high-capacity information processing.

CMOS on-chip thermometry at deep cryogenic temperatures

Accurate on-chip temperature sensing is critical for the optimal performance of modern complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs), to understand and monitor localized heating around the chip during operation. The development of quantum computers has stimulated much interest in ICs operating at deep cryogenic temperatures (typically 0.01–4 K), in which the reduced thermal conductivity of silicon and silicon oxide and the limited cooling power budgets make local on-chip temperature sensing even more important. Here, we report four different methods for on-chip temperature measurements native to CMOS industrial fabrication processes. These include secondary and primary thermometry methods and cover conventional thermometry structures used at room temperature as well as methods exploiting phenomena that emerge at cryogenic temperatures, such as superconductivity and Coulomb blockade. We benchmark the sensitivity of the methods as a function of temperature and use them to measure local excess temperature produced by on-chip heating elements. Our results demonstrate thermometry methods that may be readily integrated in CMOS chips with operation from the millikelvin range to room temperature.

Probabilistic computing with voltage-controlled dynamics in magnetic tunnel junctions

Probabilistic (p-) computing is a physics-based approach to addressing computational problems which are difficult to solve by conventional von Neumann computers. A key requirement for p-computing is the realization of fast, compact, and energy-efficient probabilistic bits. Stochastic magnetic tunnel junctions (MTJs) with low energy barriers, where the relative dwell time in each state is controlled by current, have been proposed as a candidate to implement p-bits. This approach presents challenges due to the need for precise control of a small energy barrier across large numbers of MTJs, and due to the need for an analog control signal. Here we demonstrate an alternative p-bit design based on perpendicular MTJs that uses the voltage-controlled magnetic anisotropy (VCMA) effect to create the random state of a p-bit on demand. The MTJs are stable (i.e. have large energy barriers) in the absence of voltage, and VCMA-induced dynamics are used to generate random numbers in less than 10 ns/bit. We then show a compact method of implementing p-bits by using VC-MTJs without a bias current. As a demonstration of the feasibility of the proposed p-bits and high quality of the generated random numbers, we solve up to 40 bit integer factorization problems using experimental bit-streams generated by VC-MTJs. Our proposal can impact the development of p-computers, both by supporting a fully spintronic implementation of a p-bit, and alternatively, by enabling true random number generation at low cost for ultralow-power and compact p-computers implemented in complementary metal-oxide semiconductor chips.

High-Density Integration of Ultrabright OLEDs on a Miniaturized Needle-Shaped CMOS Backplane.

Direct deposition of organic light-emitting diodes (OLEDs) on silicon-based complementary metal-oxide-semiconductor (CMOS) chips has enabled self-emissive microdisplays with high resolution and fill-factor. Emerging applications of OLEDs in augmented and virtual reality (AR/VR) displays and in biomedical applications, e.g., as brain implants for cell-specific light delivery in optogenetics, require light intensities orders of magnitude above those found in traditional displays. Further requirements often include a microscopic device footprint, a specific shape and ultrastable passivation, e.g., to ensure biocompatibility and minimal invasiveness of OLED-based implants. In this work, up to 1024 ultrabright, microscopic OLEDs are deposited directly on needle-shaped CMOS chips. Transmission electron microscopy and energy-dispersive X-ray spectroscopy are performed on the foundry-provided aluminum contact pads of the CMOS chips to guide a systematic optimization of the contacts. Plasma treatment and implementation of silver interlayers lead to ohmic contact conditions and thus facilitate direct vacuum deposition of orange- and blue-emitting OLED stacks leading to micrometer-sized pixels on the chips. The electronics in each needle allow each pixel to switch individually. The OLED pixels generate a mean optical power density of 0.25mWmm-2, corresponding to >40000cdm-2, well above the requirement for daylight AR applications and optogenetic single-unit activation in the brain.

From Material to Cameras: Low-Dimensional Photodetector Arrays on CMOS.

The last two decades have witnessed a dramatic increase in research on low-dimensional material with exceptional optoelectronic properties. While low-dimensional materials offer exciting new opportunities for imaging, their integration in practical applications has been slow. In fact, most existing reports are based on single-pixel devices that cannot rival the quantity and quality of information provided by massively parallelized mega-pixel imagers based on complementary metal-oxide semiconductor (CMOS) readout electronics. The first goal of this review is to present new opportunities in producing high-resolution cameras using these new materials. New photodetection methods and materials in the field are presented, and the challenges involved in their integration on CMOS chips for making high-resolution cameras are discussed. Practical approaches are then presented to address these challenges and methods to integrate low-dimensional material on CMOS. It is also shown that such integrations could be used for ultra-low noise and massively parallel testing of new material and devices. The second goal of this review is to present the colossal untapped potential of low-dimensional material in enabling the next-generation of low-cost and high-performance cameras. It is proposed that low-dimensional materials have the natural ability to create excellent bio-inspired artificial imaging systems with unique features such as in-pixel computing, multi-band imaging, and curved retinas.

The history of neuromorphic computing and its application on recognition systems

Since the invention of the memristive device with a nano-scale footprint, a lot of scholars have started to focus on the area of recognition systems based on the Complementary Metal-Oxide Semiconductor chips (CMOS) integrated with memristive devices. This papers goal is to compare and analyze the advantage and disadvantage on the near research on the cognitive machine. Start with the construction of a simple dynamic model of neurons in Section 2, the history of the development of the recognitive machine is introduced in Section 3. Section 4 focusing on the comparison and analysis of researches done by different scholars. Through the comparison of multiple scholars work, improvement of the memory system would be a potential way to improve the recognition system nowadays, and it is discussed in the conclusion.

Dielectrophoresis-assisted 65-GHz LC-oscillator array CMOS chips for label-free and sensitive detection of microorganism cells

In this paper, we propose a miniature, sensitive, and label-free method for detecting Escherichia coli (E. coli) and Saccharomyces cerevisiae (yeast) by using a complementary metal–oxide–semiconductor (CMOS) chip with dielectrophoresis (DEP)-assisted LC-oscillator arrays. Each of the 62 × 24 arrayed sensor elements on the CMOS chip comprises a 65-GHz LC oscillator that senses the dielectric change due to the presence of the microorganisms. Given the non-uniform sensitivity of the LC oscillator, the DEP electrodes fabricated to be placed at the most sensitive position of the LC-oscillator were used to collect microorganisms and thereby enhance the measurement sensitivity. The AC electric field of DEP above 2 MHz interferes with the 65-GHz LC oscillator circuit in the designated vicinity. With appropriate DEP settings, each sensor element can achieve a limit of detection of two E. coli cells or one yeast cell. Quantitative enumeration reaches a single-cell resolution at small microorganism numbers. The results of this study confirmed that the novel approach of combining DEP technique and LC-oscillator array can perform high-sensitivity detection of microorganisms. Further, the realization of large-scale paralleled measurement makes the proposed CMOS biosensor a potential candidate as a rapid and low-cost lab-on-a-chip sensor for food inspection and clinical diagnosis.

Megapixel large-format colloidal quantum-dot infrared imagers with resonant-cavity enhanced photoresponse

Infrared imaging is extensively explored due to its unique properties of high atmospheric transmission and temperature-dependent emission. Unfortunately, the current epitaxial infrared materials suffer from a complicated fabrication process and low production yield, which hinders the further development of infrared imaging for civilian applications. As an alternative to epitaxial semiconductors, the wide spectral tunability and optical versatility of colloidal quantum dots (CQDs) have provided a promising route for infrared detection. Here, we demonstrate an infrared imager that integrates HgTe CQDs with complementary metal-oxide-semiconductor (CMOS) readout integrated circuits. Moreover, the underlying metal contacts and passivation layer of the CMOS chip play a role as an in-pixel resonant-cavity , which enhances the absorption of the CQDs film. The CQDs imager exhibits a detectivity of 2.8 × 1010 Jones, an external quantum efficiency of 14%, and an operable pixel factor of over 99.99% for a cut-off wavelength of around 2 µm at room-temperature. With a large-format (1280 × 1024 pixels2) and a small pixel pitch of 15 µm, the resolution of the imager can reach 40 line pairs per millimeter (lp/mm). The performance of the CQDs imager is demonstrated by infrared imaging.

Experimental Study of Micrometeoroids Impacts on an X-Ray Telescope Model using Micro-pore Optics and CMOS Detector with Micron-sized Particles

This laboratory study aimed to assess the potential damage caused by the impact of micrometeoroids or space debris on a novel X-ray focusing telescope composed of Micro-pore Optics (MPO) plates and Complementary Metal Oxide Semiconductor (CMOS) sensors. An impact experiment was conducted on a simplified model of an X-ray telescope composed of two MPO plates and one CMOS sensor. The diameters of the projectiles we used are 1 ∼ 50 μm. Scanning electron microscopy and energy-dispersive X-ray spectroscopy (EDS) are methods for investigating the morphology of the impact craters and analyzing the composition of residues. We described the impact crater morphology on both MPO plates and CMOS chips. Results of impact craters size and number show that one 1 μm particle produces a damaged area of 18 μm2 in aluminum (Al) film of the MPO plate on average (at a median speed of 2 km s−1), resulting in 10 light leak spots on the CMOS chip. Meanwhile, one particle with a diameter of 50 μm may damage 3 micropores (about 7 × 10−3 mm2) on the MPO plate at a median speed of 6 km s−1. About 1.5 particles could cause one bad pixel on the CMOS chip behind the MPO plates. Nevertheless, no failure of the CMOS sensor or severe damage to the MPO device was observed after the impact.

Fabrication of highly sensitive and uniform Ag/PS/PDMS SERS substrate and its application for in-situ detection

In this study, we developed a flexible and transparent silver/polystyrene/polydimethylsiloxane (Ag/PS/PDMS) substrate with both high density of hot spots and satisfactory uniformity using a cost-effective approach. Via template-guided self-assembly, PS beads were arranged regularly in nanobowls of a square array on PDMS, whose surface structure was transferred from a commercial complementary metal oxide semiconductor chip. Roughness was introduced onto the PS bead surface by nitrogen plasma treatment, followed by sputtering of Ag which generated many hot spots. Differential roughness on the PS bead surface greatly influenced the morphology of the Ag/PS/PDMS substrate. A meat-ball like surface structure was formed with a plasma etching time of 5 min, whose growth mechanism was proposed based on the scanning electron microscope analysis. The high sensitivity and desirable uniformity of the meat-ball like Ag/PS/PDMS substrate were demonstrated by using crystal violet as a Raman reporter, exhibiting an enhancement factor of 2.7 × 107 and a relative standard deviation of 5.04%. Thiram of a lower concentration than the maximum residue limit on the cucumber surface could easily be detected in situ by the proposed substrate, demonstrating its great potential for in-situ food safety analysis.

Real-Time Detection of Self-Assembled Monolayer Formation Using CMOS-Based Nanocapacitor Arrays

A sensing platform based on array of nanoelectrodes is used for high-frequency impedance measurements that allow detecting analytes beyond the electric double layer [1,2]. The massively parallelized architecture is based on complementary metal-oxide-semiconductor (CMOS) nanocapacitors. The small dimensions of the electrodes and associated readout circuitry on the CMOS chip yield minimal parasitic capacitance, which allows applying AC frequencies up to 50 MHz. Herein we will demonstrate the measurement of self-assembled monolayer (SAM) formation in real time on the array of nanoelectrodes fabricated on this CMOS platform. The average response of the thiol formation on the nanoelectrode was monitored at frequencies ranging from 1.6 MHz to 50 MHz. The measurements at different frequencies provides complementary information on the assembly process.

CMOS-MEMS technologies for the applications of environment sensors and environment sensing hubs

The booming growth in environmental conditions sensing and monitoring pushes the need of inexpensive environment sensors with small size and low power consumption. The outbreak of COVID-19 further increases the need for fast monitoring of environment conditions. The micro-electrical-mechanical-systems (MEMS) technologies are considered as promising solutions to realize the required environment sensors. The mature complementary metal-oxide-semiconductor (CMOS) process platforms available in many foundries can be extended to fabricate MEMS sensors to offer the advantage of relatively easier commercialization. Moreover, by leveraging the characteristics of CMOS process platforms, the integration of multiple sensors and sensing circuits to form a compact sensing system can also be achieved. This review paper will focus on introducing the miniaturized environmental sensing devices implemented and integrated using the CMOS-MEMS technologies. In general, the CMOS chips for environment sensing are firstly fabricated using the foundry-available CMOS processes, and then the post-CMOS micromachining processes are performed to implement the CMOS-MEMS environment sensors. This paper respectively reviews five different environment sensors (including the infrared, pressure (barometer), humidity/temperature, and gas sensors) using the CMOS-based MEMS technologies. The advantages and design concerns of sensors fabricated by different CMOS and post-CMOS processes are introduced and discussed. Moreover, the CMOS-MEMS environment sensing hub implemented through the monolithic integration of multiple environment sensors is also introduced.

Nanoprinted high-neuron-density optical linear perceptrons performing near-infrared inference on a CMOS chip

Optical machine learning has emerged as an important research area that, by leveraging the advantages inherent to optical signals, such as parallelism and high speed, paves the way for a future where optical hardware can process data at the speed of light. In this work, we present such optical devices for data processing in the form of single-layer nanoscale holographic perceptrons trained to perform optical inference tasks. We experimentally show the functionality of these passive optical devices in the example of decryptors trained to perform optical inference of single or whole classes of keys through symmetric and asymmetric decryption. The decryptors, designed for operation in the near-infrared region, are nanoprinted on complementary metal-oxide–semiconductor chips by galvo-dithered two-photon nanolithography with axial nanostepping of 10 nm1,2, achieving a neuron density of >500 million neurons per square centimetre. This power-efficient commixture of machine learning and on-chip integration may have a transformative impact on optical decryption3, sensing4, medical diagnostics5 and computing6,7.

A cryogenic CMOS chip for generating control signals for multiple qubits

Scaled-up quantum computers will require control interfaces capable of the manipulation and readout of large numbers of qubits, which usually operate at millikelvin temperatures. Advanced complementary metal–oxide–semiconductor (CMOS) technology is an attractive platform for delivering such interfaces. However, this approach is generally discounted due to its high power dissipation, which can lead to the heating of fragile qubits. Here we report a CMOS-based platform that can provide multiple electrical signals for the control of qubits at 100 mK. We demonstrate a chip that is configured by digital input signals at room temperature and uses on-chip circuit cells that are based on switched capacitors to generate static and dynamic voltages for the parallel control of qubits. We use our CMOS chip to bias a quantum dot device and to switch the conductance of a quantum dot via voltage pulses generated on the chip. Based on measurements from six cells, we determine the average power dissipation for generating control pulses of 100 mV to be 18 nW per cell. We estimate that a scaled-up system containing a thousand cells could be cooled by a commercially available dilution refrigerator. A platform based on complementary metal–oxide–semiconductor (CMOS) technology operating with qubits close to 100 mK can generate static and dynamic signals for the control of many qubits.

A high-speed programmable and scalable terahertz holographic metasurface based on tiled CMOS chips

Metasurfaces, which consist of arrays of subwavelength scatterers, can be used to precisely control incident electromagnetic fields, but are typically static once fabricated. A dynamically programmable array of terahertz meta-elements, in which each element can be individually reconfigured to allow controlled wavefront shaping, could be of value in terahertz applications such as wireless communication, sensing and imaging. Here, we show that large-scale programmable metasurfaces can be created using arrays of complementary metal–oxide–semiconductor (CMOS)-based chip tiles. We developed an aperture with a 2 × 2 array of tiled chips consisting of 576 meta-elements, each individually addressable and digitally programmable with 8 bits of control at GHz speed, and fabricated in a 65 nm industry-standard CMOS process. The active-circuit-coupled terahertz meta-element structure can be reconfigured, providing digitally programmable metasurfaces with amplitude and phase control, around 25 dB of amplitude modulation depth, dynamic beamforming across ±30°, multibeam formation and programmable holographic projections at 0.3 THz. The integration of active electronic systems and meta-elements using commercial silicon fabrication techniques can be used to create scalable and dynamically programmable terahertz metasurfaces.

A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors

Implantable active electronic microchips are being developed as multinode in-body sensors and actuators. There is a need to develop high throughput microfabrication techniques applicable to complementary metal–oxide–semiconductor (CMOS)-based silicon electronics in order to process bare dies from a foundry to physiologically compatible implant ensembles. Post-processing of a miniature CMOS chip by usual methods is challenging as the typically sub-mm size small dies are hard to handle and not readily compatible with the standard microfabrication, e.g., photolithography. Here, we present a soft material-based, low chemical and mechanical stress, scalable microchip post-CMOS processing method that enables photolithography and electron-beam deposition on hundreds of micrometers scale dies. The technique builds on the use of a polydimethylsiloxane (PDMS) carrier substrate, in which the CMOS chips were embedded and precisely aligned, thereby enabling batch post-processing without complication from additional micromachining or chip treatments. We have demonstrated our technique with 650 μm × 650 μm and 280 μm × 280 μm chips, designed for electrophysiological neural recording and microstimulation implants by monolithic integration of patterned gold and PEDOT:PSS electrodes on the chips and assessed their electrical properties. The functionality of the post-processed chips was verified in saline, and ex vivo experiments using wireless power and data link, to demonstrate the recording and stimulation performance of the microscale electrode interfaces.

Development of the Backside Loading Inductive Tactile Force Sensor Using the Flip-Chip Bonding of CMOS Sensing Chip

This study presents a backside loading design inductive tactile sensor with the monolithic integration of thermometer. Based on the commercially available standard complementary metal-oxide-semiconductor (CMOS) process (the TSMC $0.35\mu \text{m}$ 2P4M CMOS process) and the in-house post CMOS processes, the sensing chip is designed and implemented. The electrical connection is further achieved by using the flip-chip bonding process, and hence the breakage of bonding wires by the tactile load can be avoided. The CMOS sensing chip consists of the magnetic sensing coil and the polysilicon RTD (resistive thermal detector). Moreover, a cavity is defined on the backside (silicon substrate) of CMOS chip to act as a mold for the polymer filler as well as the housing for the chrome steel ball contact interface. The tactile force will cause the polymer deformation and chrome steel ball displacement, and further lead to the magnetic flux change on the sensing coil. Thus, the tactile force is detected by the inductance variation of magnetic sensing coil on the CMOS chip. Moreover, the temperature variation is detected by the resistance change of RTD thermometer, and the in-situ temperature monitoring during tactile loading is achieved. The force response of the proposed tactile sensor and the temperature response of the thermometer have been characterized. The influence of temperature variation on the tactile sensor has also been calibrated. Moreover, the characteristics of the thermometer on sensing chip at different contact conditions are also investigated.

Disposable Paper-on-CMOS Platform for Real-Time Simultaneous Detection of Metabolites.

Early stage diagnosis of sepsis without overburdening health services is essential to improving patient outcomes. A fast and simple-to-use platform that combines an integrated circuit with paper microfluidics for simultaneous detection of multiple-metabolites appropriate for diagnostics was presented. Paper based sensors are a primary candidate for widespread deployment of diagnostic or test devices. However, the majority of devices today use a simple paper strip to detect a single marker using the reflectance of light. However, for many diseases such as sepsis, one biomarker is not sufficient to make a unique diagnosis. In this work multiple measurements are made on patterned paper simultaneously. Using laser ablation to fabricate microfluidic channels on paper provides a flexible and direct approach for mass manufacture of disposable paper strips. A reusable photodiode array on a complementary metal oxide semiconductor chip is used as the transducer. The system measures changes in optical absorbance in the paper to achieve a cost-effective and easily implemented system that is capable of multiple simultaneous assays. Potential sepsis metabolite biomarkers glucose and lactate have been studied and quantified with the platform, achieving sensitivity within the physiological range in human serum. We have detailed a disposable paper-based CMOS photodiode sensor platform for real-time simultaneous detection of metabolites for diseases such as sepsis. A combination of a low-cost paper strip with microfluidic channels and a sensitive CMOS photodiode sensor array makes our platform a robust portable and inexpensive biosensing device for multiple diagnostic tests in many different applications.