Communication Fabric Research Articles

A novel socio-pragmatic framework for sentiment analysis in Dravidian–English code-switched texts

The advent of global digital communication has accentuated the complexity of multilingual code-switching, presenting formidable challenges for sentiment analysis by necessitating nuanced interpretation of linguistic and socio-pragmatic cues. This research introduces MultiSwitchNet, a pioneering sentiment analysis model tailored for the intricate dynamics of Dravidian languages mixed with English code-switched texts. MultiSwitchNet leverages the linguistic prowess of XLM-RoBERTa, combined with socio-pragmatic insights through a novel Socio-Pragmatic Embedding Layer (SPEL) utilizing DistilBERT. Evaluated on the Dravidian Code-Mixed Dataset, MultiSwitchNet achieved superior performance metrics, including an accuracy of 72.3%, precision of 72.9%, recall of 72.1%, and an F1-score of 72.5%. Its effectiveness extends across varying degrees of code-switching complexity and demonstrates remarkable consistency in sentiment prediction across semantically similar yet syntactically diverse sentences. Statistical analyses, including ANOVA and post hoc tests, underscore the model’s significant outperformance compared to both baseline and state-of-the-art models, highlighting the indispensability of integrating socio-pragmatic awareness for accurate sentiment analysis. MultiSwitchNet’s innovative approach sets a new benchmark for sentiment analysis in multilingual contexts and opens avenues for future research into models capable of discerning the rich socio-pragmatic fabric of global digital communication.

Communication—Fabrication of Micro-Holes in PMMA Using Micro-ECDM Process: Geometric Characteristics and EC Discharge Behaviour

High-quality micro-features with low production cost are in high demand for the development of cost-effective microfluidic devices. In this work, we present a scalable and cost-effective fabrication process for fabricating blind micro-holes in PMMA substrates via micro-electrochemical discharge machining (Micro-ECDM) for the first time. By providing the suitable applied voltage (Va), uniformity of the electrochemical (EC) discharges and subsequent geometric characteristics of the micro-holes can be controlled. The stable and unstable EC discharge zones and micro-hole machining quality for different Va and tool conditions have been identified. For unstable and non-uniform EC discharge zone at Va of 26 V, the variation in the micro-hole output parameters is higher compared to stable and uniform EC discharge zones at Va of 28 V and 30 V. Based on the results, micro-holes with appropriate quality have been fabricated and characterized.

Performance evaluation of communication fabrics for offline parallel electromagnetic transient simulation based on MPI

Offline electromagnetic transient (EMT) simulation is a very time-consuming activity for large-scale and complex power systems. Hydro-Québec (HQ) is involved in the development of EMT simulation tools, one of which can operate both in real-time (RT) and offline. This software heavily relies on parallel processing to achieve high-level performance. However, the offline mode is currently limited as it targets only single system image computers. As the offline mode uses the Message Passing Interface (MPI) standard to implement its parallel processing, porting the offline mode to PC clusters is the logical step to increase the offline simulation capabilities of HQ EMT simulation software.This paper evaluates the performance of different communication fabrics for the execution of offline EMT simulation operating in parallel with MPI. The performance metrics used for this evaluation are first discussed. The evaluated communication fabrics are then presented and tested with an offline simulation of the HQ power transmission system.

ReaLPrune: ReRAM Crossbar-Aware Lottery Ticket Pruning for CNNs

Training machine learning (ML) models at the edge (on-chip training on end user devices) can address many pressing challenges including data privacy/security, increase the accessibility of ML applications to different parts of the world by reducing the dependence on the communication fabric and the cloud infrastructure, and meet the real-time requirements of AR/VR applications. However, existing edge platforms do not have sufficient computing capabilities to support complex ML tasks such as training large CNNs. ReRAM-based architectures offer high-performance yet energy efficient computing platforms for on-chip CNN training/inferencing. However, ReRAM-based architectures are not scalable with the size of the CNN. Larger CNNs have more weights, which requires more ReRAM cells that cannot be integrated in a single chip. Moreover, training larger CNNs on-chip will require higher power, which cannot be afforded by these smaller devices. Pruning is an effective way to solve this problem. However, existing pruning techniques are either targeted for inferencing only, or they are not crossbar-aware. This leads to sub-optimal hardware savings and performance benefits for CNN training on ReRAM-based architectures. In this paper, we address this problem by proposing a novel crossbar-aware pruning strategy, referred as ReaLPrune, which can prune more than 90% of CNN weights. The pruned model can be trained from scratch without any accuracy loss. Experimental results indicate that ReaLPrune reduces hardware requirements by 77.2% and accelerates CNN training by ∼20× compared to unpruned CNNs. ReaLPrune also outperforms other crossbar-aware pruning techniques in terms of both performance and hardware savings. In addition, ReaLPrune is equally effective for diverse datasets and more complex CNNs.

Specialized Neural Network Hardware Accelerators

It seems that by now enough samples of specialized neural network microprocessor crystals and systems based on them have already been created to indicate the trends of their development, and most importantly, their place in the overall development of supercomputer architectures and technologies. The use of low-bit representations of numbers, such as FP8, INT8, BF16, acceptable in neural network computing, allows, on the one hand, to achieve the performance of the 2015 FP8 TFLOPS, 1008 BF16 TFLOPS crystal, and, on the other hand, to reduce the energy consumption of the multiplication operation. Low bit depth caused attention to rounding errors. In a number of crystals, the set of rounding modes has been expanded in comparison with the generally accepted standard and the possibility of programmatically setting the rounding mode has been introduced. In addition, the validity of the creation of specialized neuroprocessor crystals is due to the use of structural programming elements, in which a computer is programmatically formed for an executable algorithm. Therefore, along with reduction the bit depth and support for processing sparse neural networks, in computing systems created on the basis of SambaNova SN30 RDU, Graphcore Colossus MK2 IPU, Untether AI Boqueria, AWS Trainium1, Tesla Dojo D1, there is the possibility, to some extent, of implementing structural programming of calculations. The sparsity of the processed data caused the abandonment of cache memory and the use of on-chip large scratchpad memory with increased bandwidth for data delivery between memory and arithmetic logic devices, as well as between memory and on-chip and inter-chip communication fabric. Therefore, we can talk about a different hierarchical structure of memory compared to the traditional one using cache memory. Thus, specialization in neural network algorithms has led to the emergence of massively parallel systems architectures for processing low-bit data formats with poor temporal and spatial localization of memory requests.

Святкування Шекспірівських днів у Стретфорді-на-Ейвоні: історія, традиція, сучасність

Background. The idea of this publication is based on the author's personal experience of participating in Shakespear’s Birthday Celebrations 2023 in Stratford-upon-Avon and is determined by the need for interdisciplinary analysis and dissemination of the experience of modelling public memory about a national genius whose scale of greatness transcends geographical and chronological boundaries. This shapes the peculiar form of the author’s narrative, with publicists and analytical components interacting, and the essayistic passages are accompanied by historical and literary excursuses. The article aims to comprehend the role of the tradition of the annual Shakespeare Celebrations as a ritual communication, which is a way of organizing, supporting and transmitting cultural memory. In the process of Shakespeare's commemoration, which, in fact, began with the installing the tombstone and the monument in Holy Trinity Church and the publication of the First Folio (1623), a rather extensive list of forms of honouring the great poet was developed; moreover, a field of collective memories shared by the global cultural community has been created. The relevance of the article is determined by the fact that the unique Stratford experience is of undeniable interest both in theoretical and pragmatic aspects, because commemorative practices are always correlated not only with history in its traditional sense (systematic knowledge of the past), but also with shaping identities. Methods. Analytical reflection, historical and literary excursions, interdisciplinary studies on the phenomenon of memory (W. Ernst, P. Nora, A. Assman) and cultural identity (E. D. Smith, M. Dobson, P. Redman). Results.The author of the article singles out two major strategies for forming shared ideas about the artist's image. The first one is intuitive-suggestive, which is based on writing and actualizes the broad possibilities of constructing an implicit author. The second one is rational-pragmatic, which tends to fix the traces of the biographical author's presence in the space of real history, their intellectual and logical arrangement into a coherent narrative of memories. Conclusions.What is unique about the Stratford Celebrations is that within them, these two approaches complement, feed and reinforce each other. Every aspect of the Shakespeare festival ( academic symposia, new book issues presentations, topical museum exhibitions, parade to lay the flowers on the poet’s grave, Shakespere Birthday Luncheon with Pregnell Prize award, the Shakespeare Service in Holy Trinity Church) is organically woven into a coherent fabric of ritual communication which organizes, supports and transmits cultural memory of William Shakespeare. At the same time, the presence of such diverse components allows the organizers (Shakespear’s Birthplace Trust, the Town Hall, the Shakespeare Institute at the University of Birmingham, Royal Shakespeare Theatre, Pregnell Award Committee) to use the cognitive, symbolic, axiological and aesthetic resources of all three memory sources (place, image, text). A key role in the Stratford celebrations is played by Holy Trinity Church being a living place of eternal remembrance and sacred place of William Shakespeare memories.

Slack-Aware Packet Approximation for Energy-Efficient Network-on-Chips

Network-on-Chips (NoCs) are the standard on-chip communication fabrics for connecting cores, caches, and memory controllers in multi/many-core systems. With the increase in communication load introduced by emerging parallel computing applications, on-chip communication is becoming more costly than computation in terms of energy consumption. This paper contributes to existing research on approximate communication by proposing a slack-aware packet approximation technique to reduce the energy consumed by NoCs for sustainable parallel computation. The proposed approximation technique lowers both the execution time and NoC power consumption by reducing the packet size based on slack. The slack is the number of cycles by which a packet can be delayed in the network with no effect on execution time. Thus, low-slack packets are considered critical to system performance, and prioritizing these packets during the transmission will significantly reduce execution time. The proposed technique includes a slack-aware control policy to identify low-slack packets and accelerates these packets using two packet approximation mechanisms, namely, an in-network approximation (INAP) and a network interface approximation (NIAP). INAP mechanism prioritizes low-slack packets during the arbitration phase of the router by approximating packets with high-slack. NIAP mechanism reduces the latency of the network links and switch traversals by truncating data for the low-slack packets. An approximate network interface and router are implemented to support the proposed technique with lightweight packet approximation hardware for lower power consumption and execution time. Cycle-accurate simulations using the AxBench and PARSEC benchmark suites show that the proposed approximate communication technique achieves reductions of up to 24% in execution time and 38% in energy consumption with 1.1% less accuracy loss on average compared to existing approximate communication techniques.

Routing in a Communication Fabric of a Computing System with Distributed Shared Memory and Synchronization based on FE-Bits

This article discusses an architecture based on the paradigm of using all possible processes parallelism. The user should only specify which calculations can be performed in parallel threads over shared memory, conforming only to the selected algorithm. This allows you to create the maximum flow of memory accesses inherent in the algorithm. If necessary, read, and only then write a new value instead to the corresponding shared memory cell, the user believes that the conflict resolution mechanism is implemented by hardware memory access control. In general, the proposed architecture is aimed at solving the same problems as the EMU and PIUMA architectures, but uses "smart" controllers of shared memory blocks to synchronize threads and implement atomic operations. For a large flow of accesses to distributed shared memory, energy-efficient routing is necessary. This paper proposes arithmetic routing, which is applicable in any communication fabrics, including with graphs of Dragonfly and graphs with the minimum possible length of the middle path and with the same number of vertices N and degrees of vertices v. An addressing and routing algorithm is proposed that provides energy-efficient access to distributed shared memory. Routing enables fault-tolerant operation based on the choice of alternative routes.

From Scene Flow to Visual Odometry Through Local and Global Regularisation in Markov Random Fields

We revisit pairwise Markov Random Field (MRF) formulations for RGB-D scene flow and leverage novel advances in processor design for real-time implementations. We consider scene flow approaches which consist of data terms enforcing intensity consistency between consecutive images, together with regularisation terms which impose smoothness over the flow field. To achieve real-time operation, previous systems leveraged GPUs and implemented regularisation only between variables corresponding to neighbouring pixels. Such systems could estimate continuously deforming flow fields but the lack of global regularisation over the whole field made them ineffective for visual odometry. We leverage the GraphCore Intelligence Processing Unit (IPU) graph processor chip, which consists of 1216 independent cores called tiles, each with 256 kB local memory. The tiles are connected to an ultrafast all-to-all communication fabric which enables efficient data transmission between the tiles in an arbitrary communication pattern. We propose a distributed formulation for dense RGB-D scene flow based on Gaussian Belief Propagation which leverages the architecture of this processor to implement both local and global regularisation. Local regularisation is enforced for pairs of flow estimates whose corresponding pixels are neighbours, while global regularisation is defined for flow estimate pairs whose corresponding pixels are far from each other on the image plane. Using both types of regularisation allows our algorithm to handle a variety of in-scene motion and makes it suitable for estimating deforming scene flow, piece-wise rigid scene flow and visual odometry within the same system.

Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era

Due to the exceedingly high integration density of VLSI circuits and the resulting high power density, thermal integrity became a major challenge. One way to tackle this problem is Dark silicon. Dark silicon is the amount of circuitry in a chip that is forced to switch off to insure thermal integrity of the system and prevent permanent thermal-related faults. In many-core systems, the presence of Dark Silicon adds new design constraints, in general, and on the communication fabric of such systems, in particular. This is due to the fact that system-level thermal-management systems tend to increase the distance between high activity cores to insure better thermal balancing and integrity. Consequently, a designing dilemma is created where a compromise has to be made between interconnect performance and power consumption. This study proposes a hybrid wire and surface-wave interconnect (SWI) based Network-on-Chip (NoC) to address the dark silicon challenge. Through efficient utilization of one-hop cross the chip communication SWI links, the proposed architecture is able to offer an efficient and scalable communication platform in terms of performance, power, and thermal impact. As a result, evaluations of the proposed architecture compared to baseline architecture under dark silicon scenarios show reduction in maximum temperature by 15∘C, average delay up to 73.1%, and energy-saving up to ∼3X. This study explores the promising potential of the proposed architecture in extending the utilization wall for current and future many-core systems in dark silicon era.

Beyond Rhetoric: Unraveling the Linguistic Fabric of Corporate Social Responsibility Communication

This research paper delves into the linguistic intricacies of Corporate Social Responsibility (CSR) communication, aiming to move beyond rhetorical expressions and unravel the nuanced fabric that shapes these messages. Employing a qualitative approach, the study analyzes a diverse set of CSR communication materials, including corporate reports, press releases, and website content. By scrutinizing lexical choices, tone and framing, syntactic structures, and intertextuality, the research aims to identify patterns, strategies, and potential impact on stakeholder’s perceptions of CSR initiatives. The findings of this study will contribute to a deeper understanding of how language is employed to convey social responsibility in corporate discourse. Ultimately, this research seeks to shed light on the linguistic framework that underlies CSR communication, providing valuable insights for academics, practitioners, and policymakers alike.

Communication—Fabrication of Vertical Nanotwinned Copper with (220) Texture by Direct Current Electrodeposition

Vertical nanotwinned copper film with (220) texture was fabricated on Si wafer with (111) oriented copper seed layer by direct current electrodeposition. A commercial additive and high current density were applied to control the preferred orientation and formation of nanotwins. The twin boundaries are (111) crystal planes, which are perpendicular to the substrate and parallel to the growth direction. It’s inferred that high cathode potential as a result of high current density can induce (220) texture, which is found to be an essential factor for the formation of vertical nanotwinned copper.

Efficient Pipelined Execution of CNNs Based on In-Memory Computing and Graph Homomorphism Verification

In-memory computing is an emerging computing paradigm enabling deep-learning inference at significantly higher energy-efficiency and reduced latency. The essential idea is mapping the synaptic weights of each layer to one or more in-memory computing (IMC) cores. During inference, these cores perform the associated matrix-vector multiplications in place with O(1) time complexity, obviating the need to move the synaptic weights to additional processing units. Moreover, this architecture enables the execution of these networks in a highly pipelined fashion. However, a key challenge is designing an efficient communication fabric for the IMC cores. In this work, we present one such communication fabric based on a graph topology that is well-suited for the widely successful convolutional neural networks (CNNs). We show that this communication fabric facilitates the pipelined execution of all state-of-the-art CNNs by proving the existence of a homomorphism between the graph representations of these networks and that corresponding to the proposed communication fabric. We then present a quantitative comparison with established communication topologies and show that our proposed topology achieves the lowest bandwidth requirements per communication channel. Finally, we present one hardware implementation and show a concrete example of mapping ResNet-32 onto an IMC core array interconnected via the proposed communication fabric.

Computing En-Route for Near-Data Processing

The data explosion and faster data analysis demand have spawned emerging applications that operate over myriads of data and exhibit large memory footprints with low data reuse rate. Such characteristics lead to enormous data movements across the memory hierarchy and pose significant pressure on modern communication fabrics and memory subsystems. To mitigate the worsening gap between high processor computation density and deficient memory bandwidth, memory networks, and near-data processing techniques are proposed to keep improving system performance and energy efficiency. In this article, we propose Active-Routing, an in-network near-data processing architecture for data-flow execution, which enables computation en-route by exploiting patterns of aggregation over intermediate results. The proposed architecture leverages the massive memory cube- and vault-level parallelism as well as network concurrency to optimize the aggregation operations along a dynamically built Active-Routing Tree. It also introduces page granular computation offloading to amortize the offloading overhead and improve the throughput. Compared to the state-of-the-art processing-in-memory architecture, the evaluations show that the baseline Active-Routing can achieve up to 7× speedup with an average of 60 percent performance improvement, and reduce the energy-delay product by 80 percent across various benchmarks. Further optimizations with vault-level parallelism and page granular offloading can achieve an extra order of magnitude improvement.

Communication—Fabrication of Li Nanohole Array by Replication Process Using Anodic Porous Alumina Template

Geometrically controlled Li nanohole arrays with high aspect features were fabricated by a two-step replication process using ordered anodic porous alumina as a template. The use of an appropriate electrolyte for Li electrodeposition and organic solvent for the removal of the polymer (PMMA) template allowed the preparation of Li nanohole arrays with precisely replicated nanostructures. The application of a template with the structures for the electrodeposition of Li contributed to the suppression of the formation of Li dendrites, contributing to the precise replication.

Divorce in the Side of a Marriage Counselling Values

At the annual conference of The American Psychiatric Association (APA) in Miami, there was a workshop entitled "Family Crisis". The results of a study said that in the last 30 years, 60% of families in the United States ended in divorce, and 70% of their children did not develop well, behave deviant or antisocial. For example seen juvenile delinquency, abuse of NAZA (Narcotics, Alcohol, and other Addictive Substances), promiscuity, deviant sexual behavior and so on. It was also stated that divorce rates are increasing, marriages are decreasing because many people choose to live together without marriage or single life and free sex. Disloyalty (abuse) among families in the US turned out not to be the monopoly of husbands alone, but 40% of the wives there were also involved in affair with third parties. Of the five marriages in the first five years, three divorces occurred. The author gives the purpose of writing to discuss the crisis in the household, rebuild the household and give Christian values ​​in counteracting divorce. The author uses descriptive literature research method data and provides research results: How a harmonious family can be established dynamically if we base our family building on the basis of strong Christian spirituality values ​​accompanied by a fabric of good communication between us and our children. Surprisingly few studies have explored the implications of divorce happened because family can not be established, especially in young adulthood. This study addresses several theoretical arguments linking divorce in the side of spiritual value with reduced religious involvement in young adulthood and tests relevant hypotheses using data from a unique sample. Results show that divorce in the side of spiritual value is associated with substantially lower communicate religious involvement among young adults in their families house.

An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication

On-chip communication infrastructure is a central component of modern systems-on-chip (SoCs), and it continues to gain importance as the number of cores, the heterogeneity of components, and the on-chip and off-chip bandwidth continue to grow. Decades of research on on-chip networks enabled cache-coherent shared-memory multiprocessors. However, communication fabrics that meet the needs of heterogeneous many-cores and accelerator-rich SoCs, which are not, or only partially, coherent, are a much less mature research area. In this work, we present a modular, topology-agnostic, high-performance on-chip communication platform. The platform includes components to build and link subnetworks with customizable bandwidth and concurrency properties and adheres to a state-of-the-art, industry-standard protocol. We discuss microarchitectural trade-offs and timing/area characteristics of our modules and show that they can be composed to build high-bandwidth (e.g., 2.5 GHz and 1024 bit data width) end-to-end on-chip communication fabrics (not only network switches but also DMA engines and memory controllers) with high degrees of concurrency. We design and implement a state-of-the-art ML training accelerator, where our communication fabric scales to 1024 cores on a die, providing 32 TB/s cross-sectional bandwidth at only 24 ns round-trip latency between any two cores.

On the Cooperative Relaying Strategies for Multi-Core Wireless Network-on-Chip

Recently, hybrid wired-wireless Network-on-Chip (WiNoC) has been proposed as a suitable communication fabric to provide scalability and satisfy high performance demands of the exascale era of modern multi/many-core System-on-Chip (SoC) design. A well accepted low-latency wireless communication fabric for WiNoCs is millimeter wave (mm-Wave). However, the wireless channel of mm-Wave is lossy due to free space signal radiation with both dielectric propagation loss (DPL) and molecular absorption attenuation (MAA). This is exacerbated for edge situated cores and in macro-chips embodying thousands of cores. To this end, this article proposes efficient relaying techniques to improve the signal strength of the wireless channel in the WiNoCs using on-chip networking approaches under the realistic SoC channel conditions. First, we propose a realistic relay communication channel for the WiNoCs to characterise both MAA and DPL which have drastic effect on the performance. We then derive and show that the channel capacity for a single-relay WiNoC employing Amplify-and-Forward (AF) and Decode-and-Forward (DF) relaying protocols increases by up to 20% and 25%, respectively, compared to the conventional direct transmission. The AF protocol outperforms the DF mode for shorter transmissions between the relay and the destination cores, while the reverse is observed in other conditions. A hybrid protocol is then proposed to exploit the performance advantages of both relaying protocols to address the unbalanced distance between the cores, providing the maximal channel capacity close to the cutset bound. Finally, our approach is further validated in multi-relay WiNoCs where the communications of the remote cores is assisted by multiple intermediate cores along with the details of associated realistic channel model in emerging many-core SoCs.

Communication—Fabrication of Uniform Hollow Cubic Ag Cages and The Application for Surface-Enhanced Raman Spectroscopy Detection

In this study, a facial synthesis route for cubic Ag micro structure with well-defined hollow interior was developed. The fabricated hollow micro-cages were applied as the substrate for the detection of ultralow concentration of crystal violet (CV)-a poisonous organic pollutant. The substrate exhibits optimum SERS performance with a detection of 10−6 M of CV due to the unique hollow morphology, proving that it is a good candidate for SERS detection in the chemical and environmental field.

CFDP PDU Tunneling Service over DTN Between Heterogeneous Deep Space Communication Assets

In space exploration missions, the spacecraft have limited computing resources. In particular, the communications environments for these spacecraft, whether in deep space or the cislunar region, are characterized by intermittent connectivity loss, long signal-propagation delay, and high bit-error rates between spacecraft and their ground stations. Delay-Tolerant Network (DTN) has been introduced to enable automated, efficient communication among flight-mission entities in these environments. However, most flight-mission entities are not yet equipped for DTN; a mechanism is needed whereby DTN-enabled entities and non-DTN-enabled entities can easily interoperate. The CCSDS (Consultative Committee for Space Data Systems) File Delivery Protocol (CFDP) is supported in both DTN and non-DTN communication fabrics, so perhaps CFDP file transmission can serve as the common communication medium that bridges the two. When CFDP runs without a Bundle Protocol (BP), it requires a more complex CFDP implementation, and multi-hop communication is more difficult to configure. This paper presents a tunneling mechanism that relays CFDP protocol data units (PDUs) between a non-DTN-enabled CFDP entity and a DTN-enabled CFDP entity. This enables CFDP-over-link implementations to bridge into BP networks to simplify multi-hop forwarding through the BP network. A proof-of-concept implementation of the tunneling service has been developed and tested using the Interplanetary Overlay Network (ION) DTN software to evaluate this concept of CFDP PDU relay/forward functionality to enable communication between the two heterogeneous space communication fabrics. Test setup, test results, and future work on the tunneling service are also discussed.