Common-mode Noise Reduction Research Articles

Shielding Effectiveness of HV-HF Transformer for Accelerator Applications

High-voltage high-frequency transformers are employed in DC accelerators. The high frequency produced by the inverter at lower voltage is stepped up to several tens of kilovolts using step-up transformers. These transformers are subjected to high-frequency transients from high-voltage multiplier columns. Electrostatic shielding is very effective in common mode noise reduction. However, in accelerator applications, shielding effectiveness obtained using conductive shields is found compromised in practice. This paper investigates the reasons behind this phenomenon and explores remedial measures.

Common-Mode Noise Reduction and Capacitor Voltage Auto-Balance Using Bridged Midpoints and Coupled Inductor in a 3-L Buck-Boost Converter

Common-Mode Noise Reduction and Capacitor Voltage Auto-Balance Using Bridged Midpoints and Coupled Inductor in a 3-L Buck-Boost Converter

Balanced Two-phase Interleaved Boost Converter with Integrated Magnetics for Common-Mode Noise Reduction

Balanced Two-phase Interleaved Boost Converter with Integrated Magnetics for Common-Mode Noise Reduction

Common mode conductive noise cancellation for multiphase converter using auxiliary winding

AbstractA multiphase DC‐DC converter consisting of a coupled inductor and fast switching devices enables power electronics equipment to achieve a high‐power density. However, with such devices, the fast voltage transition generates substantial common mode (CM) noise. However, there are very few studies on CM noise reduction for multiphase converters using a coupled inductor. Therefore, in this paper, a CM noise reduction method is proposed for a multiphase DC‐DC converter that hardly lowers the power density.

Common Mode Conductive Noise Cancellation for Multiphase Converter Using Auxiliary Winding

A multiphase DC-DC converter consisting of a coupled inductor and fast switching devices enables power electronics equipment to achieve a high power density. However, with such devices, the fast voltage transition generates substantial common mode (CM) noise. However, there are very few studies on CM noise reduction for multiphase converters using a coupled inductor. Therefore, in this paper, a CM noise reduction method is proposed for a multiphase DC-DC converter that hardly lowers the power density.

Comments on “Common-Mode Noise Reduction by Parasitics Capacitance Cancellation in the Three-Phase Inverter”

This article comments on the published article titled “Common-mode noise reduction by parasitics capacitance cancellation in the three-phase inverter” authored by Zhang and Wu (2019). The three-terminal electromagnetic interference (EMI) filter can effectively suppress the EMI noise on the output side in the paper. The numerical analysis and the relationship of converting negative inductance into capacitance at high frequency are discussed in detail. Zhang and Wu (2019) presented a parasitic capacitance cancellation method to reduce the conducted emissions exiting a three-phase inverter. The idea of parasitic capacitance cancellation is not novel, and Wang and Lee (2007, 2010) originally applied it to reduce the common mode noise exiting a boost PFC converter. The parasitic capacitance cancellation of inductors is discussed in papers by Neugebauer and Perreault (2006) and Piboonwattanakit and Khan-Ngern (2008). These papers should be cited in the introduction and the references.

Common Mode Voltage Minimization for Generalized Dual Inverter-Fed Aircraft Starter/Generator: Realization and Sub-Load Asymmetry Influence Analysis

In multi-stages aircraft starter/generator system, the main machine (MM) and main exciter (ME) are fed by a generalized dual-inverter configuration, allowing for common-mode voltage (CMV) elimination. However, the distinction in load impedances and voltage requirements between the two sub-inverters has evidently contributed to the sub-load asymmetry, which may impair the suppression effect of system common mode (CM) noises. This paper presents a CMV minimization method for the generalized dual-inverter application. The available freedom, such as the selection and action sequence of voltage vectors, is appropriately arranged in the suggested implementation to eliminate the total CMV, restrict the sub-CMVs and fulfill the voltage requirements of sub-inverters all at the same time. In the meanwhile, a theoretical study is performed to evaluate the CM noise features of zero CMV technique in the generalized dual inverter-fed system. In the situation of sub-load asymmetry, the premise and main influence element for CM noise reduction are assessed. Finally, these findings are verified by simulation and experiments.

PCB Winding Coupled Inductor Design and Common-Mode EMI Noise Reduction for SiC-Based Soft-Switching Three-Phase AC–DC Converter

This article presents a PCB winding coupled inductor design for both high efficiency and effective common-mode (CM) noise reduction in a silicon carbide (SiC)-based soft-switching three-phase ac–dc converter. A balance technique is applied to reduce the CM noise, creating a return path with additional inductors. The inductors in the main circuit and return path are coupled in one core and implemented with PCB windings. A winding interleaving structure with strong coupling between the main inductors is selected to minimize the winding loss and to improve the converter efficiency; however, the interwinding capacitance brought on by the winding interleaving worsens the CM noise. An inductor model including the capacitance is introduced, and its impact on the CM noise is analyzed. A novel inductor structure is proposed to scale back the interwinding capacitance and to enhance the CM noise reduction capability. Experiments with a SiC-based 25-kW soft-switching three-phase ac–dc converter prototype validates the performances of the proposed PCB winding coupled inductors.

Mirror-Bridge Phase-Shift Modulation With Low Common-Mode Noise for Single-Phase CHB PFC

For ac/dc power conversion applications like server power supply, telecom power supply, and on-board charger of an electric vehicle, the rising electricity demand has presented challenges toward high efficiency and high power density. The cascaded H-bridge (CHB) based multilevel power factor correction (PFC) converter has much higher power density than that of traditional boost PFC converter. However, the CHB-PFC converter has multiple floating dc outputs, which leads to a common mode (CM) electromagnetic interference (EMI) issue due to the parasitic capacitance of cascaded dc/dc stages and layouts and distributed noise sources existing in the ac/dc system. Thus, a large EMI filter is necessary for the PFC system that sharply degrades the system's power density. In order to quantify the CM noise caused by the floating outputs and cascaded parasitic capacitance, a unified equivalent CM circuit model is derived in this article, which decouples the effects among the multiple CM noise sources in the CHB converter. Based on the derived circuit model, a mirror-bridge phase-shift modulation is proposed to cancel the CM noise within the CHB converter itself. A single-phase 2-kW CHB PFC prototype has been built up to verify the analysis, and 40-dB CM noise reduction compared with conventional unipolar modulation is achieved by the proposed modulation scheme.

1200 V/650 V/160 A SiC+Si IGBT 3L Hybrid T-Type NPC Power Module With Enhanced EMI Shielding

Three-level (3L) inverters suffer from higher parasitic inductance due to the increased number of series-connected switches in a single current commutation loop (CCL) results in a larger size of CCL compared to their two-level (2L) counterparts. As such, semiconductors are subjected to higher voltage stress and severe ringing at the switching transient. While silicon carbide's (SiC) faster switching speed improves overall efficiency by reducing switching loss, the faster voltage, and current gradient (dv/dt and di/dt) generate electromagnetic interference (EMI) noise, requiring a larger and complicated filter stage design. To solve this problem, an optimized 3L T-type neutral point clamped power module has been proposed with a hybrid combination of the switch (SiC mosfet + Si IGBT) rated for 1200 V/160 A. Two direct bonded copper (DBC) substrates have been stacked to have a vertical power loop using laser-drilled vias, which provides low commutation loop inductance as low as 4.6 nH for the major CCLs including the wire bond. Other associated CCLs have also been identified and optimized. Additional DBC in the package will be acting as an EMI shield. The EMI noise has been compared to a traditional power module and a 21 dB reduction of common-mode noise has been observed.

Facile Measurement of the Rotation of a Single Optically Trapped Nanoparticle Using the Diagonal Ratio of a Quadrant Photodiode

Optical tweezers are a powerful tool for exploring physical properties of particles in various environments through analysis of their dynamics in a trapping potential. Analysis of the trapped particle’s position is often done using interferometric back-focal-plane detection microscopy in which interference between the trapping laser and the light interacting with the trapped particle is projected on a quadrant photo-diode (QPD). The QPD measurements are almost universally the voltage ratios between the transverse components of the detector (left/right; up/down) that are calibrated to ascertain particle positions and orientations (i.e., rotation). In this paper, we demonstrate how measuring the diagonal ratio of the QPD allows tracking the spinning and orbital motion of optically trapped objects with enhanced sensitivity compared to the conventional transverse ratio and reveals additional information about particle dynamics. The diagonal ratio “balances” the signal from opposite sides of the QPD, allowing common mode noise reduction and increased measurement sensitivity of the rotating nanospheres at frequencies from below 200 Hz to above 15 kHz. We show that the variability in particle rotation rates is due to slight differences in the aspect ratio of the nanoparticles. We also measure in situ a gradual acceleration in the spinning frequency of trapped nanoparticles due to photothermal shedding of surface ligands and the resulting decrease of rotational friction in solution. The accelerating particles spin at rates exceeding 30 kHz and are eventually “optically printed” onto the glass coverslip on top of the liquid cell enclosure. The diagonal ratio is a simple, readily available, and powerful enabler for measuring rotational dynamics with a 5-fold sensitivity increase over conventional QPD measurements. This affords opportunities for controlling the orientational dynamics of trapped nanoparticles, which is crucial for various applications, including nanoscale mechanical motors.

Analysis and Suppression of Common-Mode EMI Noise in 1 MHz 380 V-12 V DCX Converter With Low NFoM Devices

For the thriving information technology industrial applications, the series resonant converter (SRC) dc transformer (DCX) using integrated printed circuit board (PCB) windings is a preferred candidate because of its high efficiency and high power density characteristics by pushing the frequency to megahertz. However, the planar PCB transformer possesses large interwinding capacitance, which leads to severe common-mode (CM) noise and a large electromagnetic interference filter. Hence, the total volume of the conversion system is still high. In this article, a series inputs and parallel outputs (ISOP) structure for DCX is analyzed and discussed to demonstrate the CM noise reduction with the static point construction method, in which several dv/dt static points are constructed. Unlike most of the present suppressing methods, it can maintain high efficiency as well. Additionally, the ISOP structure provides more opportunities for optimizing control strategies to achieve the cancelation effect and further reducing the CM noise by the interleaving within a cell and the interleaving among cells. The excellence of the aforementioned methods is verified by experiments on 1-MHz 380 V–12 V 1.8-kW SRC DCX prototypes with a peak efficiency of 98.3%. The proposed methods ultimately reduce the CM noise by 50 dB.

Common-Mode Noise Reduction in Noncontact Biopotential Acquisition Circuit Based on Imbalance Cancellation of Electrode-Body Impedance.

Biopotential sensing technology with electrodes has a great future in medical treatment and human—machine interface, whereas comfort and longevity are two significant problems during usage. Noncontact electrode is a promising alternative to achieve more comfortable and long term biopotential signal recordings than contact electrode. However, it could pick up a significantly higher level of common-mode (CM) noise, which is hardly solved with passive filtering. The impedance imbalance at the electrode-body interface is a limiting factor of this problem, which reduces the common mode rejection ratio (CMRR) of the amplifier. In this work, we firstly present two novel CM noise reduction circuit designs. The circuit designs are based on electrode-body impedance imbalance cancellation. We perform circuit analysis and circuit simulations to explain the principles of the two circuits, both of which showed effectiveness in CM noise rejection. Secondly, we proposed a practical approach to detect and monitor the electrode-body impedance imbalance change. Compared with the conventional approach, it has certain advantages in interference immunity, and good linearity for capacitance. Lastly, we show experimental evaluation results on one of the designs we proposed. The results indicated the validity and feasibility of the approach.

Common-Mode EMI Noise Analysis and Reduction for AC–DC–AC Systems With Paralleled Power Modules

In this article, the common-mode (CM) noise model is developed for an ac–dc–ac system with paralleled power modules. The CM noise contributions from both rectifiers and motor drives are analyzed. The interaction between the ac/dc rectifiers and dc/ac motor drives is explored. The CM noise reduction techniques which include a decoupling inductor technique and a CM noise balance technique are proposed to reduce the CM noise on the ac input side. Experiments and simulations were conducted to validate the developed CM noise model, rectifier and inverter interaction theory and CM noise reduction techniques.

Common Mode Noise Reduction of Three-Level Active Neutral Point Clamped Inverters With Uncertain Parasitic Capacitance of Photovoltaic Panels

SiC devices can upgrade the inverter performance to a new level by its potentially more than ten times higher switching speed compared to its Si counterpart. However, the high switching frequency and dv/dt, di/dt worsen the electromagnetic interference. Reduction of the common mode (CM) noise of the non-isolated photovoltaic (PV) inverters is addressed by many researchers through adding filters or balancing the circuit. However, most methods rely on the certainty of the parasitics in the system in advance. It is usually not practical for a PV inverter because the parasitic capacitance of PV panels that are to be installed in plants varies from case to case and further can be seriously affected by the damp environment. This article proposes a practical way to reduce the CM noise of the three-level active neutral point clamped (ANPC) inverters with uncertain parasitic capacitance of PV panels. First, the CM model of ANPC inverters with all parasitic capacitances is established. Next, most existing hardware-based reduction methods of the CM noise are summarized based on a unified mathematical model and further compared with each other. After the comparison, a practical method is proposed to reduce the CM noise of the ANPC inverter with uncertain parasitic capacitances, which just adds little volume and cost to the whole system. Finally, the simulation and experiments are conducted to validate the proposed method.

Common-mode Noise Reduction Circuit Design for Biosignal Acquisition System—in Comparison with the DRL

Common-mode Noise Reduction Circuit Design for Biosignal Acquisition System—in Comparison with the DRL

Analysis and Reduction of the Near Magnetic Field Emission From Toroidal Inductors

The near magnetic field emitted from magnetic components may generate electromagnetic interference (EMI) and degrade EMI filter's performance. This article discussed the near magnetic field emission from toroidal inductors. The emission mechanisms are analyzed for different inductor winding structures with either common-mode (CM) or differential-mode (DM) excitation. The winding structures with low near magnetic field emission are identified. A CM inductor structure is proposed to improve inductor's high-frequency CM performance and greatly reduce its near magnetic field emission due to DM currents. The improvements are achieved with a small extra toroid. The proposed structure can also increase CM inductor's DM inductance for DM noise reduction at the expense of a reduced DM saturation current. To avoid saturation, a design procedure is developed for the proposed CM inductor to achieve desired CM inductance, minimized near magnetic field emission, high DM inductance, and optimal magnetic flux density. Three-dimensional (3-D) finite-element analysis models were developed and experiments were conducted to validate the developed theory and techniques. EMI measurement results show that the proposed CM inductor has a better performance for both DM and CM noise reduction than a conventional CM inductor.

Equivalent Parallel Capacitance Cancellation of Common Mode Chokes Using Negative Impedance Converter for Common Mode Noise Reduction

Equivalent Parallel Capacitance Cancellation of Common Mode Chokes Using Negative Impedance Converter for Common Mode Noise Reduction

Common mode EMI reduction through PWM methods for three-phase motor controller

Pulse-width sequences are identified as the determining factor for common-mode (CM) voltage, which together with CM path generate CM current. This paper introduces a series of pulse-width modulation (PWM) methods, which are focusing on reducing CM noise of three-phase inverters as motor controller. Firstly, theoretic analysis and PWM reduction methods of CM voltage for general three-phase two-level inverters are introduced. Analysis results indicate that the realization of CM noise reduction should take switching frequency and loop impedance into consideration together to avoid CM resonant phenomenon. The regular three-phase two-level inverter is incapable of eliminating CM voltage because of the limitation of topology. Then, optimal PWM methods applied to for advanced topologies can be utilized to eliminate the CM voltage theoretically. Two typical typologies presented in this paper are three-level inverters and paralleled inverters. Three-level inverters can achieve zero-CM output voltage by selecting zero-CM voltage vectors at the expense of power quality. However, for paralleled inverters, zero-CM PWM method is able to achieve zero CM voltage output, as well as the improved output current harmonics and voltage balancing.

Low Common Mode Noise Half-Bridge <italic>LLC</italic> DC–DC Converter With an Asymmetric Center Tapped Rectifier

Half-bridge LLC dc–dc converter is popular in electric vehicle on-board charger due to its soft switching, high-power density, and low cost. But, it also has serious electromagnetic interference problems in that the half-bridge structure brings asymmetry common mode (CM) noise source by switching. So, this letter proposes an asymmetric center tapped rectifier (ACTR) to reduce the CM noise in half-bridge LLC without additional components. With ACTR, the CM noise source on primary winding is cancelled by CM noise sources on secondary windings. The CM noise reduction of the proposed ACTR is verified by a 1.1-kW half-bridge LLC prototype with 800 V input and 300–450 V output.