Common-mode Current Research Articles

Online Condition Monitoring of Line-End Coil Insulation for Inverter-Fed Machine by Switching Oscillation Mode Decomposition

Online condition monitoring of winding insulation has been proved to be an effective means to improve the reliability of an inverter-fed machine, but little work has been done on the insulation of line-end coil subjected to much higher transient voltage stress with a higher risk of premature insulation break down. In this article, the inverter self-excited high-frequency switching oscillations are utilized for the line-end coil insulation condition monitoring. To improve the condition monitoring sensitivity and its robustness to dynamic operating conditions, a switching oscillation mode decomposition method is proposed. First, the condition-sensitive mode, i.e., high-frequency common-mode (HFCM) current is selected and separated by the variation mode decomposition algorithm among three dominant modes in switching oscillation current. Then, the amplitude-frequency features of HFCM current are extracted for condition monitoring. Finally, the overall insulation condition of three-phase line-end coils and the degree of asymmetric degradation are quantitatively evaluated by the frequency and amplitude features respectively. Experimental work was carried out and the results demonstrate the good performance of high sensitivity, good robustness, and non-contract safety.

Common-Mode Voltage Mitigation Strategies Using Sigma–Delta Modulation in Five-Phase VSIs

Various sigma–delta ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Sigma$</tex-math></inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta$</tex-math></inline-formula> ) modulation techniques for reducing the maximum peak-to-peak amplitude of common-mode voltage (CMV) by 80% in a five-phase, high-frequency voltage source inverter (VSI) are proposed and evaluated in this article. These techniques are based on choosing a set of vectors that limits the CMV amplitude. Operating the VSI under high-frequency pulsewidth modulations (PWM) generates a large number of changes in the CMV levels, which leads to common-mode currents (CMCs) and conducted electromagnetic interferences (EMIs). The proposed modulation techniques achieve the following: 1) High-efficiency converter operation and output voltage with low total harmonic distortion (THD); 2) an 80% reduction in CMV peak-to-peak amplitude; 3) a decrease in the number of the CMV transitions, thus reducing the CMCs; and 4) a decrease in the conducted EMI amplitude. The use of single-loop and double-loop <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Sigma$</tex-math></inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta$</tex-math></inline-formula> modulators is analyzed by means of Matlab/Simulink and PLECS simulations. The implementation of the proposed modulation techniques has been experimentally evaluated using a five-phase VSI with silicon carbide semiconductors. In order to demonstrate the improved performance, the results obtained are compared with those of other PWM and space vector modulation techniques that also mitigate the CMV amplitude by 80% but lack the other improvements.

Overview of Recent Advanced Topologies for Transformerless Dual-Grounded Inverters

Transformerless inverters, most of which are H-bridge inverters, have been widely used and studied in grid-connected power systems in the last decades. However, the H-bridge inverter is affected by the low- and high-frequency common-mode voltage between the input and output terminals, resulting in a large common-mode leakage current. An alternative solution is to connect the ground of the input terminal to the output load or grid, that is, the dual-grounded inverter. In this case, the low- and high-frequency common-mode voltages can be mitigated or eliminated. As a matter of fact, scholars have made several research results on dual-grounded inverters. However, as of now, there is still no literature that comprehensively and systematically summarizes these research results. To fill this gap, this article classifies different types of dual-grounded inverters from the perspective of topology for the first time, and compares and summarizes their advantages and disadvantages. More than 60 works of literature have been reviewed to identify the practical implementation challenges and research opportunities in the application of dual-grounded inverters.

Transmission Line Modeling and Crosstalk Analysis of Multibraided Shielded TWP/Twinax Cables

In this article, the transmission line model of multibraided shielded cables is improved by including the proximity effect in the shield model. This is performed by deriving the analytical expressions of the transfer impedance and admittance of a shielded structure with nonuniform current distribution around the shield surfaces. After that, the formulations are generalized to be applicable for shielded twisted-wire pair (TWP) and twinax cables with line apertures and braided structure with nonuniform shield current. It is found that the nonuniform distribution of the currents in the outer and inner shield surfaces have high effects on the inner induced common-mode and differential-mode currents of braided shielded cables. In addition, the crosstalk between multishielded TWP and twinax cables is investigated in detail, indicating that the proximity effects between the shields have a critical impact on generating the crosstalk between the shielded cables. The proposed model is validated with the commercial software FEKO and excellent agreements are achieved.

Effect of Choke Placement on Common-Mode Noise in Three-Phase Variable Speed Drives

Three-phase variable speed drives play a key role in energy conversion systems. To comply with the electromagnetic compatibility standards for the 0–2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\text{kHz}$</tex-math></inline-formula> frequency range, magnetic chokes are typically placed at the dc or ac sides of the drive systems. Recently, compatibility levels have been defined at 9–150 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\text{kHz}$</tex-math></inline-formula> for the public network in accordance with IEC 61000-2-2. At this frequency range, common-mode noise is an important factor affecting electromagnetic compatibility. This article analyzes the effect of choke placement on common-mode noise at the 9–150 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\text{kHz}$</tex-math></inline-formula> frequency range. In particular, a comparative study on choosing either two dc-link choke inductors or three ac-line inductors is carried out via mathematical calculations. To this end, single-phase common-mode equivalent models are extracted for each placement of dc and ac chokes. Subsequently, by calculating the transfer functions of the currents in the single-phase equivalent circuits, the attenuation rate of common-mode currents from the motor to the grid side is analytically modeled for each choke configuration. The developed theories prove that ac-line inductors are more effective at suppressing low-frequency common-mode contents, while dc chokes are useful in attenuating high-order noise contents. Laboratory test results are used to prove the validity of the presented theoretical modeling and analysis.

Analysis of a Photovoltaic System Based on a Highly Efficient Single-Phase Transformerless Inverter

The essential requirement for a cleaner environment, along with rising consumption, puts a strain on the distribution system and power plants, reducing electricity availability, quality, and security. Grid-connected photovoltaic systems are one of the solutions for overcoming this. The examination and verification of transformerless topologies and control techniques was a significant goal of this study. The transformerless concept is advantageous for its high efficiency; the transformerless converter has added advantages of reduced price, complexity, weight, and size. This study presents a novel high-efficiency transformerless architecture that does not create common-mode currents and does not inject DC current into the grid. A single-phase transformerless inverter circuit with two step-down converters was constructed in this study. Low-frequency switches determine the polarity of the grid connection. In order to control the gate pulses of switching devices, which each regulate a half-wave of the output current, a PIC 16F877 was employed. Because there were fewer semiconductors and they were simpler to operate, it was possible to achieve a high degree of efficiency and reliability. A prototype model with input 12 V, 2 A was fabricated, test results were obtained with reduced common-mode current and DC current, and high efficiency was obtained with reduced switching losses. Further investigation for the improvement of efficiency with the elimination of ground current and leakage current has been analysed through simulation.

Boost-type common-ground PV inverter based on quasi-Z-source and switched-capacitor

Common-ground type of transformerless photovoltaic (PV) inverters is an effective means to eliminate common-mode leakage current. Recent years, switched-capacitor (SC) technique with the advantage of voltage boosting has been successfully used in this field. In order to inherit the merits of SC-based common-ground PV inverters, and to further improve the performance in the aspects of inrush charging current, input current quality and boost capability of SCs, a new boost-type common-ground (BCG) inverter is developed by inserting a quasi-Z-source (qZS) unit in an SC-based common-ground inverter. Specifically, an SC unit employed in the BCG inverter is fed by the qZS circuit rather than a voltage source, so that the inrush charging current is effectively limited by inductors of the qZS unit. Meanwhile, the boost capacity is further improved and the input current has been continuous. Both circuit configurations of single-phase and three-phase as well as their operation principle and modulation are analyzed in detail. Especially in the three-phase configuration, only one qZS unit is used to feed three SC units and the input current is almost constant. The feasibility of the proposed BCG inverter is experimentally verified by a downscale three-phase prototype.

Experimental Assessment of Induction Motors Fed by Sub-MHz-PWM Wide Band Gap Inverters

Three phase inverters with switching frequencies above 100 kHz have recently become feasible thanks to the significant progress made in wide band gap (WBG) semiconductor technology. The main drivers behind the intense research and development of these ultrahigh switching frequency pulsewidth modulation (PWM) inverters are the extraordinary gravimetric and volumetric power densities that can be achieved. On the other hand, not as much attention has been devoted to the loads that these inverters supply, quite frequently consisting in ac motors. The impact of sub-MHz PWM and of the associated tens of nanoseconds range switching transients on motor terminal overvoltage, common mode currents, and losses are still to be discussed exhaustively. The authors have thus decided to investigate what happens to induction motors (IM) supplied by inverters having switching frequencies up to 350 kHz. After an introduction on WBG semiconductor devices, the article presents some interesting experimental observations conducted on a 1.1 kW four-pole IM fed by a silicon carbide (SiC) inverter. Further insight is provided by tests on a laminated steel toroid, supplied by a single-phase full bridge SiC inverter. Discussions on the experimental results highlight the previously unreported impact of common mode losses, which become a predominant part of the PWM harmonic losses.

Common-Mode Current Analysis and Cancellation Technique for Dual Active Bridge Converter Based DC System

This article presents an active neutral point clamped (ANPC)-based parallel dual-active bridge (DAB) architecture which combines <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> cancellation and power sharing in order to reduce electromagnetic interference (EMI) caused by common-mode (CM) current. High <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> associated with wide bandgap devices causes high CM current mainly due to parasitic capacitances. The corresponding conducted EMI can remarkably reduce the reliability of power converters and other onboard systems. This issue becomes worse due to higher dc bus voltage trend in electric vehicles (EV) and other dc systems. Conventional techniques struggle to provide attenuation in a wide frequency range. The problem can also be severe in soft-switched DAB converters as they operate at relatively higher frequencies. In this article, initially, an in-depth theoretical analysis is provided to understand the complimentary <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> events. Various factors causing nonideal <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> cancellation are discussed in detail together with possible solutions. Detailed experimental results are obtained from a 1100 V–150 V parallel DAB system including both the high and low voltage sides at different <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> rates. <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> cancellation at lowered <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> rates facilitated by power sharing and small snubbers provide up to 25 dBuA reduction in CM conducted EMI. A comparison with CM chokes is also presented to validate improved attenuation in a wide frequency range.

Analysis of the THD and Common-Mode Voltage of the Three-Phase Boost-Buck EV Traction Inverter

A three-phase boost-buck inverter (BBI) comprised of three identical boost-buck DC/DC converter modules is presented for an EV traction inverter application. It allows the step-up and/or step-down of the battery pack voltage according to the operating condition of the traction motor so that the overall performance can be optimized, which is essential for EVs with relatively low and varying battery voltages such as a hybrid EV or fuel-cell EV. It also features low switching losses, low harmonic distortion in the output current, and reduced common-mode voltage and/or current. A detailed analysis and performance evaluation of the BBI compared to the conventional technology demonstrate its feasibility in EV traction applications. The functionality and performance of the boost-buck inverter are verified with simulation and experimental results.

Dual-Tuned Lattice Balun for Multi-Nuclear MRI and MRS.

Balun or trap circuits are critical components for suppressing common-mode currents flowing on the outer conductors of coaxial cables in RF coil systems for Magnetic Resonance Imaging (MRI) and Magnetic Resonance Spectroscopy (MRS). Common-mode currents affect coils' tuning and matching, induce losses, pick up extra noise from the surrounding environment, lead to undesired cross-talk, and cause safety concerns in animal and human imaging. First proposed for microwave antenna applications, the Lattice balun has been widely used in MRI coils. It has a small footprint and can be easily integrated with coil tuning/matching circuits. However, the Lattice balun is typically a single-tuned circuit and cannot be used for multi-nuclear MRI and MRS with two RF frequencies. This work describes a dual-tuned Lattice balun design that is suitable for multi-nuclear MRI/MRS. It was first analyzed theoretically to derive component values. RF circuit simulations were then performed to validate the theoretical analysis and provide guidance for practical construction. Based on the simulation results, a dual-tuned balun circuit was built for 7T 1H/23Na MRI and bench tested. The fabricated dual-tuned balun exhibits superior performance at the Larmor frequencies of both 1H and 23Na, with less than 0.15 dB insertion loss and better than 17 dB common-mode rejection ratio at both frequencies.

Single-Phase Rectifier With Reduced Common-Mode Current, Auto-PFC, and Power Decoupling Ability

Transformer and electrolytic capacitors (Ecaps) in light-emitting diode (LED) drivers lead to increased cost and shortened lifespan. Therefore, eliminating the transformer and Ecaps of the LED driver can not only achieve a lightweight design but also extend the service life. In this article, a novel single-phase transformerless capacitorless power factor correction rectifier is proposed. The proposed topology shares a common ground with the grid and the load. Thus, the reduced common-mode current is obtained, and the demand for an isolation transformer is eliminated. In addition, this article presents a unidirectional active buffer circuit to isolate the pulsating power, and the capacitor of the buffer circuit is multiplexed as an output filter. Compared with similar works, a lower voltage on the decoupling capacitor, fewer power components, and a simple control unit are obtained. Then, the operation principle and switching modes as well as the parameter design and implementation of the control strategy are elaborated systematically. Finally, an 80-W experimental prototype is built, and the experimental results confirm the feasibility of the proposed rectifier by reaching the efficiency up to 97.1% and the power factor to 0.984 at a wide range of operating voltage.

A Novel Structure for Transformerless Grid-Connected PV Inverter to Eliminate Common-Mode Current under Mismatch Condition

Common-mode current is one of the major challenges in transformerless grid-connected photovoltaic (PV) inverters. This current is affected when the PV arrays are exposed to different environmental conditions and its value increases. This paper attempts to investigate the effect of mismatched condition on voltage balance of PV arrays, which leads to the increment of common-mode current. A new circuit structure is presented for compensating for voltage drop caused by partial shading and ambient temperature and removing the effect on the common-mode current. To validate the proposed structure, a laboratory prototype of this circuit is implemented.

Calibration loop antenna for 5G OTA measurement systems

The advent of the fifth generation New Radio (5G NR) is pushing toward an extension of the traditional Sub-6G communication bands to 6 GHz and above. Such trend calls for an update of multi-probe measurement systems for an accurate Over-The-Air (OTA) characterization of such new devices. The new measurement requires the precise calibration of the measurement system within a frequency band beyond the traditional 6 GHz limit. Thus, a new calibration antenna working over 6 GHz is required, which should achieve an adequate comprehensive behavior in terms of suppression of common mode current, small gain ripple and good impedance matching. In order to meet this objective, an analytical expression is proposed in this paper to optimize each of the above aspects of the calibration loop antenna. Based on the proposed objective function, a calibration loop antenna operating at 5.9–7.12 GHz is designed. The proposed design is made of six Vivaldi antennas with a compact size of 35 × 35 × 1.524 mm. In order to effectively suppress the common mode current, a three-layer PCB is designed to reduce the mutual coupling between the antenna and coaxial cable. Slotted balun structures and arc slots are designed on each Vivaldi antenna radiator to lower the gain variation to 0.2 dB or less in the horizontal plane as well as further suppress the interference of the cable. Measurement results reveal that the proposed calibration loop antenna achieved a radiation performance similar to the standard antennas, but with a higher bandwidth of 19%, since it is characterized by |S11| <−10 dB between 5.9 and 7.12 GHz, a small gain ripple less than 0.2 dB as well as a high cross-polarization ratio larger than 27 dB.

A Five-Level Torque Controller Based DTC Scheme for Open-End Winding Five-Phase IM Drives With Single DC Source and Auxiliary Plane Harmonic Elimination

This article presents a new five-level torque hysteresis based direct torque control scheme for dual inverter fed five-phase induction motor drives with open-end stator windings. Three voltage levels required to implement the five-level torque hysteresis controller are generated by combining the appropriate voltage vectors of the two inverters. The proposed scheme ensures that the harmonic voltages in the nontorque producing auxiliary plane are nullified in every switching period. Since the switching voltage vectors are realized using adjacent and nonadjacent line voltages, the magnitude of the voltage appearing across the windings is much higher compared to the conventional star connected five-phase drive, for the same dc link voltage. This feature reduces the dc link voltage requirement substantially for a given motor voltage. The switching scheme employed prevents circulation of common mode currents even when a common dc source is used for feeding both inverters. The proposed scheme is experimentally verified on a five-phase induction motor drive with open end stator windings. The control scheme is implemented using TMS320F28335 digital signal controller.

Effect of PWM schemes on the performance and common-mode current of the proposed modified seven-level H-bridge inverter

In this paper, modified H-bridge seven-level inverter topology is proposed. The performance of the proposed topology is evaluated in terms of the THD and the fundamental component of the output voltage for open-loop operation and in terms of common mode current for the connected grid system. Implementation feasibility of different PWM techniques and their effect on the performance of the topology has been performed. The PWM switching based on a high frequency is used; as high-frequency PWM technique reduces the THD in the output voltage. The analysis shows that the alternate phase opposite disposition (APOD-PWM) based on a triangular carrier scheme offers the minimum THD of 15.72% for the unity modulation index while operating in an open loop, and in phase disposition (IPD-PWM) triangular carrier scheme offers the minimum common mode current of 222 mA. Also, the output voltage decreases and the fundamental component increases with increment in modulation index is observed. Results obtained show that the topology has low THD as well as common mode current is well within limits for grid-tied applications.

Loop Antennas for Accurate Calibration of OTA Measurement Systems: Review, Challenges, and Solutions

The E-field and H-field standard antennas are commonly used for calibration of measurement systems in various test applications. The standard H-field antenna is a horizontally polarized omnidirectional probe antenna, with its radiated electromagnetic field being like that of an ideal virtual magnetic dipole. A H-field antenna is physically realized by a consistent current loop fed through a coaxial cable, thus is often referred to loop antenna. This review paper offers a careful description of all aspects involved in the design of a loop calibration antenna; specifically, the concept of a calibration loop antenna is introduced, the state of the art and the recent advances of loop antenna designs and performances are reviewed. The design of a calibration loop antenna needs to take into account comprehensive indicators such as gain ripple, common mode current, cross polarization, impedance matching and radiation pattern. A design of this type of calibration antenna is a challenging task since all the above aspects need to be taken into account simultaneously to find the best trade-off among them. In the context of the example calibration loop antennas, the techniques to improve the bandwidth, the performance of omnidirectional radiation and the effects of suppressing common-mode current are discussed, which provides new ideas for the design of calibration loop antennas. Finally, the principles and steps of the horizontal polarization calibration in the multi-probe anechoic chamber is introduced and discussed; the errors caused by the common mode current to the calibration results are evaluated through calibration examples to demonstrate the relevant impact of a well-designed loop antenna for the accurate calibration of a multi-probe measurement system, and the subsequent precise evaluation of the performances of the antenna under test (AUT).

Effect of PWM schemes on the performance and common-mode current of the proposed modified seven-level H-bridge inverter

Effect of PWM schemes on the performance and common-mode current of the proposed modified seven-level H-bridge inverter

Space Vector Modulation (SVM)-Based Common-Mode Current (CMC) Reduction Method of H8 Inverter for Permanent Magnet Synchronous Motor (PMSM) Drives

This paper proposes a space vector modulation (SVM)-based common-mode (CM) currents reduction method of an H8 inverter for permanent magnet synchronous motor (PMSM) drives. There are power quality issues in the PMSM drive systems, such as current distortions and CM electromagnetic interference (EMI) due to the fast-switching operation of the inverter. These issues are related to CM voltage (CMV) and CM current (CMC). Although several studies have been conducted to reduce the CMV and CMC, some CMV variations and CMCs are still generated in the real implementation. Unlike conventional methods, the proposed method selects the voltage vectors with similar CMV levels and arranges them considering the series-connected switch operation of the H8 inverter in a voltage vector modulation sequence. At a low modulation index (MI), the proposed method completely restricts the CMV variations into six times. At high MI, the proposed method synthesizes the reference voltage vector differently, depending on the position of the reference vector, to reduce both current distortions and CMCs. The validity of the proposed method is verified through simulations and experimental results.

Transmission Line Model for a Shielded TWP With Apertures and Generalization to Braided–Shielded TWP Cables

An efficient multiconductor transmission line (MTL) model of a shielded twisted wire pair (TWP) with apertures on its sheath is developed for predicting common mode (CM) and differential mode (DM) currents induced in the shielded TWP cable. Its transfer impedance and admittance with one-line apertures on its sheath are derived in a closed form. Therefore, the MTL equations are formulated and solved to obtain the CM and DM currents induced in the shielded TWP. Moreover, the proposed MTL model is generalized to be applicable for the braided–shielded TWP, in which the transfer impedance and admittance are formulated analytically. Results showed that the induced DM current inside the braided–shielded TWP is suppressed dramatically due to the uniform structure of the cable. The models are validated by comparing their results with those obtained by the commercial software FEKO; good agreements are obtained.