Commercial Complementary Metal Oxide Semiconductor Research Articles

Manufacturing and measurement of CMOS-MEMS-based micro thermoelectric generators with long-length thermocouples

The study explores the fabrication and evaluation of a micro thermoelectric generator (MTG) with long-length thermocouples (TCs) through the utilization of a commercial complementary metal oxide semiconductor process. The MTG consists of 23 TCs, and its performance is intricately linked to the temperature difference (T diff) between the cold and hot sides of these TCs. An increase in T diff leads to higher output voltage and power for the MTG. To enhance T diff, the TCs are designed to be 700 µm in length, and an innovative design has been implemented on the cold side of the TCs, creating a suspended structure to improve heat dissipation A post-process is essential for achieving this suspended TC structure. The results demonstrate that the TC structure is fully suspended and remains undamaged. The measured outcomes reveal an output voltage of 13.8 mV when the T diff reaches 3.5 K. Under these conditions, the MTG exhibits a voltage factor of 2.76 mV mm−2K−1. Furthermore, at a T diff of 3.5 K, the maximum output power reaches 2.1 nW. The MTG demonstrates a power factor of 0.12 nW mm−2 K−2.

Manufacturing and characterization of CMOS-MEMS magnetic field microsensors with isolated cavities

The study investigates a magnetic field (MF) microsensor with isolated cavities manufactured utilizing complementary metal oxide semiconductor (CMOS)-microelectromechanical system technology. This microsensor, which is a type of magnetic transistor, comprises four identical magnetic sensing elements, each featuring an emitter, a base, two collectors, and an additional collector. The magnetic transistor operates on the principles of the Lorentz force. This force is employed to modulate the electrical properties of the transistor, responding to changes in the surrounding MF. The MF microsensor chip is fabricated using the commercial CMOS process. Upon completing the CMOS process, post-processing is employed to etch the silicon substrate of the microsensor chip, generating isolated cavities on the silicon substrate. These isolated cavities effectively mitigate substrate leakage current, enhancing the sensitivity of the MF microsensor. The experimental results reveal that the sensitivity of the microsensor without isolated cavities is 60 mV T−1. In contrast, the microsensor with isolated cavities exhibits a sensitivity of 121 mV T−1. A comparison between microsensors with and without isolated cavities depicts that the sensitivity of the MF microsensor with isolated cavities doubled.

Scaling comb-driven resonator-based DWDM silicon photonic links to multi-Tb/s in the multi-FSR regime

The use of chip-based micro-resonator Kerr frequency combs in conjunction with dense wavelength-division multiplexing (DWDM) enables massively parallel intensity-modulated direct-detection data transmission with low energy consumption. Resonator-based modulators and filters used in such systems can limit the number of usable wavelength channels due to practical constraints on the maximum achievable free spectral range (FSR). In this work, we introduce the design of multi-Tb/s comb-driven resonator-based silicon photonic links by leveraging the multi-FSR regime. We demonstrate the viability of the link architecture with yield estimates that are supported by extensive wafer-scale measurements of 704 micro-resonators fabricated in a commercial complementary metal–oxide–semiconductor foundry. We show that a 2.80 Tb/s link is realizable with a ≥6σ yield (∼99.999%), and that aggregate bandwidths of 3.76 Tb/s and 4.72 Tb/s are possible if yield targets are relaxed (3σ and 1σ, respectively). All designs represent a 1.94−3.28× boost to aggregate link bandwidth while maintaining BER≤10−10 performance, with a theoretical bandwidth of 10.51 Tb/s being possible for sufficiently robust resonators. We use high-speed BER measurements to inform co-optimization of data rate and aggressor spacing (λag), limiting any additional loss-based power penalties to off-resonance insertion loss (IL) and routing loss. This work demonstrates that, through the multi-FSR regime, there is a clear path toward Kerr comb-driven ultra-broadband, high bandwidth silicon photonic links that can support next-generation data centers and high-performance computers.

Design and Measurement of Microelectromechanical Three-Axis Magnetic Field Sensors Based on the CMOS Technique.

The design, fabrication, and measurement of a microelectromechanical system (MEMS) three-axis magnetic field sensor (MFS) based on the commercial complementary metal oxide semiconductor (CMOS) process are investigated. The MFS is a magnetic transistor type. The performance of the MFS was analyzed employing the semiconductor simulation software, Sentaurus TCAD. In order to decrease the cross-sensitivity of the three-axis MFS, the structure of the MFS is planed to accommodate two independent sensing components, a z-MFS utilized to sense magnetic field (M-F) in the z-direction and a y/x-MFS composed of a y-MFS and a x-MFS to be utilized to sense M-F in the y- and x-directions. The z-MFS incorporates four additional collectors to increase its sensitivity. The commercial 1P6M 0.18 μm CMOS process of the Taiwan Semiconductor Manufacturing Company (TSMC) is utilized to manufacture the MFS. Experiments depict that the MFS has a low cross-sensitivity of less than 3%. The sensitivities of z-, y-, and x-MFS are 237 mV/T, 485 mV/T, and 484 mV/T, respectively.

3-D Printed Rectangular Waveguide 123–129 GHz Packaging for Commercial CMOS RFICs

This work demonstrates the hybrid integration of a complementary metal–oxide–semiconductor (CMOS) radio frequency integrated circuit (RFIC) into a host 3-D printed metal-pipe rectangular waveguide (MPRWG). On-chip Vivaldi antennas are used for TE10-to-thin-film microstrip (TFMS) mode conversion. Our packaging solution has a combined measured insertion loss of only 1 dB/transition at 126 GHz. This unique packaging and interconnect solution opens up new opportunities for implementing low-cost subterahertz (THz) multichip modules.

A Wideband and Low-Power Distributed Cascode Mixer Using Inductive Feedback.

A wideband and low-power distributed cascode mixer is implemented for future mobile communications. The distributed design inspired by the distributed amplifier (DA) enables a mixer to operate in a wide band. In addition, the cascode structure and inductive positive feedback design allow high conversion gain with low-power consumption. The proposed mixer is fabricated using a 130 nm commercial complementary metal-oxide-semiconductor (CMOS) process. It consists of three cascode gain cells and operates with a drain voltage of 1.5 V and a gate voltage of 0.5 to 0.7 V. The fabricated mixer exhibits conversion gain of -2.9 to 3.1 dB at the radio frequencies (RFs) of 4 to 30 GHz and -1.9 to 0.4 dB at RFs of 54 to 66 GHz under the conditions of 8 to 10 dBm of local oscillator (LO) power and 650 MHz of intermediate frequency (IF). The LO-RF isolation is more than 15 dB over the entire measurement band (0.2 to 67 GHz) as the RF and LO signals are applied to different transistors owing to the cascode structure. The total power consumption is only within 12 mW, and the chip size is 0.056 mm2, making it possible to implement a compact mixer. The proposed mixer shows broadband characteristics covering from ultra-wideband (UWB) and the 28 GHz fifth-generation (5G) communication band to the 60 GHz wireless gigabit alliance (WiGig) band.

Radioluminescence imaging feasibility for robotic radiosurgery field size quality assurance.

To investigate the feasibility of radioluminescence imaging (RLI) as a novel 2D quality assurance (QA) dosimetry system for CyberKnife®. We developed a field size measurement system based on a commercial complementary metal oxide semiconductor (CMOS) camera facing a radioluminescence screen located at the isocenter normal to the beam axis. The radioluminescence light collected by a lens was used to measure 2D dose distributions. An image transformation procedure, based on two reference phantoms, was developed to correct for projective distortion due to the angle (15°) between the optical and beam axis. Dose profiles were measured for field sizes ranging from 5 mm to 60 mm using fixed circular and iris collimators and compared against gafchromic (GC) film. The corresponding full width at half maximum (FWHM) was measured using RLI and benchmarked against GC film. A small shift in the source-to-surface distance (SSD) of the measurement plane was intentionally introduced to test the sensitivity of the RLI system to field size variations. To assess reproducibility, the entire RLI procedure was tested by acquiring the 60mm circle field three times on two consecutive days. The implemented procedure for perspective image distortion correction showed improvements of up to 1 mm using the star phantom against the square phantom. The FWHM measurements using the RLI system indicated a strong agreement with GC film with maximum absolute difference equal to 0.131 mm for fixed collimators and 0.056 mm for the iris. A 2D analysis of RLI with respect to GC film showed that the differences in the central region are negligible, while small discrepancies are in the penumbra region. Changes in field sizes of 0.2 mm were detectable by RLI. Repeatability measurements of the beam FWHM have shown a standard deviation equal to 0.11mm. The first application of a RLI approach for CyberKnife® field size measurement was presented and tested. Results are in agreement with GC film measurements. Spatial resolution and immediate availability of the data indicate that RLI is a feasible technique for robotic radiosurgeryQA.

Characterization of gamma-ray-induced radiation effects on a commercial CMOS sensor for x-ray small satellites

Commercially manufactured complementary metal–oxide–semiconductor (CMOS) sensors have demonstrated competitive x-ray spectral imaging performance to the charge-coupled devices flown on the Suzaku and Chandra missions without the cooling demands required of these sensors. This performance, in combination with their reduced costs, warrants regarding CMOS sensors as promising candidates for low-Earth orbit (LEO) x-ray small satellites. We investigate the radiation tolerance of these devices to the anticipated total ionizing dose (TID) radiation expected in LEO. We expose a backside-illuminated Sony IMX290LLR CMOS sensor to up to 12 krad of TID from Cs137 gamma-ray radiation. We find an increase in the abundance of noisy pixels with increasing dosage, but no discernible increase in the average dark signal or RMS noise. Measurements of the x-ray spectrum from a Fe55 source indicate no change in spectral resolution and only minor gain degradation with TID.

Fabrication of highly sensitive and uniform Ag/PS/PDMS SERS substrate and its application for in-situ detection

In this study, we developed a flexible and transparent silver/polystyrene/polydimethylsiloxane (Ag/PS/PDMS) substrate with both high density of hot spots and satisfactory uniformity using a cost-effective approach. Via template-guided self-assembly, PS beads were arranged regularly in nanobowls of a square array on PDMS, whose surface structure was transferred from a commercial complementary metal oxide semiconductor chip. Roughness was introduced onto the PS bead surface by nitrogen plasma treatment, followed by sputtering of Ag which generated many hot spots. Differential roughness on the PS bead surface greatly influenced the morphology of the Ag/PS/PDMS substrate. A meat-ball like surface structure was formed with a plasma etching time of 5 min, whose growth mechanism was proposed based on the scanning electron microscope analysis. The high sensitivity and desirable uniformity of the meat-ball like Ag/PS/PDMS substrate were demonstrated by using crystal violet as a Raman reporter, exhibiting an enhancement factor of 2.7 × 107 and a relative standard deviation of 5.04%. Thiram of a lower concentration than the maximum residue limit on the cucumber surface could easily be detected in situ by the proposed substrate, demonstrating its great potential for in-situ food safety analysis.

A W-Band Compact Substrate Integrated Waveguide Bandpass Filter With Defected Ground Structure in CMOS Technology

This brief proposes the first on-chip bandpass filter (BPF) based on substrate integrated waveguide (SIW) for W-band applications. Slot-loaded, folded ridge and quarter mode technology is used to reduce the cavity size. The coupling characteristic of two folded ridged quarter mode substrate integrated waveguide (QMSIW) cavities implemented in CMOS technology is investigated. A simplified equivalent lumped-element circuit model of the proposed wide-band BPF approach is provided and applied to study the coupling characteristic of slot-loaded folded ridged QMSIW cavity. Then, a novel coupling method using a defected ground structure is proposed to realize a proper coupling intensity for BPF design. Finally, the proposed BPF design is implemented in a commercial complementary metal-oxide-semiconductor (CMOS) technology, fabricated, and measured. The active size of the proposed cavity resonator is only 405 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}\,\,\times185\,\,\mu \text{m}$ </tex-math></inline-formula> ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.22{\lambda }_{\mathrm{ g}} \times 0.1 \lambda _{\mathrm {g}}$ </tex-math></inline-formula> ), and the measured insertion loss ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\vert|\text{S}_{21}~\vert|$ </tex-math></inline-formula> ) is 3.15 dB with a central frequency of 85.5 GHz.

Single event transient effect of frontside and backside illumination image sensors under proton irradiation

Complementary metal oxide semiconductor (CMOS) image sensor is susceptible to proton single event effect when being applied to space environment. Proton irradiation experiments with different energy values are carried out on a commercial FSI and BSI CMOS image sensors. The proton single event effect is analyzed by on-line testing, the maximum proton energy is 200 MeV, and the total fluence is 10&lt;sup&gt;10 &lt;/sup&gt;particle/cm&lt;sup&gt;2&lt;/sup&gt;. The single-event transient bright spots of different shapes are observed in the pixel array. By extracting the deposition energy and size, the effects of different energy protons on transient bright spot characteristics are compared, and the transient bright spot characteristics between FSI and BSI are also compared. Finally, the energy deposition distribution of the transient bright spot generated by proton in CMOS image sensor pixel unit is predicted by comparing the simulation method with the experimental results. The simulation results verify that the decrease of PPD depletion region thickness and the thinning of epitaxial layer are the main factors leading the proton energy deposition distribution to shift leftward in BSI image sensor.

CMOS Implementation of ANNs Based on Analog Optimization of N-Dimensional Objective Functions.

The design of neural network architectures is carried out using methods that optimize a particular objective function, in which a point that minimizes the function is sought. In reported works, they only focused on software simulations or commercial complementary metal-oxide-semiconductor (CMOS), neither of which guarantees the quality of the solution. In this work, we designed a hardware architecture using individual neurons as building blocks based on the optimization of n-dimensional objective functions, such as obtaining the bias and synaptic weight parameters of an artificial neural network (ANN) model using the gradient descent method. The ANN-based architecture has a 5-3-1 configuration and is implemented on a 1.2 m technology integrated circuit, with a total power consumption of 46.08 mW, using nine neurons and 36 CMOS operational amplifiers (op-amps). We show the results obtained from the application of integrated circuits for ANNs simulated in PSpice applied to the classification of digital data, demonstrating that the optimization method successfully obtains the synaptic weights and bias values generated by the learning algorithm (Steepest-Descent), for the design of the neural architecture.

Billion-pixel x-ray camera (BiPC-X).

The continuing improvement in quantum efficiency (above 90% for single visible photons), reduction in noise (below 1 electron per pixel), and shrink in pixel pitch (less than 1 μm) enable billion-pixel x-ray cameras (BiPC-X) based on commercial complementary metal-oxide-semiconductor (CMOS) imaging sensors. We describe BiPC-X designs and prototype construction based on flexible tiling of commercial CMOS imaging sensors with millions of pixels. Device models are given for direct detection of low energy x rays (<10 keV) and indirect detection of higher energies using scintillators. Modified Birks's law is proposed for light yield non-proportionality in scintillators as a function of x-ray energy. Single x-ray sensitivity and spatial resolution have been validated experimentally using a laboratory x-ray source and the Argonne Advanced Photon Source. Possible applications include wide field-of-view or large x-ray aperture measurements in high-temperature plasmas, the state-of-the-art synchrotron, x-ray free electron laser, and pulsed power facilities.

32 × 32 silicon photonic MEMS switch with gap-adjustable directional couplers fabricated in commercial CMOS foundry

We report on a 32 × 32 silicon photonic micro-electro-mechanical-system (MEMS) switch with gap-adjustable directional couplers. The switch is fabricated on 200-mm silicon-on-insulator wafers in a commercial complementary metal-oxide-semiconductor (CMOS) foundry. The fabricated device has a maximum on-chip loss of 7.7 dB and an extinction ratio of 50.8 dB. The switching voltage is 9.45 V and the 20-dB bandwidth is 28.7 nm. Our work shows a promising path for mass production of silicon photonic MEMS switches in commercial CMOS foundries.

Millimeter-wave dual-mode and dual-band switchable Gilbert up-conversion mixer in 65-nm CMOS process

AbstractIn this paper, a millimeter-wave (MMW) dual-mode and dual-band switchable Gilbert up-conversion mixer in a commercial 65-nm complementary metal oxide semiconductor (CMOS) process is presented. By simply changing the bias, the proposed CMOS Gilbert up-conversion mixer can be switched between subharmonic and fundamental operation modes for MMW dual-band applications. With a low local oscillator pumping power of 3 dBm and low dc power consumption of 6 mW, the proposed CMOS Gilbert up-conversion mixer exhibits a measured conversion gain of −0.5 ± 1.5 dB from 37 to 50 GHz and 2.5 ± 1.5 dB from 17.5 to 32 GHz for the subharmonic and fundamental modes, respectively.

Soft x-ray detection for small satellites with a commercial CMOS sensor at room temperature

Recently CMOS (complementary metal-oxide semiconductor) sensors have progressed to a point where they may offer improved performance in imaging x-ray detection compared to the CCDs often used in x-ray satellites. We demonstrate x-ray detection in the soft x-ray band (250-1700 eV) by a commercially available back-illuminated Sony IMX290LLR CMOS sensor using the Advanced Photon Source at the Argonne National Laboratory. While operating the device at room temperature, we measure energy resolutions (FWHM) of 48 eV at 250 eV and 83 eV at 1700 eV which are comparable to the performance of the Chandra ACIS and the Suzaku XIS. Furthermore, we demonstrate that the IMX290LLR can withstand radiation up to 17.1 krad, making it suitable for use on spacecraft in low earth orbit.

A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

The development of small, energy-efficient artificial intelligence edge devices is limited in conventional computing architectures by the need to transfer data between the processor and memory. Non-volatile compute-in-memory (nvCIM) architectures have the potential to overcome such issues, but the development of high-bit-precision configurations required for dot-product operations remains challenging. In particular, input–output parallelism and cell-area limitations, as well as signal margin degradation, computing latency in multibit analogue readout operations and manufacturing challenges, still need to be addressed. Here we report a 2 Mb nvCIM macro (which combines memory cells and related peripheral circuitry) that is based on single-level cell resistive random-access memory devices and is fabricated in a 22 nm complementary metal–oxide–semiconductor foundry process. Compared with previous nvCIM schemes, our macro can perform multibit dot-product operations with increased input–output parallelism, reduced cell-array area, improved accuracy, and reduced computing latency and energy consumption. The macro can, in particular, achieve latencies between 9.2 and 18.3 ns, and energy efficiencies between 146.21 and 36.61 tera-operations per second per watt, for binary and multibit input–weight–output configurations, respectively. Commercial complementary metal–oxide–semiconductor and resistive random-access memory technologies can be used to create multibit compute-in-memory circuits capable of fast and energy-efficient inference for use in small artificial intelligence edge devices.

CORNERSTONE’s Silicon Photonics Rapid Prototyping Platforms: Current Status and Future Outlook

The field of silicon photonics has experienced widespread adoption in the datacoms industry over the past decade, with a plethora of other applications emerging more recently such as light detection and ranging (LIDAR), sensing, quantum photonics, programmable photonics and artificial intelligence. As a result of this, many commercial complementary metal oxide semiconductor (CMOS) foundries have developed open access silicon photonics process lines, enabling the mass production of silicon photonics systems. On the other side of the spectrum, several research labs, typically within universities, have opened up their facilities for small scale prototyping, commonly exploiting e-beam lithography for wafer patterning. Within this ecosystem, there remains a challenge for early stage researchers to progress their novel and innovate designs from the research lab to the commercial foundries because of the lack of compatibility of the processing technologies (e-beam lithography is not an industry tool). The CORNERSTONE rapid-prototyping capability bridges this gap between research and industry by providing a rapid prototyping fabrication line based on deep-UV lithography to enable seamless scaling up of production volumes, whilst also retaining the ability for device level innovation, crucial for researchers, by offering flexibility in its process flows. This review article presents a summary of the current CORNERSTONE capabilities and an outlook for the future.

A Conceptual Investigation at the Interface between Wireless Power Devices and CMOS Neuron IC for Retinal Image Acquisition

In this paper, a conceptual investigation of the interface between wireless power devices and a retina complementary metal oxide semiconductor (CMOS) neuron integrated circuit (IC) have been presented. The proposed investigation consists of three designs: design-I, design-II, and design-III. Design-I involves a slotted loop monopole antenna as per American National Standards Institute (ANSI) guidelines, which achieve an ultra-wide band ranging from 3.1 GHz to 10.6 GHz. The biocompatible antenna is made on silicon-nitride substrate using on-wafer packaging technology and it is used as a receiver device. The performance of antenna provides a wideband, sufficient power to receive, and low losses due to the avoidance of printed circuit board (PCB) fabrication. A CMOS based multi-stack power harvesting circuit achieves the output power ranging from 4 mW to 2.7 W and corresponds from the selected Radio Frequency (RF) bands of loop antenna is exhibited in design-II. The power efficiency of 40% to 82%, with respect to output powers of 4 mW to 2.7 W, is achieved. Design-III includes a CMOS based retina neuron circuit that employs a dynamic feedback technique and support to achieve the number of read-out spikes. At the end of the interface between wireless power devices and a CMOS retina neuron IC, 50 mV read-out spikes are achieved, with varying light intensity, from 0 mW/cm2 to 2 mW/cm2. The proposed design-II and design-III are implemented and fabricated using commercial CMOS 0.065 µm, Samsung process. The antenna and RF power harvesting IC could be placed on a contact lens platform while retina neuron IC can be implanted after ganglions cells inside the eye. The antenna and harvesting IC are physically connected to the retina circuit in the form of light. This conceptual investigation could support medical professionals in achieving an interfacing approach to restore the image visualization.

Magnetic Micro Sensors with Two Magnetic Field Effect Transistors Fabricated Using the Commercial Complementary Metal Oxide Semiconductor Process.

The fabrication and characterization of a magnetic micro sensor (MMS) with two magnetic field effect transistors (MAGFETs) based on the commercial complementary metal oxide semiconductor (CMOS) process are investigated. The magnetic micro sensor is a three-axis sensing type. The structure of the magnetic microsensor is composed of an x/y-MAGFET and a z-MAGFET. The x/y-MAGFET is employed to sense the magnetic field (MF) in the x- and y-axis, and the z-MAGFET is used to detect the MF in the z-axis. To increase the sensitivity of the magnetic microsensor, gates are introduced into the two MAGFETs. The sensing current of the MAGFET enhances when a bias voltage is applied to the gates. The finite element method software Sentaurus TCAD was used to analyze the MMS’s performance. Experiments show that the MMS has a sensitivity of 182 mV/T in the x-axis MF and a sensitivity of 180 mV/T in the y-axis MF. The sensitivity of the MMS is 27.8 mV/T in the z-axis MF.