ABSTRACTA three‐phase four‐switch split capacitor distribution static compensator (FSSC‐DSTATCOM) with a zig‐zag transformer is used to mitigate current‐related power quality issues in the distribution system. In conventional DSTATCOM, a significant dc component of current diverges voltages across split capacitors, degrading the current tracking performance and increasing the source current THD. The proposed FSSC‐DSTATCOM with chopper circuit equalizes the voltages across split capacitors, improves the current tracking performance, and reduces the source current THD. Moreover, FSSC‐DSTATCOM reduces the switch count compared to conventional approaches that use more switches. In FSSC‐DSTATCOM, switching pulses for each switch are generated using hysteresis current control based on the reference filter currents derived from instantaneous symmetrical component theory (ISCT). The generation of switching pulses of chopper circuit is achieved by employing logical relational operator circuitry at the dc input side of DSTATCOM. Simulation and hardware implementation are used to verify the proposed FSSC‐DSTATCOM with the chopper circuit.
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