Introduction Charge trap flash memory with high-k layers has attracted attention as a promising next-generation nonvolatile memory candidate. As a typical charge trap flash memory, the TaN/Al2O3/Si3N4/SiO2/Si structure has been widely investigated [1]. However, according to scale down of the device size, a low operation voltage is required. All high-k stack structures, such as Al2O3/HfAlOx/Al2O3 and Al2O3/La2O3/Al2O3 have been proposed to replace both Si3N4 charge trapping and SiO2tunneling layers [2, 3].It is easily understood that the conduction band offsets of charge trapping material should be lower than those of tunneling and blocking materials to make trap (program) and detrap (erase) occur in charge trapping layer during program and erase operations. The offsets of Al2O3 and Ta2O5 on Si were found to be 2.08 and 0.28 eV, respectively [4]. Hence, we should paid attention to a large difference of conduction band offset in the Al2O3/Ta2O5/Al2O3 stack structure. Furthermore, considering to reduce EOT, we employed (Ta/Nb)Oxfilms to increase k-value and keep low leakage current as charge trapping layer.In this paper, we report on the electrical performance of Pt/Al2O3/(Ta/Nb)Ox/Al2O3/Si capacitors, which were fabricated at low temperature of 200 °C, by changing thicknesses of Al2O3 blocking and tunneling layers and (Ta/Nb)Oxcharge trapping layer. Experimental The native oxide on p-Si(100) substrate was removed by diluted HF acid rinse. Al2O3 tunneling layers (4-16 nm) were deposited by PE-ALD method at 200 °C using TMA precursor and plasma oxygen gas. The (Ta/Nb)Ox charge trapping layers (1-20 nm) were subsequently deposited by ALD at 200 °C using M(NtAm)(NMe2)3 [M=Ta:Nb(1:1mol)] cocktail precursor and H2O gas. The Al2O3blocking layers (4-16 nm) were also deposited by PE-ALD at 200 °C. Finally, a 150-nm-thick Pt electrode was fabricated by sputtering. Results and Discussion A cross sectional TEM image of Pt/Al2O3/ (Ta/Nb)Ox/Al2O3/Si capacitor is shown in Fig. 1. We did not observe any severe chemical reaction in any layer, and all layers were found to be amorphous. In addition, the image reveals the presence of SiO2 interfacial layer (~1.5 nm) at Al2O3/Si interface grown during PE-ALD process. Figure 2 shows flatband voltage shift (ΔVfb) as a function of EOT in Pt/Al2O3/(Ta/Nb)Ox/Al2O3/Si capacitor. The ΔVfb and EOT values were estimated from C-V data using MIRAI-ACCEPT program [5]. Injected charge (Qinj) was kept to be 1mC/cm2. The thicknesses Al2O3 blocking layer were varied 4, 8 and 16nm, while the thickness of the Al2O3 tunneling layer was 16nm. Note that large ΔVfb value of 10 V appears because large amount of charge is trapped in the Al2O3/(Ta/Nb)Ox /Al2O3 structure. The ΔVfb value increases as thickness of the Al2O3 blocking layer increases. It suggests that the charge-trapping efficiency of (Ta/Nb)Ox layer may be lowering compared to Si3N4 layer. Therefore, although electrons captured in (Ta/Nb)Ox layer can be readily detrapped and transfer to the Al2O3 blocking layer, electrons can be trapped in the thick blocking layer. Furthermore, we also found that ΔVfb value decreases with increasing the thickness of (Ta/Nb)Oxlayer. Figure 3 shows normalized ΔVfb behavior as a function of retention time for the same capacitor shown in Fig. 2. Electric filed was applied 5MV/cm or -5MV/cm. In case of 5MV/cm, the ΔVfb degradation of the Al2O3blocking layer (16 nm) sample was not observed. On the other hand, in case of -5MV/cm, the ΔVfb values decrease with increasing retention time for all samples, regardless of thickness of the blocking layer. This indicates that the electron detrapping occurs easily across the blocking layer rather than the tunneling layer. Conclusions We have investigated memory characteristics of Pt/Al2O3/(Ta/Nb)Ox/Al2O3/Si capacitors by changing each layer thickness. We found that large charge can be trapped in Al2O3/(Ta/Nb)Ox/Al2O3 multi-layer structure even in low temperature fabrication at 200 °C.
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May 28, 2014
Woochool Jang + 8
Open Access