Characteristics Of TFTs Research Articles

Study on parasitic and channel resistance of poly‐Si thin‐film transistors by metal‐induced crystallization

Abstract— The channel‐length‐dependent transfer characteristics of TFTs using poly‐Si by metal‐induced crystallization through a cap (MICC) of a‐Si to evaluate the parasitic and channel resistances have been studied. The MICC p‐channel TFTs studied in the present work showed a maximum field‐effect mobility, threshold voltage, and gate swing of 53 cm2/V‐sec, −4.4 V, and 0.8 V/dec for W/L = 12 μm/6 μm, 71 cm2/V‐sec, −5.3 V, and 0.9 V/dec for W/L = 12 μm/12 μm, and 113 cm2/V‐sec, −7 V, and 1 V/dec for W/L = 12 μm/24 μm, respectively. It is found that the parasitic resistance is higher than the channel resistance, and both decrease with increasing temperature.

Polymer Thin-Film Transistors with Chemically Modified Dielectric Interfaces by Atmospheric-Pressure Plasma Technology

Poly-3-hexylthiophene (P3HT) is coated on a chemically modified SiO2 gate dielectric layer as an active layer to fabricate organic thin-film transistors (OTFTs). This study uses a new atmospheric-pressure plasma (APP) approach to treat SiO2 surfaces, and investigates its effect on the electric characteristics of OTFTs. The APP process can be performed at low temperature (<100ºC) and atmospheric pressure, so it is very suitable for use on a plastic substrate. After the SiO2 surface has been modified by the APP process with hexamethyldisilazane (HMDS), it exhibits typical I-V characteristics of TFTs. Calculations reveal that its field effect mobility can reach 0.02-0.03 cm2/Vs, which is about 15 times higher than that before the modification, and the threshold voltage is below -10V. The performance is even better than that obtained following the usual surface treatment of the SiO2 surface by spin-coating or evaporation.

Reduction of photoleakage current in polycrystalline silicon thin-film transistor using NH3 plasma treatment on buffer layer

The technology of polycrystalline silicon thin-film transistors (poly-Si TFTs) with low photoleakage current is developed in this work. The electrical characteristics of poly-Si TFTs under illumination were significantly improved employing the NH3 plasma treatment on the buffer layer, with no need for complicate device structure and additional masks. The trap states that originated from the plasma bombardment on the interface between the poly-Si layer and buffer oxide can effectively recombine the light-induced electron-hole pairs. The fewer residual electron-hole pairs lead to the lower photoleakage current and improved subthreshold swing, as well as maintaining good electrical characteristics in the dark sate.

Temperature and humidity effects on the stability of on-plastic a-Si:H thin film transistors with various conduction channel layer thicknesses

ABSTRACTStability is an important issue for the application of TFTs. In this paper, we present the effects of humidity and temperature on the stability of inverted-staggered back-channel-cut a-Si:H TFTs with various conduction channel layer thickness. We evaluated the stability of on-plastic TFTs of different conduction layer thicknesses made at a process temperature of 150°C on 51-μm thick Kapton polyimide foil substrates.. With conduction channel layer thickness of 50nm, humidity reversibly varies the characteristics of TFTs, but TFTs of conduction layer thickness greater than 100 nm is pretty immune to the humidity change. The temperature dependent stability and characteristics of TFTs were analyzed from 20°C to 60°C. Rising temperature from 20°C to 56°C, the threshold voltage (Vt) drops about 2 volts; on-off current ratio decreases by one order of magnitude mainly due to thermally excited carriers in the off-region.

High-Performance Poly-Si TFTs With $\hbox{Pr}_{2} \hbox{O}_{3}$ Gate Dielectric

In this letter, a polycrystalline silicon thin-film transistor (poly-Si TFT) with high-quality praseodymium oxide (Pr2O3) gate dielectric is proposed. Compared to TFTs with tetraethoxysilane gate dielectric, the electrical characteristics of poly-Si TFTs with Pr2O3 gate dielectric can be significantly improved, such as lower threshold voltage, lower subthreshold swing, triple ON/OFF current ratio, and a field-effect mobility that is about twice higher, even without any hydrogenation treatment. These improvements can be attributed to the high gate capacitance density by using a high-kappa gate dielectric. Therefore, the poly-Si TFT with Pr2O3 high-kappa gate dielectric is a promising candidate for high-speed and low-power display driving circuit applications in flat-panel displays.

Effect of active layer thickness on electrical characteristics of pentacene TFTs with PMMA buffer layer

We studied transfer characteristics of pentacene thin film transistors, fabricated by using polymethylmetacrylate (PMMA) buffer layer, in order to evaluate the parasitic series resistance in devices with different active layer thickness (10–80 nm) and contact architectures (top and bottom contacts). For bottom contact TFTs, the highest series resistance (1.7 × 10 4 Ω cm) was found for the thinnest pentacene films, probably related to step coverage problems of the thin pentacene film over the gold contacts. In contrast, for the top contact TFTs, the 10 nm pentacene films had the lowest resistance (∼1.8 × 10 3 Ω cm) and the resistance increases to ∼8 × 10 4 Ω cm for the thicker films. The results can be related to the effect of the series resistance induced by the vertical transport through the pentacene film.

Subthreshold characteristics of polysilicon TFTs

A new analytical polysilicon thin film transistors (poly-Si TFTs) subthreshold current model is presented in this paper. The model is based on the surface potential in subthreshold regime. When assuming an exponential distribution of defect states density, surface potential calculation is derived by using the Lambert W function, which benefits from computational efficiency and is suitable for implementation in circuit simulation. In order to model the subthreshold characteristics, we have calculated the drain current and subthreshold swing. The subthreshold variation with temperature and kink effect is studied. The off-current around flat-band voltage is also calculated. The results are compared with the available experimental data and an excellent agreement has been obtained.

ITO Contact Properties with Amorphous Silicon for AM-OLED Application

In order to improve long term stability of a-Si:H TFT for AM-OLED application a new driving method compensating Vth shift requires a new device structure of which hole injection is enhanced. ITO film was investigated for the hole injection material because it is essential material for display devices and has high work function favorable for hole injection. From I-V characteristics of TFTs with two types of source and drain material, i.e. Cr and ITO, the contact properties were measured and compared. Although electron injection property of ITO was worse than Cr, hole injection property was comparable to that of Cr.

P‐15: AMOLED Pixel Structures Compensating the Hysteresis of Poly‐Si TFTs

AbstractNew voltage programmed pixel circuits for AMOLEDs are proposed and measured. The measurement data indicate that the proposed driving schemes are less sensitive to the hysteresis of low temperature polycrystalline silicon (LTPS) TFTs than the conventional 2T1C pixel structure and can improve the recoverable residual image due to the hysteresis characteristics of LTPS TFTs. In the proposed driving schemes, the black data are inserted in displayed images so that the motion image quality should be improved.

Improved Electrical Characteristics of MILC Poly-Si TFTs Using Fluorine Ion Implanation

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Electrical Enhancement of Solid Phase Crystallized Poly-Si Thin-Film Transistors with Fluorine Ion Implantation

Solid phase recrystallized polycrystalline silicon thin-film transistors (SPC poly-Si TFTs) with fluorine ion implantation were investigated in this study. Electrical characteristics and reliability of the proposed poly-Si TFTs were improved effectively, especially for field effect mobility and off current. The fluorine-ion-implanted poly-Si TFT can suppress the hot carrier multiplication near the drain side, leading to superior endurance to electrical stress compared with conventional poly-Si TFTs. It was found that fluorine ions will pile up at the poly-Si interface during thermal annealing, without the initial deposition of pad oxide. The proposed technology is manageable and compatible with conventional poly-Si TFT fabrication. As the ion dosages increase more than , however, the electrical characteristics of poly-Si TFTs were degraded due to the increase of trap state density caused by the fluorine segregation in the poly-Si film.

New Current-Scaling Pixel Circuit Compensating Non uniform Electrical Characteristics for Active Matrix Organic Light Emitting Diode

We have proposed and successfully fabricated a new serial current mirror pixel design for an active-matrix organic light-emitting diode which consists of four polycrystalline silicon thin-film transistors (poly-Si TFTs) and one capacitor. The non uniformity of OLED current (IOLED) due to the nature of a poly-Si TFT is considerably suppressed. Our experimental results show that the non uniformity of IOLED due to threshold voltage and mobility variation is around 7% whereas that of IOLED is about 25% in the conventional 2-TFT pixel. When supply voltage decreases from 10 V to 9.5 V, the non uniformity of OLED current is suppressed to 2.2% whereas that of OLED current is 35% in the 2-TFT pixel. The proposed pixel can successfully compensate the variation of the electrical characteristics of the poly-Si TFTs as well as provide uniform OLED current despite the supply voltage drop.

Digital driver for 2-inch LTPS AM-OLED displays

For LTPS AM-OLED displays, the spatial variation in the electrical characteristics of polysilicon TFTs will cause non-uniform pixel brightness and poor grayscale accuracy. The technological solution for this problem will open up the larger size application of LTPS AM-OLED displays. In this paper, a digital driver employing a FPGA device is designed to serve 2-inch color LTPS AM-OLED displays with 128× (160×3) resolution. A digital method of simultaneous address-display (SAD) and the digital visual interface (DVI) are introduced in the driving scheme. 100% display per, ratio can be obtained. Moving image with 16 grayscales is realized and has good image uniformity.

P-36: Statistical Investigation on the Variation Behavior of Low-Temperature Poly- Si TFTs for Circuit Simulation

In this paper, the variation characteristics of LTPS TFTs are statistically investigated. A description is proposed to fit the variation behaviors, which the coefficient of determination is higher than 0.95, reflecting the validation of the model. Furthermore, the proposed models are used to simulate the performance of the differential pair.

Effects of Channel Width on Electrical Characteristics of Polysilicon TFTs With Multiple Nanowire Channels

This brief studies the electrical characteristics of a series of polysilicon thin-film transistors (poly-Si TFTs) with different numbers of multiple channels of various widths, with lightly doped drain (LDD) structures. The nanoscale TFT with ten 67-nm-wide split channels (M10) has superior and more uniform electrical characteristics than other TFTs. Additionally, experimental results reveal that the electrical performance of proposed TFTs enhances with each channel width decreasing, yielding a profile from a single-gate to tri-gate structure.

High performance LTPS TFT with very large grains produced by sequential lateral crystallization

We report the structural and electrical properties of polycrystalline silicon on glass crystallized by using a CW Nd:YVO 4 laser. Various niicrostmctures appear on amorphous silicon after a scanning of the laser regardless of - crystallization process parameters such as laser power and scan speed. The crystallized region could be characterized by their grain size as 3 distinct regions; RTA-SPC (rapid thermal annealed-sotid phase crystallization) region, small-grain region and SLC (sequential lateral crystallization) region with very large grains of ∼10 μm. To verify its electrical properties, p-ch TFTs were fabricated on the 3 different regions. The characteristics of TFTs on SLC region were superior to those on other regions and average performances of SLC poly-Si TFTs were u fe = 132 cm 2 /Vs, V th = -4.6 V, S.S. = 0.5 V/dec, and I off = ∼1 dA/μm at V d = -10 V. respectively.

A 3.5 in. QVGA poly-Si TFT-LCD with integrated driver including new 6-bit DAC

By the SOP (system-on-panel) technology with laser crystallization process, all the driver circuits required for 6-bit color QVGA (320 × RGB × 240) LCD are integrated on panel. The integrated data driver comprises a new ramp-driven 6-bit DAC. The characteristics and uniformity of the LTPS (low temperature polycrystalline silicon) has been remarkably enhanced by applying multi-shot ELA (excimer laser annealing) process and surface treatment. The characteristics of the poly-Si TFTs for integration of driver circuits are following: (1) in NMOS, V th ∼ 1 V and mobility ∼ 240 cm 2/V s, (2) in PMOS, V th ∼ −1.8 V and mobility ∼ 100 cm 2/V s.

Accurate modeling and parameter extraction method for organic TFTs

In this paper we demonstrate the applicability of the unified model and parameter extraction method (UMEM), previously developed by us, to organic thin film transistors, OTFTs.The UMEM, which has been previously used with a-Si:H, polysilicon and nanocrystalline TFTs, provides a much rigorous and accurate determination of main electrical parameters of organic TFTs than previous methods. Device parameters are extracted in a simple and direct way from the experimental measurements, with no need of assigning predetermined values to any other model parameter or using optimization methods. The method can be applied to both experimental and simulated characteristics of organic TFTs, having different geometries and mobility. It provides a very good agreement between transfer, transconductance and output characteristics calculated using parameter values obtained with our extraction procedure and experimental curves. Differences in mobility behavior, as well as other device features that can be analyzed using UMEM are discussed.

Dielectric surface treatment effects on organic thin-film transistors

The surface states of gate dielectrics affect device performance severely in Pentacene OTFTs. We have fabricated organic thin-film transistors (OTFTs) using pentacene as an active layer with chemically modified <TEX>$SiO_2$</TEX> gate dielectrics. The effects of the surface treatment of <TEX>$SiO_2$</TEX> on the electric characteristics of OTFTS were investigated. The surface of <TEX>$SiO_2$</TEX> gate dielectric was treated by normal wet cleaning process, <TEX>$O_2-plasma$</TEX> treatment, hexamethyldisilazane (HMDS), and octadecyltrichlorosilane (OTS) treatment. After the surface treatments, the contact angles and surface free energies were measured in order to analyze the surface state changes. In the electrical measurements, typical I-V characteristics of TFTs were observed. The field effect mobility, <TEX>$\mu$</TEX>, was calculated to be <TEX>$0.29\;cm^2V^{-1}s^{-1}$</TEX> for OTS treated sample while those for the HMDS, <TEX>$O_2$</TEX> plasma treated, and wet-cleaned samples were 0.16, 0.1, and <TEX>$0.04\;cm^2V^{-1}s^{-1}$</TEX>, respectively.

Driving large-sized OLED TVs with an amorphous-silicon backplane

— A 20-in. OLED display driven by an amorphous-silicon backplane has been demonstrated. It has been widely believed that the characteristics of amorphous-silicon TFTs are not sufficient to drive OLED display. This paper challenges this hypothesis and proves that amorphous silicon can be applied to large active-matrix-driven displays and discusses many possible approaches that lead to good front-of-screen quality. Superior-video-image-quality amorphous-silicon-driven OLEDs opens a bright future for a new generation of wall-hanging televisions.