Abstract

We studied transfer characteristics of pentacene thin film transistors, fabricated by using polymethylmetacrylate (PMMA) buffer layer, in order to evaluate the parasitic series resistance in devices with different active layer thickness (10–80 nm) and contact architectures (top and bottom contacts). For bottom contact TFTs, the highest series resistance (1.7 × 10 4 Ω cm) was found for the thinnest pentacene films, probably related to step coverage problems of the thin pentacene film over the gold contacts. In contrast, for the top contact TFTs, the 10 nm pentacene films had the lowest resistance (∼1.8 × 10 3 Ω cm) and the resistance increases to ∼8 × 10 4 Ω cm for the thicker films. The results can be related to the effect of the series resistance induced by the vertical transport through the pentacene film.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.