Characteristics Of SiC MOSFET Research Articles

Total Ionizing Dose (TID) Effects on the 1.2 kV SiC MOSFETs under Proton Irradiation

In this paper, the effects of various proton irradiation energies and doses on the electrical characteristics of SiC MOSFETs have been evaluated and characterized using a proton accelerator. The devices under test were designed, fabricated and packaged using 1.2 kV/0.6 µm-tech SiC MOSFET processes. The results demonstrate that the threshold voltage (Vth) of the irradiated devices shifted towards negative values due to the radiation-induced positive oxide trapped charges. Moreover, this negative shift in Vth and positive trapped charges of field limiting ring (FLR) oxide led to an increase in output currents and a reduction in the breakdown voltage values.

Analyzing the Changes in the Third Quadrant Characteristics of SiC MOSFET Induced by Threshold Drift

Analyzing the Changes in the Third Quadrant Characteristics of SiC MOSFET Induced by Threshold Drift

The advantages and short circuit characteristics of SiC MOSFETs

SiC MOSFETs have exhibited considerable benefits in high-frequency, high-voltage, and high-temperature power electronics applications with outstanding material attributes as a result of the rapid advancement of power electronics technology. SiC MOSFETs slower short-circuit tolerance and faster switching rates provide new issues for the short-circuit prevention technology. In the opening section of the study, Si and SiC MOSFETs are compared and evaluated using various models and parametric factors. It has been demonstrated that SiC MOSFETs outperform Si MOSFETs in a variety of conditions and applications. The many SiC MOSFET short-circuit failure types as well as their underlying theories are initially explained in the papers main body. In addition, it examines the fundamentals of short-circuit test procedures and SiC MOSFET test circuits. The issues and limitations of the currently available SiC MOSFET short-circuit protection technology are then explored, along with factors impacting the short-circuit of SiC MOSFETs that are thoroughly examined. Lastly, the SiC MOSFET short-circuit protection technology development trend is forecasted, and potential future areas for improvement and innovation are considered. SiC MOSFET short-circuit protection technology will be enhanced and optimized to satisfy the needs of efficient and dependable power electronic systems as technology advances and application requirements expand.

An analytical subthreshold I–V model of SiC MOSFETs

In this article, an analytical I–V model for calculating subthreshold current of SiC MOSFETs is presented. This model starts with planar MOSFETs and utilizes the one-dimensional Poisson’s equation to derive an analytical expression for the surface potential. Subsequently, it employs this expression as a foundation for subthreshold current calculations. Then the model is extended to DMOSFETs based on the fact that channel current formation mechanism of DMOSFETs is similar to that of planar MOSFETs. Comparative analysis of our model calculations with two-dimensional numerical simulation software reveals that our model exhibits a high degree of agreement in the case of planar MOSFETs and DMOSFETs. Interface traps were also considered in our analytical model, which agrees well with experimental data published elsewhere. Furthermore, the model retains a certain degree of accuracy and predictive capability even in the presence of short-channel effect. Our subthreshold model becomes complementary to existing models which only describe the I–V characteristics of SiC MOSFETs when the transistors operate above the threshold voltages.

A Deep Insight Into the Ionizing Radiation Effects and Mechanisms on the Dynamic Characteristics of SiC MOSFETs

A Deep Insight Into the Ionizing Radiation Effects and Mechanisms on the Dynamic Characteristics of SiC MOSFETs

Simulation study on dynamic characteristics of SiC MOSFET

In this paper, the third generation power MOSFET is introduced, and the physical model based on silicon based MOSFET is improved for SiC MOSFET, and the commercial planar gate and trench gate 1.2kV SiC MOSFET are simulated. The accuracy of physical modals is tested by comparing the static characteristics with commercial ones. The dynamic characteristics of two MOSFETs are simulated by inductively clamped double pulse circuit, and the circuit parameters are analyzed according to the static characteristics of the devices. The switching loss of the two MOSFETs is calculated and compared by using TCAD software. In the two devices with the same volume, the trench gate structure has the larger switching loss.

Proton induced radiation effect of SiC MOSFET under different bias

Radiation effects of silicon carbide metal–oxide–semiconductor field-effect transistors (SiC MOSFETs) induced by 20 MeV proton under drain bias (V D = 800 V, V G = 0 V), gate bias (V D = 0 V, V G = 10 V), turn-on bias (V D = 0.5 V, V G = 4 V) and static bias (V D = 0 V, V G = 0 V) are investigated. The drain current of SiC MOSFET under turn-on bias increases linearly with the increase of proton fluence during the proton irradiation. When the cumulative proton fluence reaches 2 × 1011 p⋅cm−2, the threshold voltage of SiC MOSFETs with four bias conditions shifts to the left, and the degradation of electrical characteristics of SiC MOSFETs with gate bias is the most serious. In the deep level transient spectrum test, it is found that the defect energy level of SiC MOSFET is mainly the ON2 (E c – 1.1 eV) defect center, and the defect concentration and defect capture cross section of SiC MOSFET with proton radiation under gate bias increase most. By comparing the degradation of SiC MOSFET under proton cumulative irradiation, equivalent 1 MeV neutron irradiation and gamma irradiation, and combining with the defect change of SiC MOSFET under gamma irradiation and the non-ionizing energy loss induced by equivalent 1 MeV neutron in SiC MOSFET, the degradation of SiC MOSFET induced by proton is mainly caused by ionizing radiation damage. The results of TCAD analysis show that the ionizing radiation damage of SiC MOSFET is affected by the intensity and direction of the electric field in the oxide layer and epitaxial layer.

Research on the Switching Characteristics Based on the SiC MOSFET Model

With the continuous development of power electronics technology, the third-generation semiconductor materials represented by SiC and GaN have significant advantages in the band gap width, breakdown electric field, thermal conductivity, electron saturation rate and other key parameters, which meet the needs of modern industry for high power, high voltage and high frequency. When the SiC MOSFET plays its high frequency advantage, with the increase of switching frequency, the voltage change rate and current change rate of the device will be larger in the process of turning on and off. This paper mainly analyzes the characteristics of SiC MOSFET devices, and modifies the model based on the model provided by the manufacturer. By establishing static and dynamic test circuits, the static characteristic curves of the model were observed, and the drain voltage and current waveforms of the original model and the optimized model were compared during the switching process. The results show that the switching time of the optimized model is improved, and the oscillation waveform is greatly improved. Then, the accuracy of the optimized model is verified by the double-pulse circuit, and the drain source voltage and the drain source current are studied and observed under different temperature and drive resistance conditions. This paper provides data support for improving the switching characteristics of SiC MOSFET in practical applications.

Analysis of basic performance parameters and temperature effect of SiC-MOSFET

With the development of science and technology, traditional silicon-based semiconductor devices can no longer support the development of science and technology. As a new material, silicon carbide has many advantages. In this paper, the working principle of MOSFET is studied, and the characteristics of silicon carbide are sorted and analyzed, based on which the influence of temperature on the basic parameters of the MOSFET device is further studied. It is concluded that temperature affects the leakage current through the influence of threshold voltage drop and carrier: when the device operating voltage is high, the mobility determines the leakage current; at low operating voltage, the threshold voltage determines the leakage current. The research on temperature characteristics of SiC MOSFET is improved in this paper, which promotes the development of microelectronics technology.

Working principle and characteristic analysis of SiC MOSFET

Power semiconductor devices are frequently used in the electronic and power industries. As the third-generation broadband gap power semiconductor devices, silicon carbide devices have attracted extensive attention. This paper introduces the internal and external structure of SiC MOSFET in detail and analyzes the basic working principle of SiC MOSFET and the electrical characteristics of each stage in the conductive process. By analyzing the theoretical calculation method of threshold voltage under body effect and the relationship diagram drawn by specific experimental test results, it is proved that the increase of body effect will lead to the decrease of the threshold voltage. Two main reasons for BTI characteristics are explained: the energy band shift of the SiC/SiO2 interface is small, and there are many charge traps at SiC/SiO2 interface. Finally, the theoretical calculation method of threshold voltage and the influence principle of threshold voltage drift caused by SiC/SiO2 interface charge: interface trap Qit, oxide trap Qot, movable ion Qm and fixed charge Qf are analyzed. The research on the basic principle and important characteristics of SiC MOSFET in this paper have important reference significance for improving the reliability of SiC MOSFET devices.

Evaluation and Suppression Method of Turn-Off Current Spike for SiC/Si Hybrid Switch

SiC MOSFET/Si IGBT (SiC/Si) hybrid switch usually selects the gate control pattern that SiC MOSFET turns on earlier and turns off later than Si IGBT, with the aim of making the hybrid switch show excellent switching characteristics of SiC MOSFET and reduce switching loss. However, when SiC MOSFET turns off, the fast slew rate of drain source voltage causes the current spike in Si IGBT due to the effects of parasitic capacitance charging and carrier recombination, which will produce additional turn-off loss, thus affecting the overall efficiency and temperature rise of the converter. Based on the double pulse test circuit of SiC/Si hybrid switch, the mathematical model of the turn-off transient process is established. The effects of the remnant carrier recombination degree of Si IGBT, the turn-off speed of SiC MOSFET and the working conditions on the turn-off current spike of hybrid switch are evaluated. Although adjusting these parameters can reduce the turn-off current spike somewhat, additional losses will be introduced. Therefore, a new method to suppress the turn-off current spike is proposed to balance the power loss and current stress.

Study on single-pulse UIS capability of SiC MOSFET with different P-base morphology

At present, the single-pulse unclamped inductive switching (UIS) characteristics of SiC MOSFET have been fully studied. The current mainstream research suggests that the failure mechanism of MOSFET under a single UIS shock is divided into parasitic BJT conduction and metallization failure. However, there are still some shortcomings in the current research. First, it is difficult to distinguish these two failure mechanisms. Second, it is difficult to propose feasible optimization schemes. Therefore, it is still necessary to further explore the mechanism of single-pulse UIS. In this study, Sentaurus TCAD software was used to simulate different P-base doped MOSFETs, and the effect of doping concentration and morphology of the P-base region on the single-pulse UIS failure mechanism was revealed. By designing the P-base region, the BJT conduction failure and metallization failure can be distinguished. In addition, the study also proved the relationship between breakdown voltage and the maximum temperature (T max) in the UIS process, and on this basis, an optimization scheme for the single UIS characteristics of MOSFET was proposed.

Modeling of SiC transistor with counter-doped channel

In this paper, we present a modeling framework to simulate the electrical characteristics of SiC MOSFET. Our model also describes the mobility improvement with counter doping in channel. Our analyses show improved drive current and degraded/lower threshold voltage with a counter-doped channel. To this end, we investigate the impact of varying the doping concentrations of the counter-doped region and the underlying p-well for optimum device performance.

The Effect of SiC-MOSFET Characteristics on the Performance of Dielectric Barrier Discharge Plasma Actuators with Two-Stroke Charge Cycle Operation

The low-voltage operation of a dielectric-barrier-discharge (DBD) plasma actuator with a simple electric circuit has the potential to put it into industrial applications. However, there is an issue that the efficiency of the low-voltage operated DBD plasma actuator is lower than that of the high-voltage operated one. In this study, the characteristics of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs), which are used in the electric circuit, are investigated with a focus on the on-state resistance. The on-state resistance of the SiC-MOSFET affects the rise time of the applied voltage in our experimental condition. The energy consumption by applying a pulse voltage to the DBD plasma actuator increases with increasing the on-state resistance. Flow visualization with particle image velocimetry measurement reveals that a DBD plasma actuator with the SiC-MOSFET whose on-state resistance is the lowest induces the highest velocity of the ionic wind. Also, low on-state resistance is preferable in terms of the thrust-to-power ratio. These findings contribute to the development of an optimal power supply for DBD plasma actuators for industrial applications.

C-RC Snubber Optimization Design for Improving Switching Characteristics of SiC MOSFET

The switching oscillations and voltage overshoots excited by ultrafast switching transients are urgently required to be overcome for SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> . Herein, the C- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> snubber is employed to address these adverse issues. An optimized C- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> snubber design is proposed, which can not only suppress the switching oscillation and overvoltage, but also effectively reduce the snubber loss compared with the dc-link <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> snubber. This will be beneficial to the actual application of this snubber into the high-power and high-frequency field. For the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> overvoltage, the varying tendency of the overshoot with snubber parameters are analyzed according to the equivalent impedance network so that the parameter selection principle can be obtained preliminarily. Then, the C- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> snubber parametric region where both oscillations and overvoltages can be sufficiently suppressed is established using the root locus. Distinctive from the prior-art C- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> design to seek the peak impedance, the proposed switching ringing suppression method is developed by the way of actively assigning poles of fifth-order system to tune an optimal damping ratio. Then, the final design can be determined by minimizing the snubber loss within the obtained parametric range. Finally, the influence of snubber circuit on overvoltage, switching oscillation, and snubber loss are illustrated and verified in detail using the double-pulse tests. Moreover, the application of C- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> snubber in the chopper circuit further highlights its superiority of low snubber loss.

Overvoltage and Oscillation Suppression Circuit With Switching Losses Optimization and Clamping Energy Feedback for SiC MOSFET

The snubber circuit is a cost-effective solution to reduce the severe turn-off overvoltage and oscillation caused by the fast switching characteristics of SiC MOSFET. However, the turn-on switching losses will significantly increase as the snubber decouples the power loop parasitic inductance during the switching process. In this article, the effect of the power loop parasitic inductance on the switch performance of SiC MOSFETs and the quasi-zero voltage switching (QZVS) turn-on condition are studied. On this basis, an SiC MOSFET overvoltage and oscillation suppression circuit (OVSC) with not only the switching losses optimization feature but also the clamping energy feedback characteristic is proposed. The overvoltage and oscillation can be effectively suppressed by clamping capacitors, and those capacitors do not participate in the switching process until the overvoltage occurs, which is of benefit to the switching losses reduction compared with the other normal snubber circuits. Besides, the turn-off overvoltage and oscillation energy stored in the clamping capacitors can be feedback to dc and load side through a passive branch composed of an energy feedback inductor and a diode. The experimental studies and comprehensive comparison studies are carried out to verify the validity of the proposed OVSC. The experimental results show that OVSC has excellent overvoltage and oscillation suppression performance and can significantly reduce the switching losses.

Modeling and analysis of the characteristics of SiC MOSFET

Although the superior performance of SiC MOSFET devices has beenvalidated by many studies, it is necessary to overcome many technical bottlenecks to make SiC MOSFET gradually replace Si-based power devices into the mainstream. In view of the current situation where the performance of SiC MOSFETs in power conversion devices cannot be evaluated well at this stage, it is necessary to carry out fine modeling of SiC MOSFETs and establish accurate simulation models. In this paper, the powerful mathematical processing capability and rich modules of Matlab/Simulink are used to build a SiC MOSFET model, and then the product data sheet is compared with the fitted data. The results show that the switching simulation waveforms are in general agreement with the data sheet waveforms, and the error is less than 7%. Verifing the accuracy of the model and reducing the difficulty of modeling, it provides a new idea for establishing the circuit simulation model of SiC MOSFET in Matlab/Simulink.

Investigation and Evaluation of Solid-State Marx Pulse Generator Based on 3-D Busbar

SiC-MOSFET has been widely used in nanosecond pulse power generators due to its excellent switching characteristics. The solid-state Marx generator using SiC-MOSFET has the advantages of modularity, flexible adjustment, and economic reliability. However, due to the limitation of the busbar loop's parasitic inductance, the excellent switching characteristics of SiC-MOSFETs have not yet been fully utilized in solid-state Marx. This article discusses the PCB wiring structure of the single-module of solid-state Marx and the influence of its superimposed spatial distribution parameters on the output pulse waveform. The principle of 3-D busbar structure and mutual inductance cancellation method to reduce the parasitic inductance of pulse busbar loop is proposed. And verify the above principle through electromagnetic simulation and four-stage superposition experiment. The parasitic inductance of the busbar loop is less than 4 nH. The voltage edge of the output pulse is further reduced, the current rise/fall speed is increased by about 2.3 times, and the switching voltage overshoot is reduced by 80%. And the proposed structure effectively suppresses the gate bounce and improves the solid-state Marx pulse characteristics. Finally, the stability and reliability of the system are improved too.

Study on the Boost Converter with Parasitic Parameters of SiC MOSFET

As a new type of transistors, SiC MOSFETs have excellent performance on switching speed and are capable to improve the energy efficiency and energy density of power conversion devices. On the other hand, the parasitic parameters associated with them bring potential problems when designing switching regulators or analysing the converter performances. In this paper, a boost converter model based on the switching characteristics of SiC MOSFETs is presented for describing the power conversion behaviours comprehensively and accurately. Applying that model, a feedback control system is designed and simulated to explore the influence of each parasitic capacitance on the boost converter. Also, the power loss of the converter during steady operation is analysed and simulated. The research method and simulation results in this paper can be referenced for the design of boost converter with parasitic parameters of SiC MOSFET.

Investigation on Ultralow Turn-off Losses Phenomenon for SiC MOSFETs With Improved Switching Model

Traditional SiC MOSFET switching models cannot predict the turn-off losses precisely in the condition of small driver resistance and small load current, because they have not considered a special case in which the SiC MOSFET closes its channel before the SiC diode turns into the freewheeling-state during turn-off transient. To solve this problem, this article presents an improved SiC MOSFET turn-off model that considers the special case. The parasitic elements of circuit and the nonlinear characteristics of SiC MOSFET are also included in the proposed model to improve its accuracy. Experimental results show that the improved model can predict the turn-off transient of SiC MOSFET precisely. Moreover, the investigation of turn-off behavior shows that SiC MOSFET can achieve ultralow turn-off loss in the special case, because the channel current of SiC MOSFET can fall to 0 before the drain-source voltage rises to a high value. Driver resistance and load current are the decisive factors of achieving the special case, and this article gives the criterion of them. Besides, further studies show that lower common-source inductance, larger drain-source capacitance of MOSFET, and larger capacitance of diode can help to achieve ultralow turn-off loss. Experiments are carried out and the experimental results verify the analysis results.