Carbon Nanotube Thin-film Transistors Research Articles

Diameter‐Dependent Performance of Single‐Walled Carbon Nanotube Thin‐Film Transistors

Single-walled carbon nanotube thin-film transistors (SWCNT-TFTs) with various tube diameters and constant tube length are investigated. Similar variations of on-currents, independent of the diameter, are demonstrated according to percolation theory, but off-currents significantly depend on the diameter. The temperature dependence of the off-currents attributes the observed non-negligible off-state conductance to thermally excited carriers in semiconducting SWCNTs.

Ion Beam Bombardment Effect on Contacts in Solution-Processed Single-Walled Carbon Nanotube Thin Film Transistor

Effect of argon ion bombardment (AIB) on performance of solution-processed single-walled carbon nanotube (SWCNT) thin film transistor (TFT) has been investigated. AIB was applied to the source/drain contacts to reduce contact resistance. It was found that AIB enhances on-state current of TFT. Over 5 decades' on/off ratio is obtained by applying AIB. Results of transmission line method using metallic SWCNT clearly indicate that contact resistance between CNT network and Au electrode is reduced by the application of AIB.

Ion Beam Bombardment Effect on Contacts in Solution-Processed Single-Walled Carbon Nanotube Thin Film Transistor

Ion Beam Bombardment Effect on Contacts in Solution-Processed Single-Walled Carbon Nanotube Thin Film Transistor

Total ionizing dose-hardened carbon nanotube thin-film transistors with silicon oxynitride gate dielectrics

We investigate the radiation response of single-walled carbon nanotube (SWCNT) thin-film transistors fabricated with 23 nm silicon oxynitride gate dielectric layers, for total ionizing doses (TIDs) of Co-60 gamma irradiation up to 2 Mrad(Si). Irradiations with ±1 MV/cm across the gate dielectric have little effect on the threshold voltage, yielding shifts of less than ±0.25 V and no detrimental effect on SWCNT mobility or maximum drain current. This illustrates the need to consider the total device material composition when investigating the radiation response of carbon nanoelectronics and substantiates the applicability of SWCNT-based nanoelectronics for use in high TID environments.

Carbon nanotube thin film transistors on flexible substrates

Carbon nanotube thin film transistors (CNT-TFTs) are fabricated on flexible substrates using purified, surfactant-based CNT suspensions, with >95% semiconducting CNT fraction. The TFTs are made up of local bottom-gated structures with aluminum oxide as the gate dielectric. The devices exhibit high ON current densities (0.1 μA/μm) and on-off ratios (∼105) with mobility values ranging from 10-35 cm2/Vs. A detailed numerical model is used to understand the TFT performance and its dependence on device parameters such as TFT channel length, CNT density, and purity.

Transport Characterization of Chemically-Functionalized Single-Walled Carbon Nanotube Thin Film Transistor

The electronic transport properties of the thin film transistor (TFT) devices consisting of carboxyl-modified single-walled carbon nanotube (c-SWCNT) network are studied. This work is focused on the analysis of the effect of chemical treatment on the electronic transport properties from these devices. The c-SWCNT thin film transistor (c-SWCNT TFT) devices were fabricated by a directed assembly method based on electrostatic interaction between amino-functionalized substrate and c-SWCNTs. The electrical characteristics of c-SWCNT TFTs were measured at room temperature. From the Raman results and the transport characteristics of c-SWCNT TFT devices, the transport mechanism in these devices can be accounted that the deep levels arising from vacancy-adatom complex induced the changes in the electronic band structure of SWCNTs.

Single-Walled Carbon Nanotube Thin Film Transistor Fabricated Using Solution Prepared with 9,9-Dioctyfluorenyl-2,7-diyl–Bipyridine Copolymer

Single-Walled Carbon Nanotube Thin Film Transistor Fabricated Using Solution Prepared with 9,9-Dioctyfluorenyl-2,7-diyl–Bipyridine Copolymer

Single-Walled Carbon Nanotube Thin Film Transistor Fabricated Using Solution Prepared with 9,9-Dioctyfluorenyl-2,7-diyl–Bipyridine Copolymer

Performance of thin film transistor (TFT) whose channel is fabricated by using a solution process of single-walled carbon nanotube (SWCNT) has been studied. SWCNT solution is prepared by using 9,9-dioctyfluorenyl-2,7-diyl–bipyridine (PFO–BPy) copolymer as solubilizer. Over 4 decades' on/off ratio is obtained by using drop-coating at room temperature without any further optimization. Other solubilizers are chosen as control groups to measure the on/off ratio of SWCNT TFT to investigate effects of the use of PFO–BPy. Results suggest that thick SWCNT network should be uniformly established at the channel region and the channel is required to be formed with well-separated SWCNTs.

Transfer printing approach to all-carbon nanoelectronics

Transfer printing methods are used to pattern and assemble monolithic carbon nanotube (CNT) thin-film transistors on large-area transparent, flexible substrates. Airbrushed CNT thin-films with sheet resistance 1 kΩ sq −1 at 80% transparency were used as electrodes, and high quality chemical vapor deposition (CVD)-grown CNT networks were used as the semiconductor component. Transfer printing was used to pre-pattern and assemble thin film transistors on polyethylene terephthalate (PET) substrates which incorporated Al 2O 3/poly-methylmethacrylate (PMMA) dielectric bi-layer. CNT-based ambipolar devices exhibit field-effect mobility in range 1–33 cm 2/V s and on/off ratio ∼10 3, comparable to the control devices fabricated using Au as the electrode material.

Electrical properties of carbon nanotube thin-film transistors fabricated usingplasma-enhanced chemical vapor deposition measured by scanning probe microscopy

The electrical properties of carbon nanotube thin-film transistors (CNT–FETs) fabricatedusing plasma-enhanced chemical vapor deposition (PECVD) were studied by scanningprobe microscopy. The measured results suggest the formation of an island structure inthe subthreshold regime and the disappearance of the island structure at theON state. These results were explained by the change in the effective number ofCNTs that contributed to the electrical conduction due to the gate-bias-dependentresistance of the semiconducting CNTs. The results obtained by Monte Carlosimulation revealed similar results. The effects of metallic CNTs with defects andthe scatter of the drain current in the subthreshold regime were also examined.

Air-Stable Conversion of Separated Carbon Nanotube Thin-Film Transistors from p-Type to n-Type Using Atomic Layer Deposition of High-κ Oxide and Its Application in CMOS Logic Circuits

Due to extraordinary electrical properties, preseparated, high purity semiconducting carbon nanotubes hold great potential for thin-film transistors (TFTs) and integrated circuit applications. One of the main challenges it still faces is the fabrication of air-stable n-type nanotube TFTs with industry-compatible techniques. Here in this paper, we report a novel and highly reliable method of converting the as-made p-type TFTs using preseparated semiconducting nanotubes into air-stable n-type transistors by adding a high-κ oxide passivation layer using atomic layer deposition (ALD). The n-type devices exhibit symmetric electrical performance compared with the p-type devices in terms of on-current, on/off ratio, and device mobility. Various factors affecting the conversion process, including ALD temperature, metal contact material, and channel length, have also been systematically studied by a series of designed experiments. A complementary metal-oxide-semiconductor (CMOS) inverter with rail-to-rail output, symmetric input/output behavior, and large noise margin has been further demonstrated. The excellent performance gives us the feasibility of cascading multiple stages of logic blocks and larger scale integration. Our approach can serve as the critical foundation for future nanotube-based thin-film macroelectronics.

High yield production of semiconducting p-type single-walled carbon nanotube thin-film transistors on a flexible polyimide substrate by tuning the density of ferritin catalysts

We report on a simple method for fabricating pure p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) on flexible polyimide substrates without selective removal of metallic SWCNTs from the as-grown CNT films. The density of the SWCNTs was controlled by tuning the concentration of ferritin catalyst, resulting in the control of the metallic percolation pathways in the SWCNT TFTs. For a ferritin solution diluted by 1/2000, approximately 60% of the pristine SWCNT TFTs showed p-type behavior with larger on/off current ratios, ( I on/ I off > 10 4) and a high photosensitivity to the exposure of UV/visible light.

Flexible high-performance carbon nanotube integrated circuits

Carbon nanotube thin-film transistors are expected to enable the fabrication of high-performance, flexible and transparent devices using relatively simple techniques. However, as-grown nanotube networks usually contain both metallic and semiconducting nanotubes, which leads to a trade-off between charge-carrier mobility (which increases with greater metallic tube content) and on/off ratio (which decreases). Many approaches to separating metallic nanotubes from semiconducting nanotubes have been investigated, but most lead to contamination and shortening of the nanotubes, thus reducing performance. Here, we report the fabrication of high-performance thin-film transistors and integrated circuits on flexible and transparent substrates using floating-catalyst chemical vapour deposition followed by a simple gas-phase filtration and transfer process. The resulting nanotube network has a well-controlled density and a unique morphology, consisting of long (~10 µm) nanotubes connected by low-resistance Y-shaped junctions. The transistors simultaneously demonstrate a mobility of 35 cm(2) V(-1) s(-1) and an on/off ratio of 6 × 10(6). We also demonstrate flexible integrated circuits, including a 21-stage ring oscillator and master-slave delay flip-flops that are capable of sequential logic. Our fabrication procedure should prove to be scalable, for example, by using high-throughput printing techniques.

Lithography-free fabrication of carbon nanotube network transistors

A novel non-lithographic technique for the fabrication of carbon nanotube thin filmtransistors is presented. The whole transistor fabrication process requires onlyone mask which is used both to pattern transistor channels based on aerosolsynthesized carbon nanotubes and to deposit electrodes by metal evaporationat different angles. An important effect of electrodynamic focusing was utilizedfor the directed assembly of transistor channels with feature sizes smaller thanthe mask openings. This dry non-lithographic method opens up new avenues fordevice fabrication especially for low cost flexible and transparent electronics.

Fabrication and characterisation of high-performance and high-current back-gate thin-film field-effect transistors using sorted single-walled carbon nanotubes

The authors present the wafer scale fabrication and characteristics of back-gate semiconducting carbon nanotube thin-film field-effect transistors (SN-TFTs) suitable for high-current applications. Good on-off current ratio TFTs using affordable 95- purity semiconducting tubes by appropriately choosing the length of the nanotubes and improving the nanotube density have been demonstrated. Moreover, the nanotube thin-film deposition is carried out using a simple solution-based assembly method and good TFT performance and high currents are achieved with random-oriented network of nanotubes. Hafnium oxide (HfO x ) is used as the gate dielectric material to improve the device performance. The global gate devices have shown an excellent p -type behaviour with a low output conductance value of 0.3 S. The SN-TFTs have exhibited a maximum on off ratio of 4 10 4 at lower operating gate voltages, a maximum on-current of 3.1 mA at a current density of 6.2 A/ m, a steep sub-threshold slope of 600 mV/decade, threshold voltage of 1.5 V, a maximum normalised transconductance of 0.7 S/ m and a maximum carrier mobility of 44.2 cm 2 /V s.

Performance Comparison of Interdigitated Thin-Film Field-Effect Transistors Using Different Purity Semiconducting Carbon Nanotubes

In this paper, we present the fabrication and characterization of semiconducting carbon nanotube thin-film field-effect transistors (SN-TFTs). High-k dielectric material, hafnium-oxide (HfOX) is used as the gate-oxide of the device. A Thin-film of semi-conducting single walled carbon nanotube (SWCNT) is deposited on the amino-silane modified HfOX surface. Two types of SN-TFTs with interdigitated source and drain contacts are fabricated using 90% and 95% purity of semiconducting SWCNTs (s-SWCNT), have exhibited a p-type behavior with a distinct linear and saturation region of operation. For 20 µm channel length SN-TFT with 95% pure s-SWCNTs has a peak on-off current ratio of 3.5×104 and exhibited a transconductance of 950 µS. The SN-TFT fabricated with HfOX gate oxide has shown a steep sub-threshold slope of 750 mV/decade and threshold voltage of -0.7 V. The SN-TFT of channel length 50 µm has exhibited a maximum mobility of 26.9 cm2/V•s.

Radiation Effects in Single-Walled Carbon Nanotube Thin-Film-Transistors

The fabrication, characterization, and radiation response of single-walled carbon nanotube (SWCNT) thin-film field effect transistors (SWCNT-TFTs) has been performed. SWCNT-TFTs were fabricated on SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -Si substrates from 98% pure semiconducting SWCNTs separated by density gradient ultracentrifugation. Optical and Raman characterization, in concert with measured drain current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> ratios, up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> , confirmed the high enrichment of semiconducting-SWCNTs. Total ionizing dose (TID) effects, up to 10 MRads, were measured in situ for a SWCNT-TFT under static vacuum. The results revealed a lateral translation of the SWCNT-TFT transfer characteristics to negative gate bias resulting from hole trapping within the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -SWCNT interface. Additional TID exposure conducted in air on the same device had the opposite effect, shifting the transfer characteristics to higher gate voltage, and increasing the channel conductance. No significant change was observed in the device mobility or the SWCNT Raman spectra following a TID exposure of 10 Mrad(Si), indicating extrinsic factors dominate the transfer characteristics in the SWCNT-TFT devices during irradiation. The extrinsic effects of charge trapping and the role that gas adsorption plays in the radiation response are discussed.

Modeling of printed single walled carbon nanotube thin film transistors for attaining optimized clock signals

As all-printed digital circuits are in high demand to produce all-printed active devices, providing accurate and synchronized clocks to all of the printed circuits is an indispensible step. To supply the clock signal to a printed digital circuit, a printed ring oscillator has been considered as a practical solution. However, it is difficult to fully print the ring oscillators with a consistent and stable clock signal. To resolve this problem, we employed single walled carbon nanotube network (SWNTn) as active layers of printed thin film transistors (TFTs) to completely print the ring oscillator. In addition, using the extracted electronic properties from the printed SWNTn-TFTs, we designed a simulation model based on AIM-Spice Model 15 for the printed ring oscillator and compared the simulated clock signals with the experimentally measured values of the printed ring oscillator.

Optimization of single-walled carbon nanotube growth and study of the hysteresis of random network carbon nanotube thin film transistors

Random network single-walled carbon nanotube (SWNT)-based thin film transistors show excellent properties in sensors, electronic circuits, and flexible devices. However, they exhibit a significant amount of hysteresis behavior, which should be solved prior to use in industrial applications. This paper provides optimum conditions for the growth of random network SWNTs and reveals that the observed hysteresis behavior originates from the charge exchange between the SWNTs and the dielectric layer rather than from changes in the intrinsic properties of the SWNTs. This was proven by studying the conditions of stepwise gate sweep experiments and time measurements. This paper also shows that top gate SWNT thin film transistors (TFTs) with an SU-8 dielectric layer could provide a practical solution to the hysteresis problem for SWNT TFTs in electronic circuit applications.

Effects of UV light and carbon nanotube dopant on solution-based indium gallium zinc oxide thin-film transistors

We studied the effects of ultraviolet (UV) light and the electrical properties of solution-based indium gallium zinc oxide single-walled carbon nanotube thin-film transistors ( SB-IGZO/SWNT TFT), compared with those of solution-based IGZO TFT. Of these devices, the SB-IGZO/SWNT TFT had excellent photo-induced current-sensitivity under illumination and significantly slower recovery of the transfer characteristics after switching off the UV light. To explain these unique photo-response behaviors, we believe that SWNTs play an important role as carrier transport rods during device operation and as electron traps in the device off-state, along with electron–hole pairs due to the UV light illumination.