There are several techniques to realize adiabatic logic but most of them require compliment forms. In this work, a new adiabatic logic technique has been proposed which is capable of working with a single time varying supply voltage. The most attractive feature of the proposed technique is that there is no need of complementary inputs. The proposed adiabatic logic has been implemented by adding charging and discharging paths in the existing standard CMOS logic, using diodes and capacitors. Further, various logic circuits such as INVERTER, NAND, NOR, half adder and positive edge triggered D-flip-flop have been implemented using the proposed adiabatic logic technique. A mathematical expression has been developed to explain the energy dissipation in proposed adiabatic logic technique. All the proposed circuits have been simulated for a time varying supply voltage, peak value of 0.9 Volt. A comparison of these logic circuits designed using 90nm TSMC MOS model, with their standard CMOS based structure shows a large improvement in power consumption to the tune of 60%. The results show that a considerable reduction in power dissipation can be achieved with the proposed adiabatic logic technique and thus we can save significant amount of energy compared to conventional CMOS circuits.