Capacitance Modulation Research Articles

A 28-nm 9T SRAM-based CIM macro with capacitance weighting module and redundant array-assisted ADC

In the emerging field of Computing-in-Memory (CIM), this study introduces a 28-nm CMOS-based Static Random Access Memory (SRAM) CIM macro capable of various computational modes, potentially offering a solution to the Von Neumann bottleneck. Beyond traditional SRAM read and write operations, to enhance the flexibility of the CIM macro, a 9T cell is proposed for performing AND, OR, and XNOR operations; a new capacitive weighting module is introduced to reduce the area of conventional ladder capacitors; and a redundant array-assisted Analog-to-Digital Converter (ADC) is proposed to improve linearity during ADC quantization. The proposed architecture can achieve multi-bit multiplication and accumulation (MAC), OR accumulation (ORA), and XNOR accumulation (XNORA). Simulated using a 28-nm CMOS process, the architecture demonstrated a minor standard deviation in BL voltage of 16.27 mV at the SS process corner, as evidenced by Monte Carlo simulation. At the TT process corner, the energy expenditure for MAC, XNORA, and ORA operations was 5.76, 5.85, and 5.82 fJ/op, respectively.

On-state performance enhancement of AlGaN/GaN Fin-HEMTs by using arcuate sidewalls

In this study, AlGaN/GaN Fin-HEMTs with different nanochannel geometric parameters were fabricated and comprehensively characterized. In the arcuate Fin-HEMTs, where the sidewalls arcuate from the source to the drain side, enhancements in the drain current density and transconductance were observed. By extracting and analyzing parameters obtained from small-signal measurements and conducting an analysis of gate capacitance, it was demonstrated that the enhancement can be attributed to the modulation of gate capacitance. This enhances the control capability of the gate over channel carriers, resulting in increased transconductance of the device. Due to the enhanced transconductance, the fT and fmax of the arcuate Fin-HEMTs are both enhanced. Notably, the arcuate Fin-HEMTs achieved a power-added efficiency of 71.4% at a frequency of 3.6 GHz and a drain voltage of 20 V. Meanwhile, the linearity of the arcuate Fin-HEMTs is improved compared with the conventional Fin-HEMTs.

A MEMS resonant vacuum gauge for high vacuum measurement

In this paper, a MEMS resonant vacuum gauge (MRVG) based on the squeezed film damping is proposed and its theoretical measurement model is established. The sensitive structure and electrodes of the MRVG were fabricated on SOI wafers and were wafer level packaged including intake hole. An resonance excitation and capacitive detection circuit consists of capacitive voltage converter (C/V) module, PLL and modulation and demodulation module was designed. Experimental tests were carried out in a standard vacuum calibration chamber, and the measurement results verified the theoretical model. The indication accuracy of the MRVG is less than ±20% in the vacuum range of 9×10−5 Pa ∼ 1 Pa. Moreover, the output voltage is still not saturated at the highest vacuum level (9×10−5 Pa), which lays the foundation for subsequent measurement of higher vacuum levels.

Design and investigation of high power quality PV fed DC-DC boost converter

This study presents a new improved voltage gain dc-dc converter architecture to maximize solar photovoltaic (PV) power output. The maximum power point tracking (MPPT) method utilizes particle swarm optimization (PSO)–based artificial neural networks (ANN) to reduce the oscillations of output electrical performance at the maximum power point (MPP). For any solar cell temperature and irradiance, the ANN delivers the electrical current and voltage outputs at the MPP and thus could reach the MPP in minimum instances. A DC-DC converter needs specific characteristics to work with photovoltaic systems. These include higher voltage development to meet increased DC link voltage requirements, the continuous input current to extend the PV system life, common grounding to prevent electromagnetic interference, and reduced electrical stress with fewer components. This paper combines a quasi-switched switch inductor network and extendable diode capacitor modules to achieve the quality mentioned earlier. The converter offers constant input current, high efficiency (95 %) with considerable gain (12 times higher than input), lower voltage stress (almost one-fifth of output voltage), and a common grounding feature. The effectiveness of the proposed MPPT technique is analyzed in terms of higher efficiency, MPP tracking time, gain, and the normalized voltage stress on diodes. The experimental step is developed to validate the simulation (Simulink and Psim) results of the present research work.

A Capacitive Transparent Liquid Concentration Detecting System Based on LabVIEW

The accurate detection of transparent liquid concentrations holds widespread applications in production and daily life, making the design and development of novel detection systems crucial. In this study, a capacitance-based detection system for measuring the concentration of transparent liquids was successfully designed and implemented. The system utilized a cylindrical capacitive sensor and FDC2214 module for capacitance measurement, with data acquisition, processing, and display accomplished through an Arduino microcontroller and a LabVIEW program. The results of practical detections demonstrate that the developed system exhibits advantages such as non-contact operation, low cost, high accuracy, minimal sample requirement, and rapid detection speed. This system effectively meets the demands for transparent liquid concentration detection.

The Advancement and Utilization of Marx Electric Field Generator for Protein Extraction and Inducing Structural Alterations

This study introduces an innovative two-range, 12-stage Marx pulse generator employing thyristor switches designed specifically for the electroporation of biological cells. The generator consists of two module capacitors of different capacitances (1 μF and 0.25 μF), which enable the generation of electrical pulses with different durations and amplitudes of up to 25 kV. Safety aspects, including overcurrent and overvoltage protection mechanisms, are implemented in both the software and the hardware. In the experimental section, the tests of the Marx generator with resistive load are described in detail, and the results for the voltage fluctuations, pulse duration, and output characteristics of the generator are presented. The advantages of the design, including the high output voltage, the wide range of repetition rates, and the flexibility of the pulse parameters, are emphasized. Additionally, the research showcases the utilization of the devised generator for industrial purposes. Hence, an investigation into the efficiency of protein extraction from microalgae (Chlorella vulgaris) and the impacts of pulsed electric fields (PEFs) on the structural characteristics of casein micelles (CSMs) was chosen as an illustrative example. The obtained results provide valuable insights into the application of PEF in food processing and biotechnology and underline the potential of the developed generator for sustainable and environmentally friendly practices.

Design and Development of MPPT Solar Charge Controller for Efficiency Enhancement in Solar PV System

Maximum power point tracking charge controller simulation is done in in proteus 8 professional software and validate using development of hardware model of MPPT solar charge controller for battery. Solar panel does not generate enough voltage all time.Panel can generate 12V to 21V according to solar radiation and environmental condition. For charging of 12V battery minimum required voltage is 14.6V. So, the Maximum power point tracking controller will give extra voltage into usable current, so battery can charge in short period.Development of MPPT Solar Charge Controller is done using ardunionano controller board, ACS 712 current sensor, mosfet driver IR2102, dc-dc buck converter using mosfet, inductor, capacitor and wifi module for data collection, LCD display,LED indication for battery status of charging. Battery charge using three state charging say buck, absorption and float mode. Performance analysis done using simulation model using LCD display status, where first column of display shows PV voltage, PV current and PV power. Second column of display reads battery voltage, status of battery. Third column reads pwm duty cycle in percentage and load status. Voltage level is shown by LED. Yellow LED indicates a fully charged battery, green indicates a regular voltage, and red indicates a low voltage. Performance study was done and the model was validated using a hardware model. All parameters and functionalities for measured solar panel voltage, current, power, battery voltage, charger state, SOC, PWM duty cycle, and load status are shown in real-time on the hardware display. Three-step battery charging algorithms are utilized, specifically the buck stage, absorption stage, and float stage. The battery peak charges to 90% SOC and the battery current is almost steady during the buck stage. In the buck stage, the battery voltage rises to a peak of 14.4V. Absorption occurs in the second phase when the battery's voltage remains constant and its current decreases. Battery current will be very low in the final phase, almost like trickle current.

Strain tuning on Van der Waals negative capacitance transistors

Negative differential capacitance induced by the energy barrier formed by the nonlinear ferroelectric insulating layer during the phase transition in negative capacitance field effect transistors (NCFETs) can break through the fundamental thermionic limit of the metal-oxide-semiconductor field effect transistors (MOSFETs), which is set at a subthreshold swing (SS) of 60 mV/dec at room temperature for low-power switching. Strain engineering has been shown effective for modulating both intrinsic and coupled properties of ferroelectric materials. However, while the modulation of negative capacitance (NC) by strain primarily remains within theoretical predictions, there is a lack of experimental studies to explore its effect on NCFETs. This study introduces strain to NCFETs by utilizing the magnetostriction of Terfenol-D upon the applied magnetic field. Results reveal a decrease in SSmin from 43.5 mV/dec to 15.2 mV/dec with a compressive strain increase from 0 to −0.005%. Additionally, theoretical results by using time-evolving Ginzburg-Landau equations and Kirchhoff's laws demonstrate that compressive strain enhances both the amplitude and duration of transient NC in CuInP2S6, while vice versa under tensile strain. This work offers valuable insights for the design of NCFET devices.

Design and Development of Electromagnet Power Supply for Burst Mode Repetitive High Power Microwave Sources

Single frequency High-power microwave sources like Backward Wave Oscillator, Relativistic Magnetron etc., require a high magnetic field of about 1T to 4T for efficient operation. Single-shot HPM systems usually consist of pulsed magnetic systems. However, for repetitive HPM generation, a continuous magnetic field is required. To obtain a continuous high magnetic field in the required volume usually three solutions are worldwide preferred i.e., permanent magnet, DC electromagnet with cooling arrangements and superconductor-based magnetic coil. All these three systems are bulky, expensive and technologically demanding. In this paper, a novel power supply has been suggested that discharges a charged capacitor through a magnetic coil keeping the discharging current constant for a small period like hundreds of milliseconds to a second. An IGBT switch is used to discharge the capacitor1. The duty cycle of the IGBT switch is controlled using a current feedback signal from the hall sensor, thus keeping the current steady at a preset reference value. An experimental setup has been developed using a 300mF capacitor. A constant current up to 500A is achieved for 200mS. This system is scalable. For a longer duration of operation, more capacitor modules need to be added. Details of design, development and experimental results are presented in this paper.

Hybrid 3D Printing of Molten Metal Microdroplets and Polymers for Prototyping of Printed Circuit Boards Featuring Interdigitated 3D Capacitors

This paper presents layer‐by‐layer additive manufacturing (AM) of molten metal microdroplets and dielectric materials to fabricate multilayer hybrid circuit boards featuring interdigitated 3D capacitors. The printed metal lines have a low resistance of 5 mΩ/mm, 12 times lower than state‐of‐the‐art conductive inks. Exploiting the advantages of Sn‐based oxide as an ideal candidate for Electrical Energy Storage Systems (ESS), we successfully fabricated an out‐of‐plane capacitor module using a combination of polymer and metal materials. The fabrication process exhibited an exceptional aspect ratio of 16, illustrating the successful incorporation of 20 metal layers in the out‐of‐plane capacitor module. Q factor obtained for the 3D capacitor was in the range of 66–500. Additionally, a fully automated printing technique was employed to produce a multilayer hybrid electrical printed circuit board (PCB), eliminating the need for post‐processing. This streamlined approach presents an efficient and comprehensive solution for the one‐stop printing of intricate electrical circuits. © 2024 The Authors. IEEJ Transactions on Electrical and Electronic Engineering published by Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

Optoelectronic Transimpedance Converter Based on MOS Photovaricap for High Resistive Gas Sensors

The gas detectors consist of two parts: metal-oxides gas sensor and transducer. The sensing material is made of a thin semiconductor layer. The transducer is responsible for converting the change in the several physical parameters of the thin sensitive layer into a measurable signal. Due to the high output resistance of high resistive gas sensors and the low input currents of amplifiers, electrometric cascades are employed, followed by the conversion of the gas sensors small direct current into an active current signal using a mechanical modulator (dynamic capacitor) to enhance sensitivity and stability. The aim of this research is to analyze the main characteristics of a novel type of dynamic capacitor that utilizes a surface metal-oxide-semiconductor (MOS) photovaricap (PV) as the regulating element when detecting signals from high resistive gas sensors. For the creation of surface MOS PVs, samples of p-Si with varying resistivity were chosen. A thin layer of SiO2 was deposited on these samples, onto which a translucent metallic electrode was applied. Modulation of the PV capacitance was achieved by illuminating it with a gallium arsenide LED. As a result, the capacitance of the PV is changed, producing a variable voltage across the load resistor, which was then amplified and recorded. It was observed that the settling time of the useful signal is determined by two factors. The first is the RC chain composed of the load resistance of the gas sensor and the input capacitance of the PV, and the second is slow relaxation phenomena in the structure of the MOS PV that lead to the screening of the induced charge. Characteristics of the MOS PV as a dynamic capacitor and the features of the photo capacitance as a semiconductor element, in turn, determine the transimpedance conversion coefficient. The conducted research showed that MOS PVs can be applied to register small DC currents and voltages from high resistive gas sensors. In this case, ordinary narrowband or wideband amplifiers with relatively low input resistance can be used instead of electrometric amplifiers with mechanical dynamic capacitors. The considered circuit has been experimentally tested with commercial resistors.

A current mode capacitance multiplier employing a single active element based on Arbel-Goldminz cells for low frequency applications

In this work, a capacitor multiplier based on a Multiple Output-Voltage Difference Transconductance Amplifier (MO-VDTA) is built by using Arbel-Goldminz cells with extensive performance analysis. Considering the large chip area occupation of capacitors, capacitor multipliers are one of the most required analog building blocks in most of low frequency applications. In this respect, the obtained capacitor multiplier is tested in a 2nd order low-pass filter by changing the cut-off frequency from 2 kHz to around 12.4 kHz. The multiplication factor (denoted as “k”) of the proposed architecture can be adjusted electronically from 120 to 750 for approximately two decades, while the structure contains only a single active element with a base capacitance. Additionally, the multiplication factor can be safely increased by using additional transconductance stages in the MO-VDTA active block. In the performance analysis, post-layout results are provided in conjunction with process corners, Monte-Carlo analyses and experimental verifications on the basis of commercial off-the-shelf elements such as AD844 and LM13700s.

A voltage mode grounded capacitance multiplier with widely tunable gain for ultra-low cutoff frequency filter.

A voltage mode capacitance multiplier for ultra-low frequency physiological signal processing is designed with a circuit model. With the proposed multiplier, a filter can achieve a cutoff frequency of 12 mHz with a 1 pF basic capacitance and a 10 kΩ resistor. The corresponding multiplication factor will be 1.35 × 109. By changing the controlling terminal, the multiplication factor can be widely tuned from 1950 to 1.35 × 109 and the corresponding filter cutoff frequency will be from 12 mHz to 8.15 kHz. According to the circuit model, to further increase the multiplication factor to decrease the chip area, more multiplication stages can be added to the feedback loop.

A novel triple capacitor multi-level submodule MMC topology with fault current clearing capability

In the high voltage direct current system based on modular multilevel converter (MMC-HVDC), the half-bridge submodule (HBSM) has become the preferred submodule for significant projects due to its convenient control and low cost. However, the DC short-circuit protection performance of MMC-HVDC will seriously restrict its development in areas such as overhead lines, high voltage, and large capacity. This article proposes a triple capacitor multi-level submodule (TCMSM) topology of modular multilevel converter with DC fault-blocking capability. It utilizes at least one-third of the module capacitance in the bridge arm to reverse to suppress DC fault current and turn off the diode. At the same time, the unidirectional conductivity of the diode can also prevent arc reignition at the fault point. The article also conducted in-depth research on the DC short-circuit fault elimination mechanism of this topology, and compared its performance with other topologies. Through analysis, it can be concluded that TCMSM reduces the initial investment and operating costs by reducing the number of devices inside the module while possessing the fault current blocking ability. Finally, MATLAB/Simulink was used to simulate and verify the proposed new topology, and its performance was analyzed.

Hybrid storage system management for hybrid electric vehicles under real operating conditions

This study proposes the use and management of hybrid storage systems to power hybrid electric vehicles with the aim of reducing the negative effects of high current values on battery cycling life. Findings derive from a case study on a commercial plug-in hybrid electric vehicle with battery pack operations supported by a Lithium-ion Capacitor module. Specific experimental laboratory activities focused on the parametrization and validation of an equivalent circuit model representing the behavior of Lithium-ion capacitors for integration into the overall vehicle model (designed calibrated and validated on the basis of data from on-board data acquisition and measurement systems). The simulation platform was used to test various energy management strategies for the hybrid storage system supplying the vehicle during real driving cycles characterized by different operating conditions and driving styles. Results highlight the benefits of using the considered management strategies in terms of battery durability, allowing performance comparison for different driving routes and styles.

Evolving from an indirect evaporative cooling system to a radiant-capacitive heating and cooling system for low-mass buildings

The study shows the development of a novel passive cooling system parting from previous experience gathered with an Indirect Evaporative Passive Cooling System (IEPCS), originally employed in a low-income dwelling located in the hot-humid climate of Maracaibo, Venezuela. Using the design thinking approach, we optimized the original passive cooling system so as to curb some limitations observed in the IEPCS, and developed a novel passive cooling and heating system more suitable to refurbishment schemes of low-mass dwellings in tropical areas. We present comparative results from test runs in small-sized test cells for the subtropical climatic conditions of Curitiba, Brazil. The hydronic system operates with water circuits to and fro a thermal storage unit, a sky radiator/solar collector to radiant-capacitive modules indoors. Results showed that while both the roof-pond system and the radiative cooling system with indoor capacitive module provide stability to the indoor thermal environment, a somewhat greater thermal amplitude is observed in the latter, which is partly due to the difference in thermal mass between the two systems. Cooling output of the novel system was somewhat lower than that of an indirect evaporative system and dependent on atmospheric exposure conditions of the sky radiator. Heating output is given as a function of pumping duration. Cooling potential reached about 78 % of that of the roof-pond module, for test conditions with nocturnal sky radiative cooling and no water circulation from the storage tank to the interior during the day.

A Sigma-Delta Modulator with Single-Pole Double-Throw Analog Switch

In this paper, a high precision and high energy efficiency discrete-time switching capacitive 3-order Sigma-Delta modulator (SDM) is proposed. The SDM is applied to portable electroencephalograms (EEG) because of its little energy and good performance. The energy efficiency levels of the current mainstream modulator systems are analyzed and compared, and the CIFF modulator architecture which is most conducive to realizing high energy efficiency is selected. The single-loop CIFF structure is selected to give consideration to the accuracy and stability of the circuit. The circuit is implemented in a hierarchical structure, and a single-pole double-throw (SPDT) analog switch is adopted to overcome the difficulty of opening conventional CMOS analog switches at low supply voltages and the increase in threshold voltage Vth of NMOS devices due to the base bias effect. The proposed discrete-time Sigma delta ADC modulator is designed with SMIC 0.18um CMOS technology and achieves an SNDR of 101.6dB under a 1.8V power supply voltage and a signal bandwidth of 2kHz. The power consumption is 520uW and the significant bit (ENOB) is 16.58 bits.

A Five Level SC Inverter with reduced switch count and self balancing capability

Multilevel inverters (MLIs) have become a favoured option for medium voltage and high power DC to AC conversion applications to assure high power level cascade type inverter which accepts multiple/single DC sources and offers combined AC output for appropriate voltage and frequency. MLIs provide various benefits over two-level inverters, including lower dv/dt, the capacity to handle greater voltage levels, a quasi-sinusoidal output waveform, and lower Total Harmonic Distortion (THD), among others. The biggest problem in adopting the MLI is the increasing number of switches and it's design. MLIs based on switched capacitors (SC) for boost-type DC-AC converters often demonstrate a trade-off among switch voltage rating and switch count. This work introduces a new 5-level(5L) SC inverter by adding a switched capacitor module into the usual 3L neutral point clamped inverter leg(NPC). The SC unit consists of one bidirectional switch and two capacitors capable of withstanding one-quarter of the DC voltage. When compared to typical 5L inverters, such as standard NPC and active NPC designs, the new approach in addition reduces the amount of switches but also shorten the topology. The proposed FLSCI has been examined by using several PWM techniques. The simulation and hardware results showed that the presented FLSCI is ideal for a broad variety of applications.

Surface potential and mobile charge based drain current modeling of double gate junctionless accumulation mode negative capacitance field effect transistor

AbstractAn analytical drain current model for double gate junctionless accumulation mode negative capacitance field effect transistor (DG‐JAM‐NC‐FET) has been developed, combining the merits of junctionless accumulation mode and negative capacitance effect such as fabrication feasibility, low power dissipation, and reduced degradation in mobility. The novelty manifested in our work is because of the incorporation of the JAM structure in ferroelectric‐based negative capacitance FET. The benefit of JAM over existing FETs is that it combines the benefits of the junctionless transistor (JLT) and conventional FETs. It avoids excessive parasitic resistance due to stronger doping in the source and drain areas, resulting in higher conductivity and better characteristics than JLT. An analytical surface potential and threshold voltage have been developed using Poisson's equation and Landau Khalatnikov's (L‐K) equation. The drain current is then determined by integrating the mobile charge using the Pao–Sah integral. Various critical parameters such as surface potential, gain, capacitance, mobile charge density, drain current, threshold voltage, subthreshold swing, transconductance, and the switching ratio have been assessed extensively by varying ferroelectric layer and channel layer thicknesses, respectively. The ON current increases with the increase in ferroelectric thickness due to the voltage amplification given by the ferroelectric layer, and the switching curve gets steeper. The analytical modeling is done in MATLAB, and its comparison is made with the TCAD numerical simulation. The obtained analytical results and the numerical simulation results correspond well.

Vulnerability to Parameter Spread in Josephson Traveling-Wave Parametric Amplifiers

We analyze the effect of circuit parameter variation on the performance of Josephson traveling-wave parametric amplifiers (JTWPAs). Specifically, the JTWPA concept we investigate is using flux-biased nonhysteretic rf-SQUIDs in a transmission line configuration, which harnesses the three-wave mixing (3WM) regime. Dispersion engineering enables phase-matching to achieve power gain of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\sim$</tex-math></inline-formula> 20 dB, while suppressing the generation of unwanted mixing processes. Two dispersion engineering concepts using a 3WM-JTWPA circuit model, i.e., resonant phase-matching (RPM) and periodic capacitance modulation (PCM), are discussed, with results potentially also applicable to four-wave-mixing (4WM) JTWPAs. We propose suitable circuit parameter sets and evaluate amplifier performance with and without circuit parameter variance using transient circuit simulations. This approach inherently takes into account microwave reflections, unwanted mixing products, imperfect phase-matching, pump depletion, etc. In the case of RPM the resonance frequency spread is critical, while PCM is much less sensitive to parameter spread. We discuss degrees of freedom to make the JTWPA circuits more tolerant to parameter spread. Finally, our analysis shows that the flux-bias point where rf-SQUIDs exhibit Kerr-free nonlinearity is close to the sweet spot regarding critical current spread.