We report a novel common gate-stack solution for In 0.7 Ga 0.3 As n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) and Ge 0.97 Sn 0.03 p-channel metaloxide-semiconductor field-effect transistors (pMOSFETs), featuring sub-400 °C Si 2 H 6 passivation, sub-1.75-nm capacitance equivalent thickness (CET), and single TaN metal gate. By incorporating Si 2 H 6 passivation, an ultrathin SiO 2 /Si interfacial layer is formed between the high-k gate dielectric and the high mobility InGaAs and GeSn channels. The In 0.7 Ga 0.3 As nMOSFET and Ge 0.97 Sn 0.03 pMOSFET show drive currents of ~143 and ~69μA/μm, respectively, at |V DS | and |V GS - V TH | of 1V for a gate length L G of 4 μm. At an inversion carrier density N inv of 10 13 cm -2 , In 0.7 Ga 0.3 As nMOSFETs and Ge 0.97 Sn 0.03 pMOSFETs show electron and hole mobilities of ~495 and ~230cm 2 /V·s, respectively. At N inv of 4 × 10 12 cm -2 , electron and hole mobility values of ~705 and ~ 346cm 2 /V·s are achieved. Symmetric V TH is realized by choosing a metal gate with midgap work function, and CET of less than 1.75nm is demonstrated with a gate-leakage current density (JG) of less than 10 -4 A/cm 2 at a gate bias of V TH ± 1V. Using this gate-stack, a Ge 0.95 Sn 0.05 pMOSFET with the shortest L G of 200nm is also realized. Drive current of ~680μA/μm is achieved at V DS of -1.5V and V GS - V TH of -2V, with peak intrinsic transconductance G m,int of ~492μS/μm at V DS of -1.1V.