Buried Metal Layer Research Articles

Performance Analysis of Incorporating a Buried Metal Layer in a Junction-Less Multi-Channel Field Effect Transistor

Performance Analysis of Incorporating a Buried Metal Layer in a Junction-Less Multi-Channel Field Effect Transistor

Improvement the Breakdown Voltage and the On-resistance in the LDMOSFET: Double Buried Metal Layers Structure

In this paper, a new method is investigated to improve the breakdown voltage in the lateral power MOSFET transistors. The structure is based on Double Buried Metal Layers in the Lateral Diffused MOSFET and it is called DBML-LDMOSFET. The metal layers in the buried oxide under the drift region cause the electric field to be more uniform than the conventional structure. In the DBML-LDMOSFET Structure, the breakdown voltage is improved 25% compared to conventional structure and also the specific on-resistance is almost 11.32 mΩ.cm2. In order to investigate the performance of the structures, SILVACO-ATLAS software has been used and the results have been extracted.

Development of Backside Buried Metal Layer Technology for 3D-ICs

Abstract In this study, we developed backside buried metal (BBM) layer technology for three-dimensional integrated circuits (3D-ICs). In this technology, a BBM layer for global power routing is introduced in the large vacant area on the backside of each chip and is parallelly connected with the frontside routing of the chip. The resistances of the power supply (VDD) and ground (VSS) lines consequently decrease. In addition, the BBM structure acts as a decoupling capacitor because it is buried in the Si substrate and has metal–insulator–silicon structure. Therefore, the impedance of power delivery network can be reduced by introducing the BBM layer. The fabrication process of the BBM layer for 3D-ICs was simple and compatible with the via-last through-silicon via (TSV) process. With this process, it was possible to fabricate the BBM layer consisting of electroplated Cu (thickness: approximately 10 μm) buried in the backside of the CMOS chip (thickness: 43 μm), which was connected with the frontside routing of the chip using 9 μm-diameter TSVs.

A Thick Cu Layer Buried in Si Interposer Backside for Global Power Routing

A layer of thick Cu metal is buried in the backside of a Si interposer and provides low resistivity and high capacitance for high-performance on-die power delivery networks (PDNs). The backside buried metal (BBM) layer can be as thick as $10 ~\mu \text{m}$ or even larger, and the stripes formed on the layer for interleaving power supply ( $V_{\mathrm {DD}}$ ) and ground ( $V_{\mathrm {SS}}$ ) wirings have large cross-sectional areas. The process flow developed for BBM is fully compatible with via-last type through-silicon via manufacturing. The Si interposer with BBM is stacked over an integrated circuit (IC) chip for improving PDN performance and suppressing power supply noise, as an over-the-top Si interposer (OVTT-SiIP). A test device of 65-nm CMOS digital IC chip and OVTT-SiIP was manufactured. The noise suppression ratio of 59.6% by the OVTT-SiIP technology is demonstrated by simulation with a full-chip PDN equivalent circuit network model and consistent with 49.7% by measurements on the test device with on-chip power noise monitoring function.

Energy transfer dynamics in strongly inhomogeneous hot-dense-matter systems.

Direct measurements of energy transfer across steep density and temperature gradients in a hot-dense-matter system are presented. Hot-dense-plasma conditions were generated by high-intensity laser irradiation of a thin-foil target containing a buried metal layer. Energy transfer to the layer was measured using picosecond time-resolved x-ray emission spectroscopy. The data show two x-ray flashes in time. Fully explicit, coupled particle-in-cell and collisional-radiative atomic kinetics model predictions reproduce these observations, connecting the two x-ray flashes with staged radial energy transfer within the target.

Planar Junctionless Silicon-on-Insulator Transistor With Buried Metal Layer

In this letter, we propose a novel structure of an n-channel silicon-on-insulator junctionless transistor (SOI-JLT) with improved ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio and scalability. A buried metal layer (BML) of appropriate workfunction ( $\phi _{\text {BM}}$ ) is used to create a Schottky junction at the bottom of Si device layer, whereas the source–channel–drain path is junctionless and hence named the buried-metal-SOI-lateral JLT (BM-SOI-LJLT). The BML-induced bottom depletion layer combined with the depletion region due to top gate results in a perfect volume depletion in OFF state. A 2-D calibrated simulation has shown an ${I} _{ \mathrm{\scriptscriptstyle ON}}/{I} _{ \mathrm{\scriptscriptstyle OFF}}$ ratio of ~108 in BM-SOI-LJLT compared to ~2 in the conventional SOI-JLT at $\phi _{\text {BM}}$ of 5.1 eV and a gate length of 20 nm. Furthermore, the lateral band-to-band tunneling parasitic leakage is significantly lower in the BM-SOI-LJLT and does not degrade its ${I} _{ \mathrm{\scriptscriptstyle ON}}/{I} _{ \mathrm{\scriptscriptstyle OFF}}$ ratio. Furthermore, high vertical field due to the Schottky junction minimizes the lateral coupling between the source and drain field lines and thus improves the short-channel-effect suppression and scalability of the proposed device.

New technique to extend the vertical depletion region at SOI-LDMOSFETs

In order to obtain an excellent performance for silicon-on-insulator lateral double-diffused MOSFET (SOI-LDMOSFET) transistors, we introduce a new technique to extend the depletion region along the vertical direction in the drift region. The proposed structure is called vertically depleted LDMOSFET (VD-LDMOSFET). The VD-LDMOSFET structure consists of a buried metal layer in the oxide region. The drift region of the VD-LDMOSFET is vertically depleted, not only from the buried oxide, but also by the incorporated metal layer in the buried oxide. Therefore, a higher drift doping density is achieved by an extension of the depletion region in the drift region and the on-state resistance $$({R}_{\mathrm{ON}})$$ reduces without degradation of the breakdown voltage. Also, an additional peak is created in the electric field distribution of the proposed structure and causes a reduction of the electric field peak near the gate and the drift region junction at the top surface of the device. Therefore, the breakdown voltage $$({V}_{\mathrm{BR}})$$ of the VD-LDMOSFET structure increases. The simulation results illustrate that by optimizing the doping density of the drift region and the dimensions of the metal layer in the proposed structure, the on-state resistance (28.9%) and the breakdown voltage (36.1%) are improved greatly and a superior tradeoff is achieved compared with a conventional SOI-LDMOSFET (C-LDMOSFET) structure.

Tunable Optical Nanocavity of Iron-garnet with a Buried Metal Layer

We report on the fabrication and characterization of a novel magnetophotonic structure designed as iron garnet based magneto-optical nanoresonator cavity constrained by two noble metal mirrors. Since the iron garnet layer requires annealing at high temperatures, the fabrication process can be rather challenging. Special approaches for the protection of metal layers against oxidation and morphological changes along with a special plasma-assisted polishing of the iron garnet layer surface were used to achieve a 10-fold enhancement of the Faraday rotation angle (up to 10.8°/µm) within a special resonance peak of 12 nm (FWHM) linewidth at a wavelength of 772 nm, in the case of a resonator with two silver mirrors. These structures are promising for tunable nanophotonics applications, in particular, they can be used as magneto-optical (MO) metal-insulator-metal waveguides and modulators.

Vertical bipolar charge plasma transistor with buried metal layer.

A self-aligned vertical Bipolar Charge Plasma Transistor (V-BCPT) with a buried metal layer between undoped silicon and buried oxide of the silicon-on-insulator substrate, is reported in this paper. Using two-dimensional device simulation, the electrical performance of the proposed device is evaluated in detail. Our simulation results demonstrate that the V-BCPT not only has very high current gain but also exhibits high BVCEO · fT product making it highly suitable for mixed signal high speed circuits. The proposed device structure is also suitable for realizing doping-less bipolar charge plasma transistor using compound semiconductors such as GaAs, SiC with low thermal budgets. The device is also immune to non-ideal current crowding effects cropping up at high current densities.

Time-Resolved Surface Infrared Spectroscopy during Atomic Layer Deposition

This work presents a novel method for obtaining surface infrared spectra with sub-second time resolution during atomic layer deposition (ALD). Using a rapid-scan Fourier transform infrared (FT-IR) spectrometer, we obtain a series of synchronized interferograms (120 ms) during multiple ALD cycles to observe the dynamics of an average ALD cycle. We use a buried metal layer (BML) substrate to enhance absorption by the surface species. The surface selection rules of the BML allow us to determine the contribution from the substrate surface as opposed to that from gas-phase molecules and species adsorbed at the windows. In addition, we use simulation to examine the origins of increased reflectivity associated with phonon absorption by the oxide layers. The simulations are also used to determine the decay in enhancement by the buried metal layer substrate as the oxide layer grows during the experiment. These calculations are used to estimate the optimal number of ALD cycles for our experimental method.

Silicon CMOS Ohmic Contact Technology for Contacting III-V Compound Materials

Silicon (Si)-encapsulated III-V compound (III-V) device layers enable Si-complementary metal-oxide semiconductor (CMOS) friendly ohmic contact formation to III-V compound devices, allowing for the ultimate seamless planar integration of III-V and Si CMOS devices in a common fabrication infrastructure. A method of making ohmic contacts to buried III-V films using silicide metallurgies has been established. NiSi/Si/III-V dual heterojunction contact structures are found to be optimal for integration. These structures allow contact resistivities to be controlled by Si/III-V interfaces and eliminate interactions between the buried III-V device and metal layers. Using a modified transmission line method (TLM) test structure fabricated using standard CMOS processing techniques, the specific contact resistivities of Si/GaAs and Si/InxGa1-xAs interfaces are extracted. The relationship between specific contact resistivity and heterojuntion barrier width is considered. Among the structures tested in this work, p-type Si/GaAs and n-type Si/InxGa1-xAs yielded the lowest contact resistivities. Using the p-type Si/GaAs interface, a GaAs/AlxGa1-xAs laser with NiSi top contact is demonstrated, confirming the feasibility of NiSi/Si/III-V contact structures for III-V devices.

Dynamic Infrared Electro-optic Response of Soluble Organic Semiconductors in Thin Film Transistors

ABSTRACTWe use a frequency-dependent electro-optic technique to measure the hole mobility in small molecule organic semiconductors, such as 6,13 bis(triisopropylsilylethynyl)-pentacene. Measurements are made on semiconductor films in bottom gate, bottom contact field-effect transistors (FETs.) Because of the buried metal layer effect the maximum response, due to absorption in the charge layer, will be for a dielectric film ∼ 1/4 of a wavelength (in the dielectric) (e.g. ∼ 1 micron thick in the infrared.) Results are presented for FETs prepared with both spin-cast polymer and alumina dielectrics prepared by atomic layer deposition. At low frequencies the results are fit to solutions to a non-linear differential equation describing the spatial dependence of flowing charge in the FET channel, which allows us to study multiple crystals forming across one set of drain-source contacts. FETs prepared on alumina dielectrics show interesting deviations from the model at high frequencies, possibly due to increased contact impedance.

The investigation of the structural and electrophysical properties of carbon nanotubes with controlled dopant and defect composition

The structures on the basis of carbon nanotubes (CNT) produced by thermal decomposition of acetonitrile on the Si―SiO 2 substrates and metal layers are investigated by scanning electron microscopy (SEM), atomic force microscopy (AFM), scanning tunneling microscopy (STM), X-ray diffraction (XRD), Raman scattering. The CNT layers grown on the silicon oxide with volumetric catalyst (Fe) show predominantly perpendicular to substrate growth of the nanotubes. In the area of the metallic layers (Ni catalyst film and buried metal layer) the CNT bundles parallel to substrate form with graphite and amorphous carbon. The activation character of the temperature dependence of the conductivity of the CNT layer is observed and discussed.

Nanoscale probe system for cell-organelle analysis

Abstract Planar and bended needle shaped probes with a dual electrode system in submicron size have been developed for electrochemical analyses of living single cells. The probe system is designed for local probing of the cytosolic cell environment and cell organelles using amperometric, potentiometric and impedance spectroscopic methods. Silicon nitride cantilevers with an electrode metal layer system are fabricated on 4-in. wafers using conventional micro-fabrication techniques. The probe needle structures with a tip in submicron scale are patterned using focus ion beam (FIB) technology. A focused ion beam is utilized to write the probe needle shape into the pre-shaped cantilever and, for a dual electrode system, the probe is divided into two parts to create two separate electrodes. Subsequently, the planar needle structures are released from the supporting bulk silicon during a wet etching step, and a silicon nitride layer is deposited to isolate and embed the electrode metal layer. Finally, FIB milling is used for a precise exposure of the buried metal layer by cutting the top of the tip. Bended nano-probes for simultaneous AFM analyses were fabricated by combining this process with pre-structured wafers. This way AFM probe systems with high aspect ratio silicon nitride tips with single and dual electrochemical transducers can be manufactured. Electrochemical and mechanical characterization of planar and bended probes showed full functionality. The sharpness of the probe tip with a radius of smaller than 50 nm and the mechanical robustness of the needle structure allow for a reliable scanning as well as penetration of cell membranes. Initial measurements of cell membrane potentials and cell membrane impedances of rat fibroblast cells using Ag/AgCl transducer probes demonstrate the analytical capability of these probes in biological environments.

Probing thin over layers with variable energy/cluster ion beams

A series of carbon-coated magnetic recording disks proved ideal for exploring sampling depth and ion formation trends as a function of variations in energy and cluster size (Au x ) of the primary ion beam, and variations in over coat thickness and type. Ion yield from the underlying metal layer increased with increasing energy and decreasing cluster size of the primary ions. The yields varied nearly linearly with over layer thickness. In contrast, M x Cs y depth profiles were unaffected by changes in the primary ion. The samples were fortuitously dosed with dinonyl phthalate, allowing a study similar to prior GSIMS work [I.S. Gilmore, M.P. Seah, J.E. Johnstone, in: A. Benninghoven, P. Bertrand, H.-N. Migeon, H.W. Werner (Eds.), Proceedings of the 12th International Conference on SIMS, Elsevier, Brussels, 2000, p. 801]. Ions prominent in the EI mass spectrum, including even electron ions, were more consistently enhanced at lower energies and higher cluster sizes than the primary ( M + H) + ion. The total secondary ion count was inversely proportional to the film thickness. Secondary electrons, largely originating in the buried metal layer, may be inducing organic ion formation [A.M. Spool, Surf. Interface Anal. 36 (2004) 264].

Nanoscale electrochemical probes for single cell analysis

Needle shaped probes with a dual electrode system in submicron size have been developed for electrochemical analyses of living single cells. The probe system is designed for local probing of the cytosolic cell environment and cell organelles using amperometric, potentiometric and impedance spectroscopic methods. Silicon nitride cantilevers with an electrode metal layer system are fabricated on 4 in. wafers using conventional micro fabrication techniques. The probe needle structures with a tip in sub micron scale are patterned using focus ion beam (FIB) technology. A focused ion beam is utilized to write the probe needle shape into the pre-shaped cantilever and, for a dual electrode system, the probe is divided into two parts to create two separate electrodes. Subsequently, the needle structures are released from the supporting bulk silicon during a wet etching step, and a silicon nitride layer is deposited to isolate and embed the electrode metal layer. Finally, FIB milling is used for a precise exposure of the buried metal layer by cutting the top of the tip. Electrochemical characterization of nano-probes showed full functionality of Ag/AgCl as well as of platinum transducer systems. The sharpness of the probe tip with a radius of less than 50 nm and the mechanical robustness of the needle structure allow for a reliable penetration of cell membranes. Initial measurements of cell membrane potentials and cell membrane impedances of rat fibroblast cells using Ag/AgCl transducer probes demonstrate the analytical capability of these probes in biological environments.

Mixing behaviour of buried transition metal layer in silicon due to swift heavy ion irradiation

The changes in behaviour of mixing at the interface of Si/Me/Si (Me=V, Fe, Co) due to irradiation by swift heavy ions of Au at 120MeV with respect to the ion dose is reported here. The fluences were varied from 1×1013 to 1×1014ions/cm2 on the bi-layers of Si/Me/Si (Me=V, Fe, Co). The interface of Si/Me (Me=V, Fe, Co) was characterized using Rutherford backscattering spectroscopy (RBS) and secondary ion mass spectrometry (SIMS). In all the three cases, the atomic mixing width was found to be increasing monotonically with ion fluence. The mixing rate calculations were made and the diffusivity values thus obtained suggested a transient melt phase at the interface according to thermal spike model. Further work on the irradiated samples for characterizing the buried layers and formation of stable silicide phases by annealing are being carried out.

Orientation of avidin molecules immobilized on COOH-modified SiO 2/Si(1 0 0) surfaces

Avidin molecules were immobilized on a COOH-modified SiO 2/Si(1 0 0) surface with subnano-level flatness (root-mean-square (rms) roughness ≈0.1 nm) forming covalent bonds between the COOH groups on the substrate surface and the NH 2 groups of avidin molecules. The structures of avidin-immobilized surfaces were investigated by atomic force microscopy (AFM), ellipsometry, and infrared (IR) reflection absorption spectroscopy using buried metal layer substrate (BML-IRRAS), and transmission IR absorption spectroscopy (TIRAS). These data have evidenced that the avidin molecules are immobilized with the 2-fold symmetry axis of the tetramer almost perpendicularly to the substrate surface.

Considerations of optical anisotropy in the simulation of reflection absorption infrared spectra

Simulations of multilayer reflection–absorption infrared spectra (RAIRS) are commonly based upon the application of Greenler equations which treat each layer as being optically isotropic. Extensions of the theory to include anisotropic adsorbate layers are also available but discussion of anisotropy in subsequent substrate layers have largely been ignored. In this paper, based on known principles, we develop a general theory for the simulation of RAIR spectra taking into account optical anisotropy in any or all layers of a many-layered system. The effect of considering optical anisotropy is illustrated by a four-layer system (typical when using the so called buried metal layer BML method) where adsorbate-induced substrate-derived bands may be observed. We show that in such cases, the effect of optical anisotropy may significantly alter the appearance of the spectrum.

Cantilever tip probe arrays for simultaneous SECM and AFM analysis

A cantilever transducer system with platinum tip electrodes in sub-micron regime has been fabricated for simultaneous Scanning Electrochemical Microscopy (SECM) and Atomic Force Microscopy (AFM) analysis. Sharpened High Aspect Ratio Silicon (HARS) tips are shaped combining isotropic and anisotropic deep-reactive etch processes and form the body of the transducer. Deposition of a silicon nitride followed by a back etch step allows embedding these silicon tips in a silicon nitride layer so that they protrude through the nitride. This way, embedded silicon tips with a diameter smaller than 600 nm, a radius smaller than 50 nm, and an aspect ratio higher than 20 can be achieved. Subsequently, a platinum layer and an insulator layer are deposited on these tip structures. Introducing a metal masking technology utilizing Focused Ion Beam (FIB) technology, a precise exposure of the buried metal layer can be achieved to form ultra micro-electrodes on top of the tip. Finally, cantilever structures are shaped and released by etching the silicon substrate from the backside. Electrochemical and mechanical characterization show full functionality of the transducer system. Due to the high aspect ratio topography of the tip structure and low spring constant of silicon nitride cantilevers, these probes are particularly suited for high resolution SECM and AFM analysis. Furthermore, this technology allows a production of both linear probe arrays and two-dimensional probe arrays.