Buck Voltage Regulator Research Articles

Design for a Four-Stage DC/DC High-Voltage Converter with High Precision and a Small Ripple

This paper presents a four-stage DC/DC converter with high precision and a small ripple utilized in an electronic power conditioner (EPC). The galvanically isolated four-stage topology contains four cascade connections: a buck circuit, a push–pull circuit, a power converter, and a voltage regulator. The push–pull switches, as well as the diodes in the output-side rectifier, operate in zero-voltage switching (ZVS) and zero-current switching (ZCS) modes at both switch off and switch on, which helps increase the efficiency. The maximum efficiency of the converter can reach 94.5%. The buck circuit and voltage regulator operate in a two-stage closed-loop condition and, thus, the precision is greater than 0.02%. Due to the voltage regulator, the ripple is less than 1 V when the output voltage reaches 7000 V.

A Universal PSpice Simulation Model of a Switched Buck Voltage Regulator

The article describes the design of a universal simulation model of a voltage regulator for applications compatible with the globally used PSpice program. Users can create a model of any type of integrated switching voltage regulator that is currently available on the market by setting its individual parameters. The proposed connection of the regulator was applied in the connection of the buck DC–DC converter. The accuracy of the model was verified by comparing the results obtained by the simulation to other official models and to practical measurements taken on a real sample of the converter. The versatility of the model was proven by comparison with another type of converter with different parameters.

Design and development of multiphase buck converters for voltage regulator modules

<p>Modern microprocessors in high-power applications require a low input voltage and a high input current, necessitating the use of multiphase buck converters. As per microprocessor computing complexity, the power requirements of the switching converter will also be more important and will be increasing as per load demand. Previous studies introduced some methods to achieve the advantages associated with multiphase regulators. This paper presents an effective closed closed-loop control scheme for multiphase buck converters that reduces ripple and improves transient response. It is suitable for applications that require regulated output voltage with effectively reduced ripple. The analysis began with a simulation of the entire design using the OrCAD tool, followed by the construction of a hardware setup. Experiments on a 200 Khz, 9 V, 12 A, 2-phase buck voltage regulator were conducted and the proposed experiment found to be useful.</p>

Four-Frequency Small-Signal Model for High-Bandwidth Voltage Regulator With Current-Mode Control

High-bandwidth buck voltage regulator with peak current-mode control is a commonly-used scheme, especially for CPU power applications. However, the conventional single-frequency and three-frequency models are inaccurate in modeling the loop gain stability when the control bandwidth is close or higher than one-third of the converter switching frequency. A more accurate four-frequency small-signal model for a high-bandwidth buck converter with peak current-mode control is proposed in the present paper. The describing function approach is used to model the duty-cycle modulator. The effects of the four-frequency components, including the modulating frequency, the two sideband harmonics, and the switching frequency, are considered. Simulations and experiments verified the results.

A 1S Direct-Battery-Attach Buck Voltage Regulator With 5-Stack Thin-Gate 22-nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers

A 1S Direct-Battery-Attach Buck Voltage Regulator With 5-Stack Thin-Gate 22-nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers

A Current-Mode Digital AOT 4-Phase Buck Voltage Regulator

A synthesizable digital adaptive on-time (AOT) 4-phase buck voltage regulator (VR) for digital systems is presented. A current-mode digital AOT controller with the proposed ripple-injection schemes allow a fast and stable output voltage regulation, a fixed switching frequency operation, and phase synchronization for a multiphase VR. The digital AOT controller is implemented in the area of 0.0054 mm2 using digital standard cells in an automated digital-design flow. The proposed VR achieves an 80-mV droop with a recovery time of 80 ns and greater than 85% power-conversion efficiency over a 50 mA to 1.2-A load current range.

Estimation of Failure State of Buck Voltage Regulator

Failure Mode Effect and Diagnostic Analysis is typical way to define Failure in time for a given design by performing fault analysis on each element of the design. However it may not always accurately determine the erroneous state for a self-correcting designs. An example of self-correcting designs is a buck voltage regulator in which output and required voltage are continuously compared to achieve desired output voltage. This paper assess the true failure state of a buck regulator by performing FMEDA in detail and with reasonable failure probability on each element a MARKOV state model is applied to estimate true failure state of buck VR

A Dual-Switch Discontinuous Current-Source Gate Driver Overcoming the Current Diversion Problem for a Buck VRM

In this article, a novel dual-switch discontinuous current-source gate driver (CSD) suitable for driving the high-side mosfet (HS mosfet ) of buck voltage regulator module (VRM) is presented. The proposed gate driver completely solves the gate current diversion problem, which most of the previous CSDs suffer from, during turn- off transition. Thus, in comparison to most of the previous CSDs, the proposed gate driver achieves to turn- off the power mosfet considerably faster and with much higher effective gate current, which leads to significant reduction of turn- off losses. Whereas, turn- on losses of buck VRM HS mosfet driven by the proposed CSD and the previous CSDs are equal. Furthermore, the introduced gate driver consists of the minimum number of control switches and circuit elements, compared to previous CSDs. The proposed gate driver is analyzed and a prototype of the driver operating at 1 MHz is implemented in order to validate the theoretical analysis.

A Dual-Switch Discontinuous Current-Source Gate Driver for a Narrow On-Time Buck Converter

This paper presents a new discontinuous current-source driver (CSD) with two control switches. The introduced CSD is appropriate for narrow on-time applications such as buck voltage regulator module. This driver has some important features such as considerable gate drive loss reduction due to gate energy recovery, significant reduction of switching losses, low circulating losses, and high Cdv / dt immunity. Compared to other discontinuous CSDs, the proposed circuit has following advantages: 1) reduced number of switches; 2) capability of operating at higher frequency for a specific duty cycle or ability to achieve smaller minimum duty cycle for a certain switching frequency. The proposed gate drive is analyzed and a 1-MHz prototype is implemented to validate the features of the proposed circuit.

A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS

A fully integrated digitally controlled buck voltage regulator, featuring hysteretic and pulse frequency modulation control for maximum light load efficiency, with 3-D through-silicon-via-based on-die solenoid inductor with a planar magnetic core in 14-nm tri-gate CMOS, demonstrates 111 nH/mm2 inductance density and 80% conversion efficiency. The inductance density demonstrated is 20 $\times $ higher than comparable on-die lateral- or spiral-based inductor densities leading to higher light load efficiency.

A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS

A fully integrated digitally controlled two-phase buck voltage regulator (VR) with on-die solenoid inductors with a planar magnetic core is demonstrated in 14-nm tri-gate CMOS for fine-grained power delivery/management domains of high power density in system-on-chips while enabling ultra-thin (z-height) packages. The VR achieves 1-A/mm2 power density for 400-mA load current with a measured peak efficiency of 84% at 100-MHz switching frequency including a digital PWM with >9 bits (8 ps) of resolution.

An All-Digital Fully Integrated Inductive Buck Regulator With A 250-MHz Multi-Sampled Compensator and a Lightweight Auto-Tuner in 130-nm CMOS

A 125-MHz fully integrated inductive buck voltage regulator using 11.6-nH wirebond inductance and 3.2-nF on-chip capacitance is presented in 130-nm CMOS. An all-digital architecture is presented to ease integration in digital process nodes. The IVR demonstrates enhanced bandwidth enabled by a multi-sampled digital compensator with reduced precision computation. A fast and lightweight auto-tuning engine is presented to optimize steady-state stability and transient response under variation in passives. A resistive transient assist scheme and an adaptive all-digital discontinuous conduction mode control are presented to reduce transient response time and enhance light-load efficiency, respectively. The 130-nm testchip demonstrates a peak efficiency of 71% and a 2.9-V/ $\mu \text{s}$ output slew during large reference transient.

Analytical calculation method for the non-linear characteristic of ferrite-cored inductors with stepped air gap

Magnetic devices are essential components in the field of power electronics. Exploiting the non-linear behavior of inductors and transformers offers the great merit of increasing the performance of switch mode power supplies. For instance, the light-load efficiency of a buck voltage regulator can be improved by using a non-linear inductor with stepped air gap. Moreover, non-linear chokes can be used for passive power factor correction or are employed in solar PV systems. For an optimal design, however, a controlled decrease in inductance at a larger current is required. Such a characteristic is displayed by inductors with stepped air gaps. To optimize the gap geometry, the knowledge of the exact behavior of the non-linear choke is crucial. As simulation tools require rather long computation times to calculate the non-linear characteristic, the authors chose a different approach. This paper demonstrates the analytical calculation of the current depending inductance of pot cores with stepped air gap. By solving a boundary value problem the magnetic vector potential inside the winding area is obtained assuming linear core material. Subsequently, the non-linearity of the core material is incorporated by decomposing the original non-linear problem into linear subproblems. Following this, the solution of the original problem is composed using the solutions of the linear subproblems. Once the magnetic vector potential as a function of inductor current has been determined, the current depending inductance can be calculated. Results derived from both simulations with COMSOL Multiphysics and measurements show good agreement with the theoretical predictions.

Fast transient voltage-mode buck regulator applying ramp signal with a variable DC-offset scheme

A ramp signal with variable DC-offset (RSVDC) scheme implemented in a voltage-mode controlled buck voltage regulator is proposed. To enhance the response of the voltage-mode controlled buck regulator during the load transient, the variable DC-offset ramp signal is applied to drive the duty cycle full or zero, so that the output voltage can instantly respond with load change. The model, compensator and loop gain of the proposed buck regulator are derived and demonstrated. The transistor-level of the RSVDC circuit including the hysteretic comparator, oscillator and the output feedback voltage amplifier is also presented. The controller using the RSVDC scheme was implemented by the TSMC 0.35 m 2P4M process. The simulated and experimental results show that the transient response using the RSVDC scheme is about 10 s, when the load changes from 0.1 to 1 A under a 5 1.8 V voltage conversion. The test results validate the feasibility of the RSVDC control scheme in a buck voltage regulator to fulfil a simple structure, assured stability and fast transient response requirements.

A Nonisolated ZVS Asymmetrical Buck Voltage Regulator Module With Direct Energy Transfer

This paper presents a new nonisolated asymmetrical buck voltage regulator module. A transformer is used to extend the extremely low duty cycle of a conventional buck converter. Turn-off losses can be significantly reduced due to the extension of duty cycle, and there are no turn-on losses owing to the zero-voltage turn-on condition. At the same time, the voltage stress over the synchronous rectifier MOSFETs is also reduced. Therefore, the reverse-recovery losses of the body diode can be reduced. Furthermore, the MOSFETs with lower voltage rating and lower RDS(on) can be used to reduce the conduction losses. In order to reduce the turn-off losses above the switching frequency of 1 MHz further, a new current-source driver is also proposed, which is suitable to this new topology. A 12-V input prototype with the switching frequency of 1 MHz was implemented. Simulation and experimental results verify the functionality and benefits of the proposed topology.

A Practical Switching Loss Model for Buck Voltage Regulators

In this paper, a review of switching loss mechanisms for synchronous buck voltage regulators (VRs) is presented. Following the review, a new simple and accurate analytical switching loss model is proposed for synchronous buck VRs. The model includes the impact of common source inductance and switch parasitic inductances on switching loss. The proposed model uses simple equations to calculate the rise and fall times and piecewise linear approximations of the high-side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck VR. A simulation program with integrated circuit emphasis (Spice) simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1-MHz synchronous buck VR at 12-V input, 1.3-V output. Switching loss was estimated with the proposed model and compared to Spice measurements. Experimental results are presented to demonstrate the accuracy of the proposed model.

Light-Load Efficiency Improvement for Buck Voltage Regulators

Extending battery life is a big challenge for today's laptop, and light-load efficiency is very important for battery life extension. In this paper, adaptive ON-time control is proposed to achieve higher efficiency when the buck converter is running in continuous current mode. A novel nonlinear inductor is then proposed to improve discontinuous-current-mode efficiency. A control method with a thorough analysis is proposed for the nonlinear inductor to achieve high efficiency, the required output voltage ripple, and sufficient transient response. The experimental results demonstrate the benefits of the proposed methods.

A 1-MHz High-Efficiency 12-V Buck Voltage Regulator With a New Current-Source Gate Driver

This paper proposes a new current-source gate drive circuit for a synchronous buck converter. The proposed driver can drive two MOSFETs independently with different drive currents for optimal design. For the control MOSFET, the optimal design involves a tradeoff between switching loss reduction and drive circuit loss; while for the synchronous-rectifier MOSFET, the optimal design involves a tradeoff between body diode conduction loss and drive circuit loss. Furthermore, the new drive circuit can achieve: 1) significant switching loss reduction; 2) gate energy recovery and high gate drive voltage to reduce R DS(ON) conduction losses; 3) reduced conduction loss and reverse recovery loss of the body diode; and 4) zero-voltage switching of all the drive switches. The improved driver using integrated inductors is presented with multiphase buck voltage regulators (VRs) to reduce the number of magnetic cores and the core loss. The experimental results prove that a significant efficiency improvement has been achieved. At 1.5-V output, the new driver improves the efficiency from 84% using a conventional driver to 87.3% at 20 A, and at 30 A, from 79.4% to 82.8%. Overall, the new driver approach is attractive from the standpoints of both performance and cost-effectiveness.

Optimal Design of Resonant Gate Driver for Buck Converter Based on a New Analytical Loss Model

In this paper, the advantages of a new resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power metal oxide semiconductor field effect transistor driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at high (>1 MHz) switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12 V synchronous buck voltage regulator (VR) prototype at 1 MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results well. Through the optimal design, a significant efficiency improvement is achieved. At 1.5 V output, the resonant driver improves the VR efficiency from 82.7% using a conventional driver to 86.6% at 20 A, and from 76.9% using a conventional driver to 83.6% at 30 A. More importantly, compared with other state of the art VR approaches, the new resonant driver is promising from the standpoints of both performance and cost-effectiveness.

Efficiency-Based Auto-Tuning of Current Sensing and Sharing Loops in Multiphase Converters

Multiphase converters require a current-sharing loop to maintain equal or desired current sharing between phases or paralleled modules. The current-sharing loop is highly sensitive to current-sensing accuracy. In this letter, a method is presented to achieve auto-tuning of the current-sharing loop in multiphase converters while adaptively calibrating the current sensing based on power conversion efficiency. This is achieved without the need for a precise calibration reference or resistor and with no dependency on sensing accuracy. A digital controller implementation of the method is described and experimental results are obtained for a 0.84 V/30 A two-phase buck voltage regulator.