Abstract
Failure Mode Effect and Diagnostic Analysis is typical way to define Failure in time for a given design by performing fault analysis on each element of the design. However it may not always accurately determine the erroneous state for a self-correcting designs. An example of self-correcting designs is a buck voltage regulator in which output and required voltage are continuously compared to achieve desired output voltage. This paper assess the true failure state of a buck regulator by performing FMEDA in detail and with reasonable failure probability on each element a MARKOV state model is applied to estimate true failure state of buck VR
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