Bridgeless Power Factor Correction Research Articles

Recent Advances in Bridge-Less Power Factor Correction Converter

Power Factor Corrector (PFC) is a device used in electrical systems to improve power efficiency by reducing reactive power and harmonics, resulting in a higher power factor and reduced energy consumption. It enhances the utilization of electrical networks and minimizes wastage of power resources.This paper reviews the current research on the new bridge-less PFC converter, firstly comparing and analyzing seven configurations and control strategies of traditional Boost, bridge-less Boost, bi-directional switched bridge-less Boost, Pseudo totem bridge-less Boost, dual diode bridge-less Boost, and five-level flying across capacitor bridge-less, and then discussing the characteristics of the bridge-less PFC based on the practical application of the GaN power device. Through the study of bridge-less PFC converter, this paper discusses its advantages and applications in depth, and provides technical support for the realization of high-efficiency, stable and sustainable energy conversion, so as to better promote the development of the energy field.

Performance analysis of a bridgeless power factor correction (PFC) buck–boost LED driver with ripple diversion scheme for extended lifespan

SummaryIn the state of the art of AC‐fed light‐emitting diode (LED) drivers, power factor correction (PFC), second harmonic LED current ripple elimination, low current total harmonic distortion (iTHD), removal of electrolytic capacitors (EC) and flicker‐free operation are the major challenging issues. This paper proposes a bridgeless universal voltagerange AC‐fed LED driver that overcome the major issues of LED driver. The bridgeless buck–boost PFC configuration minimizes the losses relative to the front‐end bridge rectifier‐based configurations. Operating in discontinuous conduction mode (DCM), the source current tracks the input voltage shape for a wide operating range, achieves inherent PFC and maintains low input current THD. Also, this provides significant reduction in the output current ripple with the ripple diversion circuit (RDC) connected in shunt across the LED load, which relatively reduces and utilizes low value of output capacitance. Hence, a flicker‐free operation is achieved without the use of electrolytic capacitors. In addition, the elimination of ECs improves the operating lifespan of the proposed LED driver. A detailed theoretical analysis and results of the proposed LED driver are validated on DSP and analog controller platforms with a 62 W/62 V experimental laboratory prototype. The experimental results confirm that the proposed LED driver achieves a power factor of 0.94–0.997, input current THD of maximum 6.8%, output current ripple of 5%, and a peak efficiency of 91.25% for the wide range of input voltage variation. These indices also satisfy IEC‐61000‐3‐2 and IEEE 1789‐2015 standard limits.

Efficiency and PF Improving Techniques with a Digital Control for Totem-Pole Bridgeless CRM Boost PFC Converters

A totem-pole bridgeless boost converter is one of the most promising topologies for the power factor correction (PFC) stage in high-power applications due to its high efficiency and small number of components. However, due to the totem-pole structure of the field-effect transistor (FET), very high switching loss occurs via the reverse recovery current of the body diode. To solve these problems, critical mode (CRM) control is a good solution to achieve the valley switching technique. With valley switching of CRM control, the switching loss decreases drastically with decreasing turn-on voltage. But, although the CRM control enables valley switching, it is hard to make an exact valley switching control with general zero-voltage detection circuits. In addition, when a frequency limitation scheme is applied to prevent a very high frequency, the switch can operate with hard switching at the boundary of the frequency limitation. Furthermore, the CRM boost PFC has a low PF and high total harmonic distortion (THD) under light-load conditions due to the large negative current resulting from resonance between the inductor and parasitic capacitance. It becomes worse at near-zero input voltage since the resonance current becomes larger near zero-input voltage. Therefore, in this paper, a totem-pole bridgeless boost PFC converter with high efficiency, high PF, and low THD is developed using TMS320F28377 by Texas Instruments. Based on the basic digital structure of the totem-pole bridgeless converter, the proposed controls help with exact valley switching, PF and THD improvement, and frequency limitation. The prototype converter is verified using 90–264 VAC input voltages and 450 V/3.3 kW output specifications.

A Single-Stage Bridgeless PFC Charger with Enhanced Power Quality for LEV Mounted Solar PV Panel

A Single-Stage Bridgeless PFC Charger with Enhanced Power Quality for LEV Mounted Solar PV Panel

Cascaded Half-Bridge-Based Bidirectional Multilevel Bridgeless PFC With Multioutput Ports

Cascaded Half-Bridge-Based Bidirectional Multilevel Bridgeless PFC With Multioutput Ports

Digitalized Control Algorithm of Bridgeless Totem-Pole PFC with a Simple Control Structure Based on the Phase Angle

Compared to the conventional boost power factor correction (PFC) converter, a totem-pole bridgeless PFC has high efficiency because it does not have an input diode rectifier stage, but a current spike may occur when the polarity of the grid voltage changes. This paper proposes a digital control algorithm for bridgeless totem-pole PFC with a simple control structure based on the phase angle of grid voltage. The proposed algorithm has a PI-based double-loop control structure and performs DC-link voltage and input inductor current control. Rectifying switches operate based on the proposed rectification algorithm using phase angle information calculated through a single-phase phase-locked loop (PLL) to prevent current spikes. The feed-forward duty ratio value is calculated according to the polarity of the grid voltage and added to the double-loop controller to perform appropriate power factor control. The performance and feasibility of the proposed control algorithm are verified through a 3 kW hardware prototype.

Average current mode controller for bridgeless PFC SEPIC converter with second-order model reduction operated in continuous conduction mode.

This paper proposes an average current mode controller (ACMC) for a single-phase bridgeless power factor correction (PFC) circuit using a single ended primary inductor converter (SEPIC) via second-order model reduction. The superiority of the proposed controller is PFC accomplished at power up to 350 W with high efficiency via the second-order model reduction. The design and implementation of ACMC on the converter operated with continuous conduction mode (CCM) is explained in detail. ACMC forces input current to follow sinusoidal current reference at different power levels and sustain high power factor (PF). The proposed controller is designed based on the theoretical analysis operation of the circuit. For verification, MATLAB/Simulink simulations are carried out and validation through an experiment test rig for 110-220 Vrms input, 100 Vdc/ 350 W output prototype at 20 kHz switching frequency. It is proven that the proposed controller strategy accomplishes high PF, high efficiency and conformity with the simulation.

State-of-the-art power factor correction in EV charger

With the vigorous development of the automobile industry, the exploitation of oil resources has gradually deepened, which has led to the gradual depletion of oil resources. In this situation, electricity has come to replace oil resources in the automobile industry. However, in the charging process of electric vehicles, the use of the efficiency of electric energy is particularly important. If the efficiency is low, then a lot of power is lost in the power transmission line or alternating magnetic field conversion. And an important factor affecting efficiency is the power factor. The traditional AC-DC converter with a full bridge has low power utilization and efficiency, existing studies combine full-wave bridge with other circuits with different functions to form power factor correction (PFC) topologies. And these fundamental topologies continue to develop, derived from the bridgeless, interleaved PFC topologies, etc. This paper reviews the fundamental full-wave bridge PFC topologies and some derived bridgeless PFC topologies and interleaved parallel PFC topologies, including showing their circuit diagrams, explaining the operation principle of these circuits and comparing the advantages and disadvantages of each PFC topology.

Performance investigation of bridge-less power factor correction circuit with MOSFET

The aim of this paper is to study and investigate the performance of power factor correction (PFC) circuit implemented with the semi bridge-less configuration. The transistor-diode module APT50N60JCCU2 has been used in the proposed circuit and the UCC28070 controller has been used as a controlling device for the power factor correction (PFC) circuit. Testing has been performed in two steps. In the first step, the test was conducted<br /> on (230 Vac), while in the second step, the test was conducted on (115 Vac) as alternating input voltages. The testing results of both voltages were compared and analyzed in terms of efficiency, power factor, total harmonic distortion (THD) in order to determine the efficiency of the power factor correction circuit. The results obtained indicate that this circuit has efficiency up to 97% and a power factor close to 0.91 with the input voltage of 230 V.

Virtual Admittance Feedforward Compensation and Phase Correction for Average-Current-Mode-Controlled Totem-Pole PFC Converters

This paper explores a current distortion problem in totem-pole bridgeless power factor correction (PFC) converters with average current mode (ACM) control. With in-depth modeling for the current and voltage loops, it was found that the current distortion is caused by the limited current loop bandwidth and input filter capacitor. These factors lead to the presence of a susceptance component in the input admittance, which degrades the power factor (PF) and total harmonic distortion (THD) of the PFC converter. To solve this problem, this paper proposes virtual admittance feedforward compensation (VAFC) and phase correction methods to adjust the input admittance to pure conductance. The VAFC can generate virtual admittance that compensates for susceptance components in the input admittance, while phase correction can generate an equivalent current source that offsets the current in input capacitors. Furthermore, a phase lock loop (PLL) is introduced to realize the VAFC, which reduces the feedforward interference caused by input voltage sampling noise. Finally, an experimental prototype was built to verify the effectiveness of the proposed strategies. According to the test results, the proposed compensation strategy improves the PF by 1.23%, while reducing the THD by 2.52% and achieving a peak efficiency of 98.69%.

A Topology-Reconfigurable Fault-Tolerant Two-and-Single Stage AC–DC Converter for High Reliability Applications

A novel topology-reconfigurable two-and- single stage ac–dc converter with fault-tolerant capability for high reliability applications is proposed in this article. In the proposed converter, two bidirectional switches are used to connect the midpoints of the bridge branches between the rectifier stage and the dc–dc stage, and the proposed converter can be configured from the two-stage structure into the single-stage structure by turning on the bidirectional switches for the postfault conditions, therefore, the reliability of the power supply is reinforced. The two-stage structure for the normal condition works with an interleaved bridgeless power factor correction (PFC) rectifier and resonant dc–dc converter. The single-stage structure working under the postfault condition is made up of a PFC half-stage and resonant dc–dc half-stage, and the single-stage structure still has the same working performance as the two-stage structure. Operational principles, control scheme, and characteristics analysis of the topology-reconfigurable converter are analyzed. Finally, experimental results for both normal condition and postfault condition based on 1 kW prototype are provided to verify the effectiveness of the proposed converter.

An Isolated SRC-Based Single Phase Single Stage Battery Charger for Electric Vehicles

In this article, a single-phase bridgeless electrolytic capacitor-less single-stage battery charger is proposed. The proposed charger consists of a bridgeless power factor corrector (PFC) circuit and an isolated series resonant converter (SRC). The series resonance circuit provides zero current switching (ZCS) for output diodes, thus reducing losses related to their reverse recovery. The resonant capacitors are designed so that the charger can operate in the range of 120–230-V input voltage, while ZCS is still guaranteed for output diodes. In addition, elimination of low-frequency input diodes decreases the circuit losses. The power factor correction and output power control are simultaneously achieved in one stage by using the proposed control method. The results obtained from a 350-W experimental prototype clearly confirm the correct operation of the proposed charger.

Virtual Admittance Reshaping Based Input Current Phase Shift Suppression Method for Totem-Pole Bridgeless PFC Converter

Grid-side current phase shift (GCPS) is an important issue in totem-pole bridgeless power factor correction (TBPFC) converters. In this article, a virtual admittance reshaping based GCPS suppression method is proposed based on the establishment of the admittance model of the TBPFC converter including the EMI filter. The virtual admittance reshaping does not need additional current and voltage sensors and can realize complex admittance through a control algorithm. Thus, the current phase error can be adjusted to zero with the optimal design. The inherent admittance of the system is analyzed from the perspective of system frequency characteristics to extract leading-phase admittance. Then, the parallel admittance is produced through the inductance current for canceling it. The current reference and the modulation voltage are combined to realize obtaining the equivalent virtual admittance and meanwhile reduce the burden of the current regulator. The sensitivity of the system parameters is analyzed, and the saturation effect of the inductor and the error of the EMI filter parameters have little effect on admittance reshaping. Besides, the research method does not need to adjust parameters according to the load. The effectiveness of the proposed method is verified by experiments on a TBPFC converter platform.

Input Voltage Feedforward Active Damping-Based Input Current Harmonic Suppression Method for Totem-Pole Bridgeless PFC Converter

Grid-side current harmonic (GCH) is an important issue in totem-pole bridgeless power factor correction (TBPFC) converters. In this article, a GCH suppression (GCHS) method based on input voltage feedforward active damping is proposed. First, an admittance model of the TBPFC converter considering the electromagnetic interference (EMI) filter and the time delay of the digital control system is established. The damping characteristics of the system are improved by constructing a virtual admittance, which does not require additional current and voltage sensors. Based on the admittance model analysis, the active damping can be matched and adapted to a wide power range. Through the extraction of harmonic information and the combination with current setting and modulation voltage information, the suppression of current harmonic under different loads can be realized. Besides, the sensitivity of the system parameters is analyzed. The system delay, load change, and system parameter change are considered in the design of active damping, so the current harmonics can be effectively suppressed in a wide power range. Finally, the effectiveness and feasibility of the proposed method are verified by experiments on a TBPFC converter platform.

Bridgeless PFC Converter without Electrolytic Capacitor Based on Power Decoupling

Due to fewer conduction devices in operating condition, the bridgeless power factor correction (PFC) converter is more efficient than the traditional PFC circuit. However, to achieve a low output voltage ripple on the DC side, a large electrolytic capacitor must be connected in parallel to the output end. To reduce the value of capacitance, this paper proposes a dual-boost bridgeless PFC converter with a bidirectional buck/boost power decoupling converter in the latter stage. The bidirectional converter absorbs double-line-frequency ripple, lowering the power pulsation at the output end while realizing power decoupling. The one-cycle control is adopted in bridgeless PFC converter, so that the input current can follow the input voltage to achieve power factor correction and decrease harmonic pollution. The power decoupling circuit is designed with a voltage outer loop using PI control and a current inner loop using model predictive current control, which alleviates the output voltage fluctuation caused by the reduction of the capacitance value of the filter capacitor, for the purpose of realizing non-electrolytic capacitor. Finally, the topology and control strategy involved in this paper are simulated and experimented to verify the validity and superiority of the theory.

Buck Bridgeless PFC Rectifier with Less Semiconductor Count

Buck Bridgeless PFC Rectifier with Less Semiconductor Count

AC-DC Fuzzy Linear Active Disturbance Rejection Control Strategy of Front Stage of Bidirectional Converter Based on V2G

Aiming at the problems of output voltage fluctuation and current total harmonic distortion (THD) in the front stage totem-pole bridgeless PFC of two-stage V2G (Vehicle to Grid) vehicle-mounted bi-directional converter, a fuzzy linear active disturbance rejection control strategy for V2G front-stage AC-DC power conversion system is proposed. Firstly, the topological working mode of the totem-pole bridgeless PFC is analyzed, and the mathematical model is established. Combined with the system model and the linear active disturbance rejection theory, a double closed-loop controller is designed with the second-order linear active disturbance rejection control as the voltage outer loop and PI control as the current inner loop. The controller can realize self-adaptive tuning of the proportional gain coefficient of the active disturbance rejection controller through fuzzy reasoning and realize self-adaptive control. Simulation and experimental results show that this method can better solve the problems of slow system response and high total harmonic distortion rate of input current and effectively improve the system’s robustness.

Academic Use of Rapid Prototyping in Digitally Controlled Power Factor Correctors

The growing use of power converters connected to the grid motivates their study in power electronics courses and the prototype development in the degree final project (DFP). However, the practical realization of using state-of-the-art components and conversion techniques is complex due to the numerous multidisciplinary aspects that students must consider in its design and development and the workload associated with the DFP. An example of this is that, unlike a conventional power factor correction (PFC) design, the individual dedication of students to complete the design and validation of modern bridgeless PFC stages exceeds the number of credits of the DFP. The reason for this is that it includes system modeling, becoming familiar with the devices used, discrete selection, circuit design, control development, and programming, to build the converter and verify the operation of the complete system. To reinforce the individual skills needed for the DFP and reduce this time, a novel strategy is proposed. It allows the student to focus their efforts on integrating the individual skills achieved in the degree at the appropriate competence level during the modeling and construction of the power converter while carrying out part of the tasks out of the lab, if necessary, as was the case during the pandemic restrictions. For this, the rapid prototyping technique is introduced to speed up the overall design and speed up the tuning of digital controllers. This manuscript presents a teaching experience in which students build digitally controlled power converters using Texas Instruments microcontroller boards and PLECS®. The example of a bridgeless totem-pole power factor corrector is shown. Although it began to develop and was motivated due to the restrictions during the COVID-19 pandemic, the experience has been verified and is maintained over time, successfully consolidating.

A Power Factor Correction LED Driver With Direct Power Transfer Feature

This article presents an isolated bridgeless single-stage light-emitting diode (LED) driver with high power factor, soft-switching performance, and direct power transfer (DPT) capability. In the proposed circuit topology, a bridgeless boost power factor corrector (PFC) is integrated with an isolated current-driven half-bridge dc/dc converter to achieve a bridgeless single-stage PFC structure. Besides, a direct path is provided using coupled inductors to directly transfer power from the input source to the output. The bridgeless structure and DPT capability result in reduced conduction losses, while the soft-switching operation almost eliminates the switching losses. Therefore, the proposed LED driver benefits from low losses and high efficiency. The proposed LED driver is theoretically analyzed. Also, experimental results for a 150-W prototype supplied from a 120-V/60-Hz utility are presented to verify its performance.

High Step-Down Bridgeless Sepic/Cuk PFC Rectifiers With Improved Efficiency and Reduced Current Stress

In this article, two high step-down bridgeless power factor correction rectifiers based on the switched inductor network (SIN) are introduced. The proposed rectifiers employ the SIN to provide high step-down voltage gain with a higher duty cycle than the competitors. They also offer higher efficiency, lower current stress, and total peak switching device powers. A thorough and straightforward design algorithm in the discontinuous conduction mode is provided that ensures a unity power factor and a low total harmonic distortion with a simple control scheme. As a demonstration of the superior performance of the proposed rectifiers, a 300-W high-gain sepic rectifier setup with 48V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> output voltage from a 230V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> /50Hz source is built in the laboratory.