Boron Out-diffusion Research Articles

Diffusion barrier properties of atomic layer deposited TiSiN films

Atomic Layer Deposition processed (ALD) titanium silicon nitride (TiSiN) thin film was investigated as a diffusion barrier. TiSiN successfully reduced the out-diffusion of boron from the poly-Si layer on the Si substrate by 10 times and fluorine into the substrate from the subsequent W deposition by 2 times. Si doping caused the TiSiN to be deposited in an amorphous phase even though TiN easily crystallizes to a columnar polycrystalline structure which could be a diffusion path. In addition, ultra-thin TiSiN films maintain continuity and conformality which can fulfill the requirements of a diffusion barrier and simplify the stack integration.

Electronic properties of graphene/p-silicon Schottky junction

We fabricate graphene/p-Si heterojunctions and characterize their current–voltage properties in a wide temperature range. The devices exhibit Schottky diode behaviour with a modest rectification factor up to . The Schottky parameters are estimated in the framework of the thermionic emission theory using Cheung’s and Norde’s methods. At room temperature, we obtain an ideality factor of about 2.5 and a Schottky barrier height of 0.18 eV, which reduces at lower temperatures. We shed light on the physical mechanisms responsible for the low barrier, discussing the p-doping of graphene caused by the transfer process, the exposure to air and the out-diffusion of boron from the Si substrate. We finally propose a band model that fully explains the experimental current–voltage features, included a plateau observed in reverse current at low temperatures.

High efficiency screen-printed n-type silicon solar cell using co-diffusion of APCVD boron emitter and POCl3 back surface field

We present the fabrication and analysis of Passivated Emitter and Rear Totally Diffused (PERT) solar cells on n-type silicon using a co-diffusion process. In a single high temperature step, a BSG/SiOx stack deposited by APCVD and a POCl3 back surface field diffuse into the wafer to form the boron doped emitter and phosphorus doped back surface field. The SiOx layer on top of BSG acts as a masking layer to prevent cross-doping of phosphorus as well as a blocking layer for boron out-diffusion. This resulted in an initial sheet resistance of 76 Ω/□ with good uniformity and a final p+ emitter sheet resistance of 97 Ω/□ after boron rich layer removal. Additionally, bulk lifetime was investigated before and after the high temperature step that resulted in an increase from 1.2 ms to 1.5 ms due to a POCl3 gettering effect. A peak cell efficiency of 20.3% was achieved and each recombination component in terms of saturation current density was calculated and analyzed to understand the cell for further efficiency enhancement.

Modeling boron dose loss in sidewall spacer stacks of complementary metal oxide semiconductor transistors

The presence of capping materials during annealing (activation for example) can substantially impact the silicon junction profiles of Complementary Metal Oxide Semiconductor Field Effect Transistors (CMOSFET), depending on the nature of these layers. In this paper we specifically investigated the boron out-diffusion from a silicon junction into the silicon oxide in presence of a silicon oxide/silicon nitride capping bi-layer similar to the stacks used to form sidewall spacers. After 120s anneal we observed with secondary ion mass spectrometry (SIMS) substantial boron dose loss in silicon and segregation at the silicon oxide interface related to oxide and nitride material properties, in particular to the hydrogen concentration. We then modeled the boron profiles in both silicon and oxide as a function of the hydrogen static and dynamic in the materials. The exponential-like boron diffusion profiles observed in oxide are reproduced by introducing a long hop mechanism mediated with hydrogen-related defects (HRDs).

Borosilicate glass nanolayer as a spin-on dopant source: FTIR and spectroscopic ellipsometry investigations

Borosilicate glass is a potential dopant source for producing shallow boron junctions by the use of proximity rapid thermal diffusion. Interest in this technique has increased recently due to its application to the manufacture of solar cells. A borosilicate gel is spun onto a silicon wafer and the layer is rapidly thermally annealed to convert it to a borosilicate glass (BSG). Fourier transform infrared (FTIR) spectroscopy, spectroscopic ellipsometry and sheet-resistance measurements have been used to understand and subsequently optimise the conversion of the gel to a BSG nanolayer. Physical properties of the thin, spun-on layer, such as thickness, refractive index and porosity, were monitored. The optimum conversion step involved rapid thermal annealing for 45 s at 900 °C. This avoided any boron loss from the BSG layer during the thermal processing step. The position of the B–O stretching vibration around 1370 cm−1 was found to be sensitive to boron outdiffusion and it is suggested that FTIR spectroscopy provides a simple method for monitoring the outdiffusion of boron from the spin-on dopant nanolayer. Further FTIR studies using p-polarised light at oblique incidence revealed, for the first time, the LO–TO phonon splitting of the B–O stretching vibration band in the glassy layer. Investigation of the stability of BSG layers over long periods showed that unstabilised (or undensified) BSG films demonstrate a dramatic loss of boron over 6 months.

High Quality SiGe:B of High Ge Layer for 14nm and Beyond FINFET Processes

The selective Epi of high quality with the high Ge of >50% has been demonstrated. The high quality Epi morphology can be obtained by modulating the Epi temperature to < 600C. The diamond shape Epi film with dislocation free can be observed by TEM. The flat Epi surface and the full strain Epi film can be analyzed by XRD. The Boron out-diffusion behavior in SiGe of high Ge study shows the tail abruptness was from 3nm/decade to 4nm/decade after S/D imp and anneal. The Boron out-diffusion can be well controlled by the high Ge and high quality SiGe Epi.

Suppressing Device Variability by Cryogenic Implant for 28-nm Low-Power SoC Applications

In this letter, we have demonstrated that cryogenic implant in the source and drain formation offers advantages for reducing the threshold voltage mismatch in pMOSFET. A discrete dopant profiling method is used to verify the presence of boron out-diffusion from the drain, which further induces the random dopant fluctuation. Results show that this boron out-diffusion can be greatly reduced in this new process. Two major factors in improving the device variability by cryogenic implant are discussed, i.e., the polysilicon grain size control and the embedded-SiGe dislocation defect reduction during source and drain formation.

Short channel mobility analysis of SiGe nanowire p-type field effect transistors: Origins of the strain induced performance improvement

The strain effect of three dimensionally stacked p-type SiGe nanowire field effect transistors are investigated by low temperature mobility analysis. Temperature dependent mobility behavior shows that the carrier transport of compressively strained channel is mainly limited by phonon scattering whereas impurity scattering is dominant at the unstrained short channel device. Because the compressive strain limits boron out-diffusion from the source and drain, additional impurity scattering mechanism is reduced comparing to the unstrained device. Thus, the compressively strained SiGe channel has higher immunity against short channel effect and improved effective mobility due to the limitation of dopant diffusion into the channel.

Boron out-diffusion mechanism in oxide and nitride CMOS sidewall spacer: Impact of the materials properties

The interactions occurring between the pMOSFET sidewall spacers and the shallow junctions underneath can be detrimental for the transistor performance. In fact, a significant part of the p-type LDD boron may out-diffuse into the spacer oxide layer during the doping activation annealing, resulting in a deep modification of the junction. This effect was emphasized with the introduction of low thermal budget spacer oxide and nitride dielectrics in recent CMOS technology nodes. This study compares the impact of oxide/nitride spacer bilayers obtained at low temperature either by low pressure chemical vapor deposition (LPCVD) or by plasma enhanced chemical vapor deposition (PECVD). One observes a minimized interaction between the junction and the dielectrics within the PECVD samples. In addition, the boron diffusion activation energies calculated for both stacks are consistent with the models of boron diffusion within oxide films described in the literature.

Electrical characterization of transfer transistors with pure and nitirided gate oxides in four-transistor CMOS image pixels

Transfer transistors having pure (TX-TR-PO) and nitrided (TX-TR-NO) gate oxides in four-transistor CMOS image pixels were electrically characterized by both 1/f noise and static measurements. Reduced 1/f noise levels in TX-TR-NO denoted that nitridation of oxides contributed to maintaining the p+ surface passivation layer highly doped near its gate-edge, by suppressing boron out-diffusion into gate-poly. Although TX-TR-NO in this study had a relatively high potential barrier at the photodiode/TX-TR interface, the static conductance analysis showed that the barrier could be sufficiently lowered in real pixel operations through either ‘deep depletion’ or ‘floating-diffusion voltage-induced barrier lowering’. Moreover, the potential barrier existing in TX-TR-NO was suggested to play a key role in reducing the sensor module's dark current level, kTC noise and image lag failure rates by preventing charge's flowing back to photodiode during TX-TR's transition from ‘off’ to ‘on’. The proposed TX-TR design is expected to effectively improve the charge transfer characteristics of CMOS image pixels, especially under low operation voltage conditions (⩽2.5 V).

Correlation between impurities in Fe–Si amorphous layers synthesized by Fe implantation and photoluminescence property of β-FeSi 2 precipitates in Si

Completely amorphous Fe–Si layers are formed by Fe implantation into Si substrate at a dosage of 5×10 15 cm −2 using a metal vapor vacuum arc (MEVVA) ion source under 80 kV extraction voltage and cryogenic temperature. After thermal annealing, β-FeSi 2 precipitates are formed in Si matrix. The influence of impurities in these amorphous Fe–Si layers on the photoluminescence (PL) from β-FeSi 2 precipitates is investigated. PL is found to be significantly enhanced by optimizing the impurity concentration and annealing scheme. After 60 s of rapid thermal annealing (RTA) at 900 °C, β-FeSi 2 precipitates in medium boron-doped Si substrate give the strongest PL intensity without boron out-diffusion from them.

Dependence of Gate Interfacial Resistance on the Formation of Insulative Boron–Nitride for p-Channel Metal–Oxide–Semiconductor Field-Effect Transistor in Tungsten Dual Polygate Memory Devices

We investigated the effect of boron at the interface of the diffusion barrier in tungsten polymetal gate stacks on the gate contact interfacial resistance between tungsten and p+ polycrystalline silicon (poly-Si). B–N formation can occur at the bottom of WN, which is a crucial layer for preventing abnormal tungsten silicidation between the tungsten gate electrode and poly-Si. Dissociated nitrogen from the WN layer during postdeposition thermal treatment could easily interact with out-diffused boron, creating an insulating B–N compound layer that could lead a significant increase in gate contact resistance. We varied the types of diffusion barriers (WSix, Ti, TiN, and WN inserted) to investigate the effect of the B–N interlayer on gate contact resistance. The boron concentration at the region of B–N formation is consistent with not only electrically measured gate contact resistance and but also ring oscillator delay characteristics. In the case of the Ti/WN barrier, the TiB2 compound layer existing inside TiSi2 created by the reaction between Ti and p+ poly-Si could behave as efficient buffer layers preventing the out-diffusion of boron during annealing. TiN deposited on the poly-Si induces Si–N interdielectric formation, which also increases gate contact resistance. For the WSix/WN barrier case, additional deposition of an amorphous-Si layer could suppress boron diffusion, but is less effective than the Ti/WN barrier.

Effects of TiCl4-Based PECVD-Ti/CVD-TiN Barrier Layers on the BF2-Doped Si for Contact Plug Technology

We have performed the investigation of Ti/TiN barrier layers deposited by PECVD of Ti and CVD of TiN using TiCl4 as a reactant on a heavily boron doped Si substrate. High contact resistance arose from both the boron out-diffusion, and high chlorine content in the Ti film with respect to the relatively high, and low process temperatures of PECVD-Ti deposition, respectively. In the optimized PECVD-Ti process condition with the satisfied boron dose in the Si substrate, comparable yields can be achieved with that using the 110nm deep trench Dynamic Random Access Memory (DRAM) technology with PVD-Ti method. Furthermore, using PECVD-Ti/CVD-TiN method for the contact metallization, it can obtain a uniform thickness of liner in the hole-type contact with aspect ratio to 6.

Roles of Ti, TiN, and WN as an Interdiffusion Barrier for Tungsten Dual Polygate Stack in Memory Devices

Tungsten dual polygate (W-DPG) stacks with diffusion barriers formed by the Ti(N) process were investigated in terms of gate contact resistance (Rc) and the polydepletion effect. The Ti layer in the Ti/WN diffusion barrier is found to be converted into a TiSix/TiN bilayer during the postdeposition annealing process. The TiSix reaction between Ti and p+ polycrystalline silicon (poly-Si) effectively prevents the formation of a parasitic dielectric layer, which could lead to low-gate Rc. The TiN reaction between Ti and WN minimizes the occurrence of the TiSix reaction, which effectively reduces p+ polydepletion caused by the out-diffusion of boron during the postdeposition annealing process. Therefore, poly-Si/Ti/WN/W could be a promising tungsten dual polygate stack, which satisfies high-speed requirements in dynamic random-access memory (DRAM) devices.

Simulation of boron diffusion in Si and strained SiGe layers

Boron outdiffusion from the base into the emitter and collector caused by annealing in SiGe heterobipolar transistors (HBTs) has a serious influence on the transit frequency. One solution of the problem of boron outdiffusion is the creation of intrinsic spacers between the base, emitter and collector layers to prevent diffusion of boron across the heterointerface. For optimisation of SiGe HBT properties, several simulators are used. This paper presents a quantitative analysis of a SiGe HBT by process simulators SUPREM IV.GS and ISE TCAD-DIOS. Models for simulation of a boron-doped SiGe base of HBT are discussed and compared.

High-performance SiGe heterostructure FET grown on silicon-on-insulator

A novel SiGe/Si δ-doped-channel field effect transistors (DDCFETs) grown on silicon-on-insulator (SOI) have been successfully fabricated and demonstrated for the first time. No serious boron outdiffusion is found according to the SIMS analysis. The proposed device with a 1×100 μm 2 gate reveals the gate voltage swing (GVS) as wide as 2.6 V. In addition, the reverse breakdown voltage between the Schottky gate and the δ-layer reaches 34 V, which is much larger than that of the same device structure grown on bulk Si. The high GVS and breakdown voltage are attributed to good carrier confinement not only by the V-shaped potential well formed by the heavily δ-doping but also SOI-induced effect.

A simple electrical approach to extracting the difference in bandgap across neutral base for SiGe HBT's

A simple general-purpose electrical approach to extracting the difference in bandgap across neutral base, i.e. Δ E G grade , for SiGe HBT's as well as Si BJT's with arbitrary Ge and dopant profiles, has been proposed. This approach is based on temperature dependence evaluation of combination of collector current, transconductance, and output conductance. In this work, it has been applied to fabricated RPCVD SiGe HBT's with the extracted values for Δ E G grade of 48 and 69 meV for two experimental splits, respectively. The bigger value for the latter has been ascribed to better confinement of boron profile within SiGe base layer owing to carbon incorporation which can effectively suppress boron out-diffusion.

Effects of collector heterojunction displacement from its p–n junction on the unilateral power gain at 10 GHz in SiGe HBTs

The design of SiGe heterojunction bipolar transistors for high frequency (10 GHz), high power applications has been investigated by numerical device modelling using a commercial simulator. For the SiGe base layer, boron outdiffusion can give rise to displacement of the base-collector p–n junction from the collector heterojunction, which contributes to the development of a parasitic barrier in the conduction band. In this paper, using a Gaussian distribution for the base's boron profile, we examine the effects of the device's epitaxial layer design on the device's unilateral power gain at 10 GHz and its relation to this barrier. Degradation in the device's microwave power gain was found to correlate with formation of the collector junction parasitic barrier, where the barrier height was found to depend upon the extent of the p–n junction displacement from the heterojunction, the Ge concentration in the base and the dc bias point. Trade-offs in device design to reduce its sensitivity to outdiffusion were examined including the use of undoped SiGe spacer layers, increased collector doping and the insertion of a thin, n+ layer at the collector junction.

Mechanisms of diffusion-enhanced thermal stability of Si/Si 1− xGe x/Si heterostructures grown by chemical vapor deposition

The thermal stability of doped Si/Si 0.8Ge 0.2/Si (n–p–n or p–n–p) structures grown by reduced pressure chemical vapor deposition has been studied in correlation with the dopant in- and out-diffusion, using high-resolution X-ray reciprocal lattice mapping and secondary ion mass spectrometry as the main characterization tools. Initially, by doping the strained Si 0.8Ge 0.2 layer with reasonable amounts of boron, phosphorus, or arsenic, the thermal stability of the structures is shown to be dramatically increased compared to intrinsic layers. Secondly, the results show that when the dopants are present only in the Si buffer and cap layers, intrinsic Si spacer layers are required to obtain a significant enhancement in the thermal stability. These spacers reduce the interfacial dopant concentration and act as barriers for direct injection of precipitates into the SiGe layers. Finally, p–n–p and n–p–n structures were studied, showing a very good thermal stability, due to enhanced out-diffusion of dopants from the SiGe layer upon in-diffusion from the adjacent layers. By employing i-Si spacers, the boron out-diffusion in a n–p–n structure was reduced, giving rise to a degradation of the thermal stability of this structure.

Ammonia nitrided isolation oxide for selective epitaxial growth technology to eliminate edge transistor effects of SOI and bulk N-channel MOSFETs

A simple and effective method to eliminate edge transistor effects in SOI and bulk N-channel MOSFETs, fabricated using selective epitaxial growth of silicon, is demonstrated. Employing an ammonia nitridation of the isolation oxide, before the epitaxial growth, the boron out-diffusion into the surrounding oxide is effectively suppressed. Parasitic edge transistors in both SOI and bulk N-MOSFETs are eliminated.