Abstract
Tungsten dual polygate (W-DPG) stacks with diffusion barriers formed by the Ti(N) process were investigated in terms of gate contact resistance (Rc) and the polydepletion effect. The Ti layer in the Ti/WN diffusion barrier is found to be converted into a TiSix/TiN bilayer during the postdeposition annealing process. The TiSix reaction between Ti and p+ polycrystalline silicon (poly-Si) effectively prevents the formation of a parasitic dielectric layer, which could lead to low-gate Rc. The TiN reaction between Ti and WN minimizes the occurrence of the TiSix reaction, which effectively reduces p+ polydepletion caused by the out-diffusion of boron during the postdeposition annealing process. Therefore, poly-Si/Ti/WN/W could be a promising tungsten dual polygate stack, which satisfies high-speed requirements in dynamic random-access memory (DRAM) devices.
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