Thin Film Transistor Array Research Articles

Solution-processed single-wall carbon nanotube transistor arrays for wearable display backplanes

In this paper, we demonstrate solution-processed single-wall carbon nanotube thin-film transistor (SWCNT-TFT) arrays with polymeric gate dielectrics on the polymeric substrates for wearable display backplanes, which can be directly attached to the human body. The optimized SWCNT-TFTs without any buffer layer on flexible substrates exhibit a linear field-effect mobility of 1.5cm2/V-s and a threshold voltage of around 0V. The statistical plot of the key device metrics extracted from 35 SWCNT-TFTs which were fabricated in different batches at different times conclusively support that we successfully demonstrated high-performance solution-processed SWCNT-TFT arrays which demand excellent uniformity in the device performance. We also investigate the operational stability of wearable SWCNT-TFT arrays against an applied strain of up to 40%, which is the essential for a harsh degree of strain on human body. We believe that the demonstration of flexible SWCNT-TFT arrays which were fabricated by all solution-process except the deposition of metal electrodes at process temperature below 130oC can open up new routes for wearable display backplanes.

Effect of Al2O3 Passivation Layer and Cu Electrodes on High Mobility of Amorphous IZO TFT

In this paper, we present a high mobility amorphous indium-zinc-oxide (a-IZO) thin film transistor (TFT) based on copper (Cu) source/drain electrodes (S/D) and aluminum oxide (Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> ) passivation layer (PVL). The mechanism of high mobility for the a-IZO TFT based on Cu S/D with Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PVL was proposed and experimentally demonstrated. The sputtering of Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PVL induced a highly conductive channel layer due to the formation of In-rich layer on the back channel. Also, Cu S/D presented Schottky contact behavior compared with Mo S/D which behaved like Ohmic contact. Because the Schottky contact can block leakage current and the highly conductive channel achieved high on-current, the a-IZO TFT based on Cu S/D and Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> PVL performed remarkable saturation mobility up to 412.7 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs. This paper presents a feasible way to implement high mobility TFT arrays with Cu electrodes.

Uniform Insulating Properties of Low-Temperature Curable Gate Dielectric for Organic Thin-Film Transistor Arrays on Plastic Substrate

Achieving a high-resolution display on a plastic substrate requires a low-temperature process to ensure dimensional stability during fabrication process, including the deposition of gate dielectrics. Evaluation platform to confirm the uniform insulating properties of organic dielectric material prior to actual application to organic thin-film transistor arrays were proposed. This test method enabled verification of the suitability of the low-temperature curable dielectric and chemical resistance during the fabrication process. A cross-linked poly(hydroxy imide) that can be cured at a low temperature of 130°C exhibited stable insulating properties in a large area that sudden breakdown was not observed in an electric field up to 4 MV/cm. Thiophene-thiazole-based copolymer semiconductor was used as an active layer and inkjet-printed. In all the processes, the temperature of the substrate was kept below 130 °C, and 4.8-inch electrophoretic display panels on a polyethylene naphthalate substrate with a resolution of 98 dpi was demonstrated.

Toward Scintillator High-Gain Avalanche Rushing Photoconductor Active Matrix Flat Panel Imager (SHARP-AMFPI): Initial fabrication and characterization.

We present the first prototype Scintillator High-Gain Avalanche Rushing Photoconductor Active Matrix Flat Panel Imager (SHARP-AMFPI). This detector includes a layer of avalanche amorphous Selenium (a-Se) (HARP) as the photoconductor in an indirect detector to amplify the signal and reduce the effects of electronic noise to obtain quantum noise-limited images for low-dose applications. It is the first time avalanche a-Se has been used in a solid-state imaging device and poses as a possible solution to eliminate the effects of electronic noise, which is crucial for low-dose imaging performance of AMFPI. We successfully deposited a solid-state HARP structure onto a 24 × 30 cm2 array of thin-film transistors (TFT array) with a pixel pitch of 85 μm. The HARP layer consists of 16 μm of a-Se with a hole-blocking and electron-blocking layer to prevent charge injection from the high-voltage bias and pixel electrodes, respectively. An electric field (ESe ) up to 105 V μm-1 was applied across the a-Se layer without breakdown. A 150 μm thick-structured CsI:Tl scintillator was used to form SHARP-AMFPI. The x-ray imaging performance is characterized using a 30 kVp Mo/Mo beam. We evaluate the spatial resolution, noise power, and detective quantum efficiency at zero frequency of the system with and without avalanche gain. The results are analyzed using cascaded linear system model (CLSM). An avalanche gain of 76 ± 5 was measured at ESe = 105 V μm-1 . We demonstrate that avalanche gain can amplify the signal to overcome electronic noise. As avalanche gain is increased, image quality improves for a constant (0.76 mR) exposure until electronic noise is overcome. Our system is currently limited by poor optical transparency of our high-voltage electrode and long integrating time which results in dark current noise. These two effects cause high-spatial frequency noise to dominate imaging performance. We demonstrate the feasibility of a solid-state HARP x-ray imager and have fabricated the largest active area HARP sensor to date. Procedures to reduce secondary quantum and dark noise are outlined. Future work will improve optical coupling and charge transport which will allow for frequency DQE and temporal metrics to be obtained.

Precise Patterning of Large‐Scale TFT Arrays Based on Solution‐Processed Oxide Semiconductors: A Comparative Study of Additive and Subtractive Approaches

AbstractPrecise patterning of solution‐processed oxide semiconductors is critical for cost‐effective, large‐scale, and high throughput fabrication of circuits and display application. In this paper, demonstration and comparison are made using the additive and subtractive patterning strategies to precisely fabricate wafer‐scale thin film transistor arrays (1600 devices), which are based on high‐quality solution‐processed indium zinc oxide (IZO) and indium gallium zinc oxide (IGZO). The IZO and IGZO TFTs exhibit field‐effect mobility up to 8.0 and 5.2 cm2 V−1 s−1 when using the additive method, whereas the highest mobility of 24.2 and 13.7 cm2 V−1 s−1 for IZO and IGZO TFTs is achieved when using the subtractive method. The X‐ray photoelectronic spectroscopy studies and quantitative 2D device simulations together reveal that good device performance is attributed to moderate shallow donor‐like states (providing electrons) from oxygen vacancy and few accepter‐like states (trapping electrons) resulted from the dense structural framework of MO bonds. After examining the uniformity and reliability of the devices, the solution‐patterned inverters are demonstrated using negative‐channel metal oxide semiconductors, which show full swing output transfer characteristics and thus provide a promising method for solution‐based fabrications of circuits.

Printable organometallic perovskite enables large-area, low-dose X-ray imaging.

Medical X-ray imaging procedures require digital flat detectors operating at low doses to reduce radiation health risks. Solution-processed organic-inorganic hybrid perovskites have characteristics that make them good candidates for the photoconductive layer of such sensitive detectors. However, such detectors have not yet been built on thin-film transistor arrays because it has been difficult to prepare thick perovskite films (more than a few hundred micrometres) over large areas (a detector is typically 50 centimetres by 50 centimetres). We report here an all-solution-based (in contrast to conventional vacuum processing) synthetic route to producing printable polycrystalline perovskites with sharply faceted large grains having morphologies and optoelectronic properties comparable to those of single crystals. High sensitivities of up to 11 microcoulombs per air KERMA of milligray per square centimetre (μC mGyair-1 cm-2) are achieved under irradiation with a 100-kilovolt bremsstrahlung source, which are at least one order of magnitude higher than the sensitivities achieved with currently used amorphous selenium or thallium-doped cesium iodide detectors. We demonstrate X-ray imaging in a conventional thin-film transistor substrate by embedding an 830-micrometre-thick perovskite film and an additional two interlayers of polymer/perovskite composites to provide conformal interfaces between perovskite films and electrodes that control dark currents and temporal charge carrier transportation. Such an all-solution-based perovskite detector could enable low-dose X-ray imaging, and could also be used in photoconductive devices for radiation imaging, sensing and energy harvesting.

Scalable fabrication of flexible multi-level nanoimprinting molds with uniform heights via a ‘top-to-bottom’ level patterning sequence

Abstract We develop a novel multi-level nanoimprinting mold fabrication methodology realizing the uniform pattern height of each level with the deviation less than 2.6%, by applying the unique ‘top-to-bottom’ level patterning protocol in contrast to typical bottom-to-top patterning sequence. This is implemented by performing sequential dry etching of the stack of etch stop layers and organic insulation layers of desired thicknesses, with proper photolithographic masking in between. We demonstrate that the fabrication can be conducted on a flexible substrate without deformation of pattern profile, which then can be utilized in continuous roll-to-roll nanoimprinting of multi-level nanoarchitectures in a single imprinting process without resorting to alignment of each level. Many applications will benefit from our method, particularly requiring large-area multi-level nanoarchitectures such as thin-film transistor arrays in flexible displays.

Homogeneous dewetting on large-scale microdroplet arrays for solution-processed electronics

Unidirectional dewetting enables the production of large-area thin films with high efficiency at low cost. Herein, we report homogeneous unidirectional dewetting on large-area microdroplet arrays via gravity-induced deformation in droplets combined with alternating lyophilic/lyophobic patterns. This process allows the scaled-up deposition of thin films, including organic semiconductors and transition metal oxides, through the autogenous shrinkage of droplets, which further enables the fabrication of large-area organic thin-film transistor (OTFT) arrays. The resulting field-effect mobility and on/off ratio of the fully printed OTFTs exceeded 13 cm2 V−1 s−1 and 108, respectively. Therefore, the presented dewetting method is promising to realize the roll-to-roll manufacture of large-area flexible electronics.

Stretchable Oxide TFT for Wearable Electronics

Oxide thin‐film transistors (TFTs) in a neutral plane are shown to be robust under mechanical bending and thus can also be suitable for TFT backplanes for stretchable electronics. The oxide TFTs when built on a PI substrate can then be transferred onto a PDMS substrate and applied to stretchable electronics. The PDMS regions on the TFT parts are UV/O3 treated for stiff PDMS and then the TFTs are transferred onto this region. This substrate with TFTs applied can then be stretched up to 50 percent without significant performance degradation. Therefore, stretchable oxide TFT arrays can be used for stretchable displays and sensors.

Highly Robust Bendable Oxide Thin‐Film Transistors on Polyimide Substrates via Mesh and Strip Patterning of Device Layers

Advancement in thin‐film transistor (TFT) technologies has extended to applications that can withstand extreme bending or folding. The changes of the performances of amorphous‐indium‐gallium‐zinc‐oxide (a‐IGZO) TFTs on polyimide substrate after application of extreme mechanical bending strain are studied. The TFT designs include mesh and strip patterned source/drain metal lines as well as strip patterned a‐IGZO semiconductor layer. The robustness of the a‐IGZO TFTs with the strain of 2.17% corresponding to the radius of 0.32 mm is tested and no crack generation even after 60 000 bending cycles is found. The split of source/drain electrodes and semiconductor layer can improve the mechanical bending stability of the TFTs. This can be possible by using conventional TFT manufacturing process so that this technology can be easily applied to build robust TFT array for foldable displays.

Thin-film-transistor array: an exploratory attempt for high throughput cell manipulation using electrowetting principle

In lab-on-a-chip (LoC) devices, microfluidic displacement of liquids is a key component. electrowetting on dielectric (EWOD) is a technique to move fluids, with the advantage of not requiring channels, pumps or valves. Fluids are discretized into droplets on microelectrodes and moved by applying an electric field via the electrodes to manipulate the contact angle. Micro-objects, such as biological cells, can be transported inside of these droplets. However, the design of conventional microelectrodes, made by standard micro-fabrication techniques, fixes the path of the droplets, and limits the reconfigurability of paths and thus limits the parallel processing of droplets. In that respect, thin film transistor (TFT) technology presents a great opportunity as it allows infinitely reconfigurable paths, with high parallelizability. We propose here to investigate the possibility of using TFT array devices for high throughput cell manipulation using EWOD. A COMSOL based 2D simulation coupled with a MATLAB algorithm was used to simulate the contact angle modulation, displacement and mixing of droplets. These simulations were confirmed by experimental results. The EWOD technique was applied to a droplet of culture medium containing HepG2 carcinoma cells and demonstrated no negative effects on the viability of the cells. This confirms the possibility of applying EWOD techniques to cellular applications, such as parallel cell analysis.

Programmable and coherent crystallization of semiconductors.

The functional properties and technological utility of polycrystalline materials are largely determined by the structure, geometry, and spatial distribution of their multitude of crystals. However, crystallization is seeded through stochastic and incoherent nucleation events, limiting the ability to control or pattern the microstructure, texture, and functional properties of polycrystalline materials. We present a universal approach that can program the microstructure of materials through the coherent seeding of otherwise stochastic homogeneous nucleation events. The method relies on creating topographic variations to seed nucleation and growth at designated locations while delaying nucleation elsewhere. Each seed can thus produce a coherent growth front of crystallization with a geometry designated by the shape and arrangement of seeds. Periodic and aperiodic crystalline arrays of functional materials, such as semiconductors, can thus be created on demand and with unprecedented sophistication and ease by patterning the location and shape of the seeds. This approach is used to demonstrate printed arrays of organic thin-film transistors with remarkable performance and reproducibility owing to their demonstrated spatial control over the microstructure of organic and inorganic polycrystalline semiconductors.

IGZO-TFT Biosensors for Epstein–Barr Virus Protein Detection

A transistor-based biosensor with high sensitivity is demonstrated in this paper. The sensor is composed of a reusable In–Ga–ZnO (IGZO)-thin-film transistor (TFT) array wire connected to an external sensing pool. The TFT acts as an electrical charge transducer as well as the signal readout device. Contrast to typical approachesofemploying parameters, such as transconductance, threshold voltage, or current change as the benchmark for sensitivity, we develop a model to extract the corresponding electrical changes after introducing analytes so as tomitigate device-to-device sensing variations. Using Epstein–Barr nuclear antigen-1 (EBNA-1) antibody as the example of target analyte, the IGZO-TFT biosensors are able to selectively detect 10 pg/mL of EBNA-1 antibody in the phosphate-buffered saline solution. The measurement results were cross verifiedwith conventional enzyme-linked immunosorbent assay (ELISA). Our approach is four orders of magnitude better than the ELISA.

All Inkjet-Printed Metal-Oxide Thin-Film Transistor Array with Good Stability and Uniformity Using Surface-Energy Patterns.

An array of inkjet-printed metal-oxide thin-film transistors (TFTs) is demonstrated for the first time with the assistance of surface-energy patterns prepared by printing pure solvent to etch the ultrathin hydrophobic layer. The surface-energy patterns not only restrained the spreading of inks but also provided a facile way to regulate the morphology of metal oxide films without optimizing ink formulation. The fully printed InGaO TFT devices in the array exhibited excellent electron transport characteristics with a maximum mobility of 11.7 cm2 V-1 s-1, negligible hysteresis, good uniformity, and good stability under bias stress. The new route lights a general way toward fully inkjet-printed metal-oxide TFT arrays.

Solution-Processed Organic Thin-Film Transistor Arrays with the Assistance of Laser Ablation

A key step toward commercialization of organic thin-film transistors (OTFTs) is to manufacture large-area OTFT arrays with desired uniform device performance. In this work, for the first time, solution-processed OTFT arrays were fabricated with the assistance of laser ablation. The source-drain electrodes and the whole devices were patterned by precise control of laser intensity and process path. Compared with traditional methods, this approach significantly simplifies the fabrication process of OTFT arrays with high quality and high yield. A careful selection of laser processing parameters is key to obtaining high quality and high performance OTFT arrays. The grazing incidence X-ray diffraction experiments and device performance tests ensured the selection of proper laser ablation intensity. Eventually, the OTFT arrays on silicon wafer and ITO glass exhibited uniform electrical characteristics with the mean mobility of 0.16 and 0.10 cm2 V-1 s-1, respectively. These results demonstrated that the laser ablation process provides a promising tool to simplify the fabrication of solution-processed OTFT arrays with low cost and high yield, which has great potential in upscaling of high performance OTFT arrays for display and circuits.

Inkjet printing of oxide thin film transistor arrays with small spacing with polymer-doped metal nitrate aqueous ink

Minimizing the spacing of inkjet printed oxide arrays for thin film transistors via combination of polyvinylpyrrolidone (PVP) doping in ink and HMDS treatment of substrates.

Solution-processed metal oxide arrays using femtosecond laser ablation and annealing for thin-film transistors

A femtosecond laser is proposed to pattern and anneal a metal oxide layer for simple fabrication of metal oxide thin-film transistor arrays.

Directly drawn ZnO semiconductors and MWCNT/PSS electrodes via electrohydrodynamic jet printing for use in thin-film transistors: The ideal combination for reliable device performances

Solution-processed deposition of conducting and semiconducting materials enables the fabrication of large-area and low-cost electronic devices without the use of high-vacuum equipment. To obtain the possibility of commercializing solution-processed devices such as thin-film transistors (TFTs), easy and simple patterning process of each component become an important issue. In this study, we prepare directly patterned semiconductors and electrodes with the electrohydrodynamic (EHD) printing technique and utilize them in reliable n-type TFTs. By utilizing EHD printing technique, straight lines of zinc oxide (ZnO) semiconductor are successfully drawn from the highly soluble precursor, zinc acrylate (ZnA), and used as the active layers of TFTs. The resulting devices exhibit good TFT characteristics, and doping with a small amount of indium can enhance their performances. Furthermore, we print three different conducting materials on pre-patterned ZnO substrates for the realization of ZnO TFT arrays consisting of directly-drawn semiconductors and source/drain (S/D) electrodes. Multiwall carbon nanotube/polystyrene sulfonate (MWCNT/PSS) electrodes are found to form stable lines and their solution-processed TFTs display reliable operation with negligible hysteresis.

All‐solution‐printed oxide thin‐film transistors by direct thermal nanoimprinting for use in active‐matrix arrays

All‐solution‐printed oxide thin‐film transistors (TFTs) were fabricated using a direct thermal nanoimprinting technique termed nanorheology printing (n‐RP). n‐RP is a printing technology that utilizes the thermoplastic properties of oxide gels. We prepared such thermoplastic oxide gels and developed a suitable alignment system. Using this system, TFTs designed for use in active‐matrix arrays were fabricated with a high alignment accuracy of less than 5 µm. We succeeded in incorporating these TFTs into all‐solution‐printed oxide TFT arrays, and the operation of the transistors in the arrays was confirmed.

All-inkjet-printed thin-film transistors: manufacturing process reliability by root cause analysis.

We report on the detailed electrical investigation of all-inkjet-printed thin-film transistor (TFT) arrays focusing on TFT failures and their origins. The TFT arrays were manufactured on flexible polymer substrates in ambient condition without the need for cleanroom environment or inert atmosphere and at a maximum temperature of 150 °C. Alternative manufacturing processes for electronic devices such as inkjet printing suffer from lower accuracy compared to traditional microelectronic manufacturing methods. Furthermore, usually printing methods do not allow the manufacturing of electronic devices with high yield (high number of functional devices). In general, the manufacturing yield is much lower compared to the established conventional manufacturing methods based on lithography. Thus, the focus of this contribution is set on a comprehensive analysis of defective TFTs printed by inkjet technology. Based on root cause analysis, we present the defects by developing failure categories and discuss the reasons for the defects. This procedure identifies failure origins and allows the optimization of the manufacturing resulting finally to a yield improvement.