Amplifier Circuit Research Articles

Design of Photoelectric Positioning System and Realization of Its Positioning Mathematical Equation

The research of photoelectric positioning system based on wireless data transmission is a multidisciplinary research direction. In the design of photoelectric positioning system, the LED used for light sensing is selected as the light source, and the AC/DC isolated LED driving circuit based on AP3706 is designed. When designing photoelectric conversion circuit, considering the influence of noise interference on detection accuracy, a capacitor is added and connected in parallel with the feedback capacitor. In order to improve the detection accuracy, reduce the relative error of the four-channel signal processing process and maintain the consistency of the four channels, a noninverting amplifier circuit composed of four operational amplifiers LM324 amplifier chips is adopted in this study. NewMsg-RF2401 module is used for wireless data transmission. The system control module adopts ADμC841 single chip microcomputer as the control core. According to the characteristics of this single chip microcomputer, the corresponding ADC module input drive circuit and control-data transmission interface circuit are designed. While designing the hardware of the system, it is necessary to calculate the positioning position. In this study, a positioning mathematical equation is proposed, which can obtain the position of the moving target in the geographical area under the wireless transmission network. In the experiment, firstly, the implementation process of the positioning mathematical equation is described, and then the performance of the proposed positioning mathematical equation is compared with that of the random positioning equation and the binary positioning equation. The results show that more messages can be transmitted by using the positioning mathematical equation proposed in this study. Based on this, it is used in the positioning system designed in this study, which is unfolded under the condition of constant background light, adjusts the position of the movable light source and determines the position coordinates. According to the horizontal and vertical displacement of the light source detected by the system, the positioning error is less than 0.1%, which is in line with the design expectation.

Design of a low power LNA circuit with noise canceling approach in 90 nm CMOS process

In this manuscript, a low noise amplifier (LNA) circuit with low power consumption of 5.3 mW for 3–12 GHz ultra-wideband (UWB) is designed in 90 nm standard CMOS process. A noise-canceling (NC) approach consisting of both common-gate (CG) and common-source (CS) as input stage, followed by the gm-boosted current-reused stage to enhance the gain performance, is used in the proposed design. After noise-canceling, the achieved noise-figure (NF) is ranging from 2.28 to 3.55 dB for 3.1–10.6 GHz and a maximum of 4.0 dB at 12 GHz. Input-reflection coefficient (S11) of < −12.57 dB is achieved from this CG-CS input-matching stage. With the use of parallel-series LC matching with series-peaking-inductor followed by the gm-boosting stage improves the gain-bandwidth and delivers a flat power-gain (S21) of 18.33 ± 0.76 dB over 3–12 GHz. The CG configuration at the input side provides a high reverse-isolation (S12) of less than −78.23 dB and common-drain configuration with NMOS load at the output side ensures less than −11.79 dB output-reflection coefficient (S22) over the proposed frequency range. The proposed LNA is operated with 0.7 V Vdd and the achieved intercept points for input (IIP3) and output (OIP3) are −11.1 dBm and +6.2 dBm, respectively.

Sawtooth Signal Generator Using a Carbon-Based Memristor

It is possible to use the new electronic circuit element memristor in analog applications. Memristors or memristor emulators have already been applied in analog applications such as amplifiers, filters, oscillators, and chaotic circuits. In literature, it has been recently demonstrated that a memristor-based sawtooth signal generator can be built utilizing a memristor emulator and simulations with various memristor models. Such a sawtooth signal generator needs experimental verification with a memristor. Self-Directed Channel (SDC) Carbon-based Memristors are in the market now. Once, the memristor technology is mature enough, its applications may also follow soon. Any memristor application should be realized with a memristor, not an emulator. Knowm memristor has not been used to design a sawtooth signal generator in the literature previously. The aim of the study is to show that a sawtooth signal generator can be made using a Self-Directed Channel (SDC) Carbon-based Memristor and to examine it experimentally. The performance of this sawtooth signal generator is evaluated. The waveforms of the proposed circuit are also examined by varying its operating frequency. The simulation and experimental results are compared. It has been found that its waveforms can be predicted well up to 350 kHz and its high-frequency behavior is not predicted well above 350 kHz by the memristor model used.

Radiation-hard performance research of front-end electronics for fusion diagnostic by Gamma Irradiation Experiment

In the environment of a fusion reactor, electronic systems are subjected to various influences including vibration, electromagnetic pulses, as well as irradiation from neutrons and gamma rays. Diagnostics systems on fusion reactors can accumulate radiation doses to a level where issues such as signal attenuation and system interruption can occur. Additionally, maintenance of electronic systems during fusion reactor experiments is often not feasible. Therefore, assessing the radiation tolerance of electronic systems used in fusion reactors is of paramount importance. To validate the radiation resistance of front-end electronics and cable in various diagnostic systems, a test circuit board was designed. This board integrates a variety of commonly used amplification chips and power supply chips to assess their performance in the environment of a fusion reactor. The experiment selected three different types of cables commonly used in fusion reactors for separate testing, to assess their parameter changes before and after irradiation experiments. Gamma Irradiation Experiments were conducted using a cobalt-60 (Co-60) radiation source at the Irradiation Center of Nanjing University of Aeronautics and Astronautics. The test circuit board was exposed to continuous gamma irradiation at two test points, with dose rates of 6 Gy/min and 1 Gy/min, respectively, for a total of 6.5 h, Data from the irradiation experiments were collected and analyzed. The results show that under continuous gamma irradiation, CJ7805 and AMS1117–5 chips stopped working at 586 Gy and 776 Gy, respectively. The output of the LT1175I5 chip dropped from -5 V to -1 V at 447 Gy. Apart from the radiation-resistant power supply chips, the output of other power supply chips slightly decreased. The signal reference of the charge amplifier dropped at 741 Gy but then slowly rose again, and the signal amplitude decreased at 900 Gy. The signal reference of the current amplification circuit remained unchanged, with a slight decrease in amplitude. The signal reference of the voltage amplifier exhibited jitter, with no change in amplitude. The experiment provides valuable data support for the radiation-resistant design of electronic systems in the environment of a nuclear fusion reactor.

Stimuli-responsive incremental DNA machine auto-catalyzed CRISPR-Cas12a feedback amplification permits ultrasensitive molecular diagnosis of esophageal cancer-related microRNA

Development of new diagnostic methods is essential for disease diagnosis and treatment. In this work, we present a stimuli-responsive incremental DNA machine auto-catalyzed CRISPR-Cas12a (SRI-DNA machine/CRISPR-Cas12a) feedback amplification for ultrasensitive molecular detection of miRNA-21, which is an important biomarker related closely to the initiation and development of cancers, such as esophageal cancer. Strategically, the powerful SRI-DNA machine and efficient trans-cleavage activity of the CRISPR-Cas12a system are ingeniously integrated via a rationally designed probe termed as stem-elongated functional hairpin probe (SEF-HP). The SRI-DNA machine begins with the target miRNA, the trigger of the reaction, binding complementarily to the SEF-HP, followed by autonomously performed mechanical strand replication, cleavage, and displacement circuit at multiple sites. This conversion process led to the amplified generation of numerous DNA activators that are complementary with CRISPR RNA (CrRNA). Once formed the DNA activator/CrRNA heteroduplex, the trans-cleavage activity of the CRISPR-Cas12a was activated to nonspecific cleavage of single-stranded areas of a reporter probe for fluorescence emission. Under optimal conditions, the target miRNA can be detected with a wide linear range and an excellent specificity. As a proof-of-concept, this SRI-DNA machine/CRISPR-Cas12a feedback amplification system is adaptable and scalable to higher-order artificial amplification circuits for biomarkers detection, highlighting its promising potential in early diagnosis and disease treatment.

A 65 nm CMOS rail-to-rail auto-zero operational amplifier based on charge pump internal power supply

A high-gain, low-offset, and low-power auto-zero operational amplifier with rail-to-rail input/output is proposed. Based on a time-interleaved charge pump high-voltage on-chip internal power supply, the PMOS differential pair input configuration will achieve a rail-to-rail input range with constant transconductance. Time-interleaved auto-zero continuously eliminates the input offset voltage of the operational amplifier in the time domain. An nA-level bias circuit to realize low power. The operational amplifier circuit is based on a 65 nm CMOS process. Under 1.2V power supply voltage and temperature 27 °C, the input offset voltage of the operational amplifier is 3.16 μV and the input offset current is less than 20 pA. The temperature drift coefficient of offset voltage is 0.005 μV/°C between −40 °C and 90 °C. The variation rate of input transconductance is only 5.6 % among the rail-to-rail input range. The equivalent DC gain is 106.4 dB, the unit gain bandwidth is 0.54 MHz, the phase margin is 76.5°, and the power consumption is about 0.19 mW. The layout area is 0.83 × 0.75 mm2.

DNA Gate-Based CRISPR-Cas Exponential Amplification System for Ultrasensitive Small Extracellular Vesicle Detection to Enhance Breast Cancer Diagnosis.

Tumor-derived small extracellular vesicles (tEVs) as potential biomarkers possess abundant surface proteins closely related to parent cells, which are crucial for noninvasive cancer diagnosis. However, tEVs exhibit phenotype heterogeneity and low abundance, posing a significant challenge for multiplex detection with a high sensitivity. Herein, we developed a DNA gate-based exponential amplification CRISPR-Cas (DGEAC) system for accurate and ultrasensitive detection of tEVs, which can greatly improve the accuracy of breast cancer (BC) diagnosis. Based on the coexpression of CD63 and vascular endothelial growth factor (VEGF) on BC-derived tEVs, we developed a dual-aptamer-based AND gate fluorescent probe by proximity hybridization. By integrating the target recognition and trans-cleavage activity of Cas12a, an autocatalysis-driven exponential amplification circuit was developed for ultrasensitive detection of CD63 and VEGF proteins on tEVs, which could avoid false negative signals from single protein or other interfering proteins. We achieved highly sensitive detection of tEVs over a linear range from 1.75 × 103 to 3.5 × 108 particles/mL with a detection limit as low as 1.02 × 103 particles/mL. Furthermore, the DGEAC system can distinguish tEVs from tEVs derived from different BC cell lines, including MDA-MB-231, MCF-7, SKBR3, and MCF-10A. Compared to linear amplification (AUC 90.0%), the DGEAC system effectively differentiates BC in different stages (AUC 98.3%).

Design of BJT-JFET Operational Amplifiers on the Master Slice Array

The use of dual-gate field-effect transistors located on the base matrix crystal MH2XA031, controlled by a p–n junction needed to reduce the input current of operational amplifiers is studied. Typical circuits of operational amplifiers, containing: source repeaters connected to the inputs of the operational amplifier on complementary bipolar transistors; input differential stage on p-JFET with a “current mirror” load on n–p–n-transistors; input differential in the form of a “folded cascode” on a p-JFET are analyzed. To minimize the input current, it is re commended to use bootstrapped feedback to keep the drain-to-source voltage of the input JFETs low, independent of the input common-mode voltage, and to connect only the top gate of the dual-gate JFET to the op-amp input. The electrical circuits for MH2XA031 elements and the results of circuit simulation of the developed amplifiers, called OAmp10J, OAmp11.1, OAmp11.2, are presented. Accounting the established features of the input stages and operating modes of active elements in circuit design will allow to create an operational amplifier with the required combination of basic parameters.

Triboelectric gait sensing analysis system for self‐powered IoT‐based human motion monitoring

AbstractQuantitative analysis of gait parameters, such as stride frequency and step speed, is essential for optimizing physical exercise for the human body. However, the current electronic sensors used in human motion monitoring remain constrained by factors such as battery life and accuracy. This study developed a self‐powered gait analysis system (SGAS) based on a triboelectric nanogenerator (TENG) fabricated electrospun composite nanofibers for motion monitoring and gait analysis for regulating exercise programs. The SGAS consists of a sensing module, a charging module, a data acquisition and processing module, and an Internet of Things (IoT) platform. Within the sensing module, two specialized sensing units, TENG‐S1 and TENG‐S2, are positioned at the forefoot and heel to generate synchronized signals in tandem with the user's footsteps. These signals are instrumental for real‐time step count and step speed monitoring. The output of the two TENG units is significantly improved by systematically investigating and optimizing the electrospun composite nanofibers' composition, strength, and wear resistance. Additionally, a charge amplifier circuit is implemented to process the raw voltage signal, consequently bolstering the reliability of the sensing signal. This refined data is then ready for further reading and calculation by the micro‐controller unit (MCU) during the signal transmission process. Finally, the well‐conditioned signals are wirelessly transmitted to the IoT platform for data analysis, storage, and visualization, enhancing human motion monitoring.image

Numerical simulation of single-particle transients in low-noise amplifiers based on silicon-germanium heterojunction bipolar transistors and inverse-mode structures

In this work, TCAD simulation modeling is carried out for silicon-germanium heterojunction bipolar transistor (SiGe HBT), and an X-band low noise amplifier (LNA) circuit is built based on the SiGe HBT device model to carry out the hybrid simulation of single-particle transient (SET). The rule of SET pulse varying with LET value and incident angle of ions is studied, and the results show that with the increase of incident LET value, the amplitude of SET pulse at the LNA port increases, and the oscillation time is prolonged; with the increase of incident angle of ions, the amplitude of SET pulse at the LNA port first increases and then decreases, and the oscillation time decreases. With the development of the characterization process, the cutoff frequency (&lt;i&gt;f&lt;/i&gt;&lt;sub&gt;T&lt;/sub&gt;) and the maximum oscillation frequency (&lt;i&gt;f&lt;/i&gt;&lt;sub&gt;MAX&lt;/sub&gt;) of SiGe HBT device with IM structure, are measured considering the use of inverse-mode (IM) common emitter and common-base structures (Cascode) to reduce the sensitivity of the LNAs to single-particle effects. This work calibrates the devices of the TCAD platform as well as the devices of the ADS platform, establishes F-F LNAs as well as I-F LNAs on the ADS, respectively, and verifies the relevant RF performances of the LNA circuits by using the IM-structured SiGe HBTs as the core devices. The SET experiments are performed on the Sentaurus TCAD platform for the F-F LNA circuit and I-F LNA circuit for ions incident on two positions: common base transistor and common emitter transistor, respectively. It is concluded that the LNA with IM structure still shows good RF performance compared with the standard LNA at 130 nm. The transient current duration of the LNA circuit with IM Cascode structure is significantly reduced, and the peak value is reduced by 66% or more, which significantly reduces the sensitivity of the SiGe LNA circuit to SET.

Multi-parallel Differential JFET Low-Noise Amplifier Circuit Based on Discrete Current Source

Multi-parallel Differential JFET Low-Noise Amplifier Circuit Based on Discrete Current Source

Distortion Analysis and Fault Detection in Weakly Non-linear Analog Circuits Using Simplified Volterra Series Method

In this paper a new method to find the parametric faults in weakly nonlinear analog circuit is proposed. Frequency domain volterra kernels are derived to calculate the test parameters i.e., nonlinear distortions and the cross spectral density. Volterra kernels are sensitive to device parameter and the components used to build the circuit. Device parameter and each component value are varied within the tolerance limit using Monte Carlo simulation. For the fault free circuit maximum and minimum values of the 3rd order harmonic, intermodulation distortion and the cross spectral density are measured. During testing, single and multiple faults are injected and the test parameters are measured. If any one or more test parameters are outside the predetermined bounds the circuit is declared to be faulty. This proposed method offers high fault coverage capability. To validate this method CMOS differential amplifier circuit is taken under consideration.

Inductor-Less Low-Power Low-Voltage Cross-Coupled Regulated-Cascode Transimpedance Amplifier Circuit in CMOS Technology

Inductor-Less Low-Power Low-Voltage Cross-Coupled Regulated-Cascode Transimpedance Amplifier Circuit in CMOS Technology

FEN1-assisted DNA logic amplifier circuit for fast and compact DNA computing.

This work developed DNA amplifier logic gates (AND-OR, OR-AND, FAN-IN, FAN-OUT, and 4-bit square-root circuits) using a flap endonuclease 1 (FEN1)-catalyzed signal amplification reaction, for the fastest and compact DNA computing. Moreover, the logic circuit can use input strands with concentrations of less than 1 nM, which is more than 100 times lower than the input concentration of other DNA logic circuits, providing a promising methodology for constructing fast and compact DNA computations.

Application of Arithmetic Amplification Circuits in Metal Identification

Application of Arithmetic Amplification Circuits in Metal Identification

Sziklai Pair based Small signal Amplifier with bjt-mosfet Hybrid Unit at 180nm Technology

Two circuit models of Small Signal amplifier, constituted with BJT-MOSFET hybrid unit under Sziklai pair topology are designed and analyzed using ‘PSpice’ and ‘Cadence Virtuoso and Spectre simulation tool (at GPDK 180nm technology)’ respectively. First amplifier (Circuit-1) uses PSpice user-defined model of BJT and MOSFET whereas the second amplifier (Circuit-2) consists of transistors available at GPDK 180nm technology. Circuit-1 can amplify the AC signals of 1mV-1nV range with optimum voltage gain 389.532, 137.570 current gain, 14.464MHz bandwidth and 2.43% THD. However, Circuit-2 can amplify AC signals of 0.1mV-10nV range with 164.018 voltage gain, 32.775 current gain, 11.906 MHz bandwidth, and 13.608E-6% THD. Both the proposed amplifier circuits remove narrow band problem and generate better results than earlier announced small signal Sziklai pair amplifier with BJT-MOSFET hybrid unit in respect of voltage and current gains, bandwidth, THD, and power consumption. Proposed amplifiers successfully address the problem of poor frequency response of small signal Darlington pair amplifier in higher frequency range and narrow bandwidth limitations of small-signal PNP Sziklai pair amplifier. Dependency of the proposed amplifiers at various biasing resistances and performance with temperature variation, noise variation, DC supply variation, and phase variation are also discussed herein. Proposed Circuits display strong dependency over ideal maximum forward beta ‘β’ of NPN transistor, Transconductance ‘VTO’ of P-MOS transistor and additional biasing resistances ‘RA’. Layout of Circuit-2 is found to cover 96.3898µm2 area with 11.32µm length and 8.515µm breadth. Minor percentage variation between pre-layout and post-layout simulation results of Circuit-2 validates the proposed design at GPDK 180nm technology. Monte Carlo and Process Corner analysis are also performed to test the robustness and insensitivity of Circuit-2 against mean value of the parameters and process and mismatch respectively. Performance summary of the proposed circuits and comparison with the recently reported designs shows effectiveness of the proposed circuits in terms of power gain, THD, voltage gain, current gain, input referred noise and power gain. Qualitative analysis of the proposed Circuits recommends its usability as Low Noise Amplifier in the portable RF noise measurement system.

Increasing the accuracy of electrostatic fields strength measurement by using an improved differential transimpedance amplifier circuit

An electrostatic field mill (EFM) is widely used to measure the strength of electrostatic fields, the main drawback of which is the occurrence of large measurement errors (up to 15 % in the range from 0 to 1 kV/m). This paper examines the aspects of using transimpedance amplifiers (TIAs) for the tasks of converting the current received from the EFM sensor into voltage, which will make it possible to reduce the instrumental error and ensure the linearity of the atmospheric electrostatic field strength measurement. In the general case, for the functional circuits of the electrostatic field mill, which include a differential transimpedance amplifier, there is the use of two TIA circuits, which are connected in parallel. Despite the simplicity of implementation, such a configuration contains a number of disadvantages and is not optimal. In the paper, a comparative analysis of a typical circuit of a differential TIA and a circuit of an ungrounded differential transimpedance amplifier with zero voltage drop proposed by the authors is carried out. As a result of the analysis, it was established that the designed authentic circuit of the ungrounded differential transimpedance amplifier with zero voltage drop has better parameters of linearity and interference resistance, in contrast to the generally accepted one. The value of the signal-to-noise ratio for the proposed scheme improved by 42 % on average compared to the typical one. The main difference of the proposed scheme is that the stability of the amplification factor is ensured, the influence of the bias parameters of the operational amplifier is leveled, and the overall noise level is reduced. The use of the designed scheme of an ungrounded differential transimpedance amplifier with zero voltage drop could make it possible to increase the accuracy of the measurement of the electrostatic field strength

A wideband low power RF Receiver Front-End for Internet-of-Things applications

This paper presents a broadband RF receiver front-end circuit that offers advantages in both area and power consumption. The design features an innovative dual-path noise-canceling Low-Noise Amplifier (LNA) circuit, achieving impedance matching and balun functionality without the need for on-chip inductors. The RF receiver front-end circuit comprises a I and Q doublebalanced quadrature passive mixers and an 25% duty-cycle LO generator. The circuit’s broadband characteristics enable it to operate across a wide range of frequency bands. It is implemented using a 65 nm CMOS process. The core circuit, including both RF and baseband signal paths, consumes a mere 12 mW of power. Test results demonstrate that the RF receiver front-end circuit achieves a conversion gain of 35–40 dB, a noise figure (NF) below 4.8 dB, and a minimum third-order intercept point (IIP3) exceeding −6.8 dBm over the 0.1–3.1 GHz frequency range. The chip’s overall footprint is compact at 0.9 mm2, with the entire RF signal path powered by a 1 V supply, offering clear advantages in terms of compactness and low power consumption.

Design of a Novel Magnetic Induction Switch with a Permalloy Film and a Trans-Impedance Amplifier Circuit

At present, magnetic induction switches are widely used in industrial automation control and biological sensing systems. A core module composed of a magnetic sensing device and a signal conditioning circuit is designed and analyzed in this paper. Utilizing a permalloy film with the anisotropic magneto-resistance (AMR) effect, the novel magnetic induction switch shows its ability to correctly detect the direction of magnetic fields. Furthermore, an interfacial circuit based on a trans-impedance amplifier (TIA) is designed to measure and regulate the output signal of the sensing device. Accurate simulation results show the gain of the TIA reaches up to 51.36 dB with a bandwidth of 1.3 GHz and a power consumption of 3.65 mW. The outstanding performance of the proposed module demonstrates the possibility of solving the problems induced by high input impedance, high frequency, and parasitic effects in magnetic induction switches.

(Digital Presentation) A Novel Method for Precise Measurement of Displacement Using Eddy Currents at High Temperature

In this paper, a novel method of measuring displacement using eddy currents at high temperature is presented. The measurement system consists of a sensing coil created on a PCB by patterns, a parallel turning circuit and a microcontroller including a signal processing unit. When the gap distance between the conductive target and the sensing coil changes, the inductance value of the coil varies by the influence of the eddy current. By detecting the change in the inductance, we have proposed a novel method to precisely measure the displacement of the coil. In order to make the optimal coil, a theoretical analysis was conducted using the inductance calculation theory, and the magnetic field distribution and inductance variation of the coil were analyzed using ANSYS Maxwell. Then, the coil was fabricated as a PCB, and the measured result value was compared with each analysis result, and the coil most suitable for the system was selected. The circuit was designed so that the characteristics of the synchronization amplification circuit in the detection system were minimized in temperature change, and the temperature characteristics were primarily corrected in hardware by adding a temperature correction circuit. The output value of the primarily corrected tuning amplification circuit improved the temperature characteristics of the sensor by secondarily correcting the temperature characteristics in firmware, and is designed to meet the IPC class 3 specification. The sensing range of the implemented measurement system was 0.0 ~ 3.8 mm, the nominal value of the fabricated sensing coil was 11.2uH, and the resonance frequency of the tuning circuit including the sensing coil was 300Khz. The operating temperature of the system is – 40 ~ 150 ℃ and the resolution is 0.15 mm within the range of 0.0 ~ 3.8 mm. From the experimental results, Comparing the change in inductance with respect to the moving distance of the measurement system and the displacement signal measured by the system, it can be seen that as the inductance increases, the displacement output increases, and as the inductance decreases, the displacement also decreases. Considering this, it was found through the system that inductance and output of displacement are correlated, and is seen operates stably at high temperature and has linearity. Figure 1