All-optical Circuits Research Articles

Novel Statistical OSNR Budgeting for Optically Amplified DWDM Circuits With Polarization-Dependent Loss

Polarization-dependent loss of optical components used in all-optical network circuits may introduce fast power fluctuations and bursts of high bit-error-rate (BER) impairment at a receiver. The power fluctuation in amplified circuitry manifests as statistics of both power and optical-signal-to-noise-ratio (OSNR) penalty at the receiver. Importantly, the power and OSNR statistics are not directly correlated in a long chain of amplifiers and the impact to BER is rather complicated. We propose the corresponding statistic model for budgeting OSNR to guarantee the probabilistic system availability

Wide Dynamic Range All-Optical Clock and Data Recovery From Preamble-Free NRZ-DPSK Packets

We demonstrate an all-optical circuit that simultaneously performs packet-by-packet clock recovery (CR) and data demodulation from 10-Gb/s nonreturn-to-zero differential-phase-shift-keying packets. It includes a novel power equalizer based on a nonlinear self-polarization switch in a semiconductor optical amplifier that enables operations within 15-dB input power level fluctuations. Data demodulation is realized by a Gaussian narrow filter that simultaneously seeds a stage performing CR. CR is performed by a Fabry-Peacuterot filter-based circuit. By using the input packets as a gating signal, the circuit is able to extract clock packets with 0-bit rise and fall times. The circuit can operate asynchronously and with arbitrary packet length

Introduction to the Issue on High-Speed Photonic Integrated Circuits

The nine invited and five contributed papers in this special issue cover today's advancement in monolithic integration and high-level function integration of optoelectronic and all-optical circuits that enable transmission, switching, and signal processing at data rates from 40 to 160 Gbps and beyond.

Y-TYPE PHOTONIC CRYSTAL WAVEGUIDE WITH MINIMUM BRANCHES SPACE

The abstract should summarize the context, content and conclusions of the paper in less than 200 words. We fabricated a two-dimensional Y-branch photonic crystal waveguide in the near infrared region by using focused ion beam etching and depositing system. The light guide characters of the waveguide were measured for three different spaces between branches. Field intensity distributions of TE polarized wave in the branches were simulated by using the transfer matrix method. Both the theoretical and experimental results show that the shortest space between branches of the photonic crystal waveguide is about 1.4 times wavelength of transmitted light. If the space became shorter, the light in the two branches would couple to each other seriously. This result might be helpful for the design of compact wave demultiplexer and all-optical integrated circuits.

Necessary temporal condition for optimizing the switching window of the semiconductor-optical-amplifier-based ultrafast nonlinear interferometer in counter-propagating configuration

A comprehensive theoretical model of the semiconductor optical amplifier (SOA)-based ultrafast nonlinear interferometer (UNI) in counter-propagating configuration is presented. The model consists of a set of equations that describe the gain and phase dynamics of an SOA deployed as the nonlinear element in an interferometric switch. By undertaking an extensive numerical analysis, the transmission response of the UNI is calculated with respect to the key temporal parameters of the SOA transit time, the time delay between the two copies of the clock signal to be switched, and the width of the control pulses that alter the SOA properties. The obtained simulation results allow us to investigate the simultaneous influence of these parameters on the switching window and effectively correlate them to derive an operational condition that must necessarily hold in order to achieve satisfactory operation. The thorough study of this condition enables us to specify the restrictions imposed on each involved parameter and extract useful design rules concerning their proper selection and combination so as to ensure optimum performance. The proposed model can provide the framework for studying more complex, combinatorial all-optical circuits of enhanced functionality in which the UNI is the core switching module.

On the output characteristics of a semiconductor optical amplifier driven by an ultrafast optical time division multiplexing pulse train

A comprehensive theoretical analysis of a semiconductor optical amplifier (SOA) that is subject to an ultrafast optical time division multiplexing pulse stream is presented with the help of a simple but efficient model developed for this purpose. The model combines the necessary set of mathematical equations with the appropriate simplifying assumptions to describe in the time domain gain saturation and recovery for the case of multiple incoming pulses. In this manner, analytical expressions can be obtained for the power and chirp profile of the amplified pulses, essentially extending the work that has been performed for a single pulse only. This allows to identify the critical operational parameters and to investigate and evaluate their effect on these two output characteristics. The derived simulation curves are thoroughly studied to specify the limitations imposed on the SOA small signal gain and carrier lifetime as well as on the full-width at half-maximum (FWHM) and energy of the input pulses and, based on a series of logical arguments, to extract useful rules concerning their selection so as to achieve improved performance with respect to the practical applications of all-optical switching and pulse compression. The obtained results indicate that due to the continuous insertion of pulses, the requirements for the SOA small signal gain and the input pulse energy are stringent than those for the case of isolated pulse amplification. The combination of these two parameters determines also the regime in which the amplifier must be biased to operate in order to ensure distortionless pulse amplification and enhanced chirp for efficient pulse compression and it has been found that low saturation is necessary for the former case whilst heavy saturation for the latter. The scopes of the corresponding requirements for the carrier lifetime and the FWHM are also tight but to a less extent and can be simply satisfied with the available photonics technology. These results are in good agreement with the available experimental data essentially proving the validity and robustness of the model. The model can be thus applied to predict the behavior of more complex all-optical circuits of enhanced functionality in which the SOA is the basic functional device.

All-optical flip-flop circuit composed of coupled two-port resonant tunneling filter in two-dimensional photonic crystal slab

We propose an optical flip-flop circuit composed of two-port resonant-tunneling filters based on a two-dimensional photonic crystal slab with a triangular air-hole lattice. This circuit can function as an optical digital circuit that synchronizes input data with a clock. In this report, we demonstrate that this circuit can achieve a fast operating speed with a response time of about 10 ps and a low operating power of 60 mW by employing a two-dimensional FDTD calculation.

Optical bistability of planar metal/dielectric nonlinear nanostructures

AbstractWe study theoretically a nonlinear response of the planar metal/dielectric nanostructures constituted from periodical array of ultra thin silver layers and the layers of Kerr-like nonlinear dielectric. We predict hysteresis-type dependences of the components of the tensor of effective dielectric permittivity on the field intensity allowing the change in material transmission properties from transparent to opaque and back at extremely low intensities of the light. It makes possible to control the light by light in all-optical nanoscale devices and circuits.

Compact header processing circuit for optical DPSK packets

By means of only one SOA a compact all-optical circuit that simultaneously extracts the header information and produces a sequence of multiwavelength coloured pulses from the DPSK packets is demonstrated. Combined with an optical demultiplexer, this realises a highly scalable all-optical header processor based on time-to-wavelength conversion. Experimental results demonstrate operation on packets with eight different DPSK headers at 10 Gbit/s. The system requires low optical power, can potentially operate at high speed, is asynchronous and suitable for photonic integration in a single chip.

Theoretical analysis and performance investigation of ultrafast all-optical Boolean XOR gate with semiconductor optical amplifier-assisted Sagnac interferometer

A comprehensive theoretical model of an ultrafast all-optical Boolean XOR gate implemented with a semiconductor optical amplifier (SOA)-assisted Sagnac interferometer is presented. The model accounts for the SOA small signal gain, linewidth enhancement factor and carrier lifetime, the switching pulses energy and width and the Sagnac loop asymmetry. By undertaking a detailed numerical simulation, the influence of these key parameters on the metrics that determine the quality of switching is thoroughly investigated and simple design rules are extracted for their proper selection so as to ensure optimum operation. The obtained results are in good agreement with the published experimental measurements and confirm the feasibility of realizing the gate at 10 Gb/s with fairly high performance. The model can be extended for studying more complex all-optical circuits of enhanced functionality in which the XOR gate is the basic building block.

A Y-Branch Photonic Crystal Slab Waveguide with an UltrashortInterport Interval

We fabricated two-dimensional photonic crystal slabY-branch waveguides with different intervals between the two outputports and measured their light guiding characteristics. The fieldintensity distributions of the TE polarized wave modes are alsocalculated by means of a transfer matrix method. Both the theoreticaland experimental results show that the minimum interval between the twooutput ports is about 1.4 times the transport wavelength of 1.55 μm. Ifthe interval becomes smaller, light waves in the two branches willcouple each other seriously. The result will be helpful for designs ofultracompact wave demultiplexers and all-optical integrated circuits.

28-ps switching window with a selective area MOVPE all-optical MZI switch

The first dynamic all-optical switching of a bandgap-engineered Mach-Zehnder interferometer semiconductor optical amplifier all-optical switch was achieved. A 28-ps switching window was successfully confirmed. This is the first demonstration of a bandgap-engineered large-scale all-optical photonic integrated circuit with either selective-area-growth or quantum-well-intermixing techniques.

All-optical signal Processing and applications within the esprit project DO/spl I.bar/ALL

This paper reviews the work performed under the European ESPRIT project DO/spl I.bar/ALL (Digital OpticAL Logic modules) spanning from advanced devices (semiconductor optical amplifiers) to all-optical modules (laser sources and gates) and from optical signal processing subsystems (packet clock recovery, optical write/store memory, and linear feedback shift register) to their integration in the application level for the demonstration of nontrivial logic functionality (all-optical bit-error-rate tester and a 2/spl times/2 exchange-bypass switch). The successful accomplishment of the project's goals has opened the road for the implementation of more complex ultra-high-speed all-optical signal processing circuits that are key elements for the realization of all-optical packet switching networks.

Compact all-optical packet clock and data recovery circuit using generic integrated MZI switches

We present and evaluate a compact, all-optical Clock and Data Recovery (CDR) circuit based on integrated Mach Zehnder interferometric switches. Successful operation for short packet-mode traffic of variable length and phase alignment is demonstrated. The acquired clock signal rises within 2 bits and decays within 15 bits, irrespective of packet length and phase. Error-free operation is demonstrated at 10 Gb/s.

40 Gb/s all-optical packet clock recovery with ultrafast lock-in time and low inter-packet guardbands

We demonstrate a 40 Gb/s self-synchronizing, all-optical packet clock recovery circuit designed for efficient packet-mode traffic. The circuit locks instantaneously and enables sub-nanosecond packet spacing due to thelow clock persistence time. A low-Q Fabry-Perot filter is used as a passive resonator tuned to the line-rate that generates a retimed clock-resembling signal. As a reshaping element, an optical power-limiting gate is incorporated to perform bitwise pulse equalization. Using two preamble bits, the clock is captured instantly and persists for the duration of the data packet increased by 16 bits. The performance of the circuit suggests its suitability for future all-optical packet-switched networks with reduced transmission overhead and fine network granularity.

All-optical logic operations by means of two interlinked χ^(2) interactions in a single crystal

The possibility of realizing the fundamental logic gates AND, OR, and NOT, which operate in parallel through two interlinked χ(2) interactions of sum- and difference-frequency generations in a single type I β-BaB2O4 crystal, is presented both theoretically and experimentally. Optical bits are encoded and read as amplitude modulation of the harmonics of a Nd:YAG laser. Owing to the excellent optical resolution of the system, data can be encoded at high density. The implementation of an all-optical parallel half-adder is also shown. The output fields can be frequency converted to implement an all-optical looping circuit.

Ultra-high speed all-optical shift registers and their applications in OTDM networks

All-optical shift registers are basic building modules for the development of ultra-high speed optical time division multiplexing networks. In this paper, we review the progress that has been made in this cutting-edge technology, focusing on implementations that exploit the attractive features of semiconductor optical amplifier (SOA)-based interferometric configurations. We present regenerative storage performed with an all-optical recirculating shift register with an inverter at 10 Gb/s using a SOA-assisted Sagnac switch and a second SOA to provide feedback. We demonstrate also an all-optical memory based on the SOA-assisted Ultrafast Nonlinear Interferometer capable of reading/writing 20 Gb/s packets of variable length without data inversion. These registers can find application in the development of two nontrivial complex all-optical circuits of enhanced functionality. The first is an all-optical pseudorandom binary sequence generator for which we describe an efficient design algorithm and propose ways for monitoring and verification. The second is an all-optical error counter for which we address the error detection and evaluation issues using a novel sampling technique. These circuits are key elements for the implementation of a high-speed, all-optical bit error rate tester (BERT), which has the potential to outperform its electronic equivalent and constitute a possible new product for the telecommunications industry.

Generation of 40-GHz control signals from flag pulses for switching all-optical gates for use with optical packets.

We demonstrate an all-optical circuit capable of generating 40-GHz control signals from flag pulses that can be used to define the switching state of all-optical gates for use with optical packets. The circuit comprises a Fabry-Perot filter and a semiconductor optical amplifier, and with a single pulse it can generate 12 control pulses with 0.64-dB amplitude modulation. With two and three flag pulses the number of control pulses becomes 36 and 54, respectively.

Ultrafast nonlinear interferometer (UNI)-based digital optical circuits and their use in packet switching

Digital optical logic circuits capable of performing bit-wise signal processing are critical building blocks for the realization of future high-speed packet-switched networks. In this paper, we present recent advances in all-optical processing circuits and examine the potential of their integration into a system environment. On this concept, we demonstrate serial all-optical Boolean AND/XOR logic at 20 Gb/s and a novel all-optical packet clock recovery circuit, with low capturing time, suitable for burst-mode traffic. The circuits use the semiconductor-based ultrafast nonlinear interferometer (UNI) as the nonlinear switching element. We also present the integration of these circuits in a more complex unit that performs header and payload separation from short synchronous data packets at 10 Gb/s. Finally, we discuss a method to realize a novel packet scheduling switch architecture, which guarantees lossless communication for specific traffic burstiness constraints, using these logic units.

Clock and data recovery circuit for 10-Gb/s asynchronous optical packets

We demonstrate an all-optical clock and data recovery circuit for short asynchronous data packets at 10-Gb/s line rate. The technique employs a Fabry-Perot filter and a SOA-based ultrafast nonlinear interferometer (UNI) to generate the local packet clock, followed by a second UNI gate to act as decision element, performing a logical AND operation between the extracted clocks and the incoming data packets. The circuit can handle short packets arriving at time intervals as short as 1.5 ns and arbitrary phase alignment.