Adjacent Channel Leakage Ratio Research Articles

Multiphase Interpolating Digital Power Amplifiers for TX Beamforming

This paper presents a four-channel beamforming TX implemented in 65 nm CMOS. Each beamforming TX is comprised of a C-2C split-array multiphase switched-capacitor power amplifier (SAMP-SCPA). This is the first use of multiphase interpolation (MPI) for beam steering. This technique is ideal for low-frequency beamforming and MIMO, as it does not require passive or LO-based phase shifters. The SCPA is ideal for use as the core element since it can perform frequency translation and data conversion, and drive an output at high power and efficiency in a compact die area. A prototype four-element beamforming TX, occupying 2mm×2.5mm, can achieve a peak output power of 24.4 dBm with a peak system efficiency (SE) of 24%, while achieving <1∘ phase resolution and <1 dB gain error. When transmitting a 15 MHz, 64-QAM long-term evolution (LTE) signal it outputs 18.4 dBm at 14% SE with a measured adjacent channel leakage ratio (ACLR) of <−30 dBc and an error vector magnitude (EVM) of 3.27% RMS at 1.75 GHz. A synthesized beam pattern based on measured results from a single die achieves <0.32∘ RMS beam angle error and <0.1 dB RMS beam amplitude error.

High-Efficiency Dual-Band Filtering Doherty Power Amplifier Based on Multi-Function Circuit

This article presents a high-efficiency dual-band filtering Doherty power amplifier (DPA) using multi-function circuits for simplifying the structure. A dual-band filtering power combiner also plays the role of real-to-real impedance matching, in which one resonator is shared by both the power combing and filtering circuits. Thus, only one extra resonator is needed for the power combiner to provide second-order dual-band filtering responses, which contributes to high efficiency of the DPA. Transmission zeros are generated between the two passbands, realizing a sharp roll-off rate and greatly enhancing the isolation between the two passbands. Meanwhile, an impedance control network is designed to simultaneously suppress the harmonics and transform the optimized complex impedance desired by the transistor to a real one. In this way, the output matching network and extra filter in conventional design are realized by the filtering power combiner and impedance control network in the proposed design, resulting in a simpler structure. A dual-band DPA operating at 2.14 and 2.6 GHz is implemented with the measured peak efficiencies of 64.4% and 69% at the output power of 43.25 and 43.3 dBm, respectively. The 6-dB back-off efficiencies are 50% and 57% at the two passbands. Under 20-MHz long term evolution (LTE) modulated signals with a peak-to-average power ratio (PAPR) of 7.5 dB, the DPA after digital predistortion (DPD) is measured with an adjacent channel leakage ratio (ACLR) of better than −45.2 dBc and the efficiencies of 51.6% and 54.3% at interested bands. The peak efficiency under the excitation of the concurrent modulated signal is 48.6%.

A 9 dB back‐off dual‐band asymmetric Doherty power amplifier using dual peaking amplifiers for reactance compensation

AbstractThis paper proposes a dual‐band asymmetric Doherty power amplifier (ADPA) with 9 dB power back‐off range using dual parallel peaking amplifiers to realize reactance compensation for wideband operation at two frequency bands. To achieve dual‐band amplification, the specific phase delays of the carrier and peaking output matching networks (OMNs) required on the two target frequency bands were determined using the phase delay period repeatability principle combined with the Doherty impedance transformation first. Then, the carrier and peaking OMNs were designed according to the desired phase delay. More specifically, two parallel peaking amplifiers using the low‐order impedance transformation network were combined to generate the desired compensating reactance at the back‐off power range for wideband operation. For verification, a dual‐band ADPA operating over 2.35–2.75 and 3.2–3.6 GHz frequency bands was designed and measured. Experimental results show that, for the two frequency bands, the efficiencies at saturation are 53.6%–64.3% and 48%–67.8%, with the 9 dB back‐off efficiencies reaching 41.5%–53.3% and 40.5%–52.8%, respectively. When stimulated by a 20 MHz modulated signal, the designed ADPA can achieve the adjacent channel leakage ratio of −48 dBc after linearization.

A mm-Wave Switched-Capacitor RFDAC

This article proposes an interleaving switched-capacitor RF digital-to-analog converter (RFDAC) using an edge combiner within the output stage to implicitly triple its effective clock carrier frequency and enable the mm-wave (mmW) operation. Tripling in the output stage allows for increased energy efficiency, which is further improved by employing an edge-combining-based frequency-tripling delay-locked loop (DLL) in the clock generation network. The clock tripling is performed in each slice of the switched-capacitor PA (SCPA), which allows yet another 3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> frequency reduction for the global clock distribution. Finally, a new layout structure accounts for transmission-line (TL) effects, due to the large physical size of the passive capacitor array. Implemented in 22-nm FD-SOI, the prototype achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$ {{P_{\mathrm{ out}}}}&gt;21$ </tex-math></inline-formula> dBm, drain efficiency >36%, and system efficiency >22% while operating in the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ka</i> -band at 28 GHz. Modulation at 2.4 Gb/s results in 3.3% EVM and 30.8-dBc adjacent channel leakage ratio (ACLR).

Symmetrical Load Modulated Balanced Power Amplifier With Asymmetrical Output Coupling for Load Modulation Continuum

This article presents a technique for load-modulated balanced amplifiers (LMBAs) to achieve a continuum of load modulation (LM) ratio. This has been possible in prior arts using asymmetrical auxiliary devices. In contrast, the proposed technique employs identical auxiliary devices. A LM ratio is enabled by a specific coupling factor of the power-combining coupler at the output. The proposed LMBA technique is demonstrated through the design, implementation, and measurement of a concurrent wideband LMBA operating across 3.1–4.2 GHz. The prototype achieves a peak output power of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$ 48.1\pm 0.6~\text {dBm}$ </tex-math></inline-formula> , with drain efficiency of 47–58% at peak power and 47–61% at 10-dB power back-off. The concurrent wideband performance is demonstrated by a characterization with 900-MHz new radio (NR) signal with 10-dB peak-to-average power ratio (PAPR). At 37.8 dBm of average output power, the measurement yields 44% drain efficiency and −44-dBc adjacent channel leakage ratio (ACLR).

A Quasi-Balanced Power Amplifier With Feedforward Linearization

In this letter, a feedforward (FFW) linearized power amplifier (FFW PA) composed of quasi-balanced PA (QBPA) and cancellation stages is proposed by suppressing the third-order intermodulation (IM3) tones. The QBPA stage is used for extracting the IM3 tones and the FFW technique is used for suppressing IM3 tones in the cancellation stage. Compared to the conventional FFW amplifier, the proposed FFW PA does not require a phase shifter and attenuator in the QBPA stage and does not need to employ a high-gain auxiliary amplifier in the cancellation stage. The measured output-referred 1-dB gain compression point of the proposed FFW PA is +30.8 dBm at 3.5 GHz, which is 3.8 dB higher than the single PA used in the FFW PA. In two-tone measurement at 7.8-dB back-off output power (+20 dBm/tone), the IMD3 level of the FFW PA is −54.6 dBc, which is lower by 14 dB compared to that of the conventional balanced PA. In the LTE evaluation with a 64 quadrature amplitude modulation signal in 20-MHz bandwidth and +23-dBm transmitting power, the measured output spectra of the proposed FFW PA exhibit an adjacent channel leakage ratio of −48.7 dB, which is a 6.6-dB improvement over the conventional balanced PA.

Analysis of peak-to-average power ratio in filter bank multicarrier with offset quadrature amplitude modulation systems using partial transmit sequence with shuffled frog leap optimization technique

&lt;p class="Abstract"&gt;Because of its low adjacent channel leakage ratio, the Filter Bank Multicarrier with Offset Quadrature Amplitude Modulation (FBMC-OQAM) has sparked the attention of many researchers in recent times. However, the problem of high Peak-to-Average Power Ratio (PAPR) measurement has a detrimental influence upon the FBMC system's energy measurement efficiency. We study PAPR reduction of FBMC-OQAM signals using the Partial Transmit Sequence (PTS) methods in this work. The PTS with shuffled frog leap phase optimization method is proposed in this paper to reduce the larger PAPR measurement, which is the major disadvantage of the filter bank multicarrier with offset quadrature amplitude modulation system. According to the simulation software findings, the suggested approach has a considerably superior PAPR, which may reduce the PAPR by about 2 dB at complementary cumulative distribution function 10&lt;sup&gt;-3&lt;/sup&gt; when compared to the traditional PTS method, and it has a much lower computational complexity than the previous ways. The experimental parameters are measured, and results are evaluated using MATLAB tool.&lt;/p&gt;

High‐accuracy filtering‐based envelope generation and digital predistortion for wideband envelope tracking power amplifier

A high-accuracy filtering-based envelope generation technique for wideband envelope tracking power amplifiers (ET PAs) is proposed to improve PA efficiency with limited envelope bandwidth. It is achieved by optimizing the envelope generation block by employing three generalized rectification functions. The proposed envelope can be obtained by finding the proper coefficients in these generalized rectification functions. Furthermore, the digital predistortion can be employed to compensate for the nonlinearity and memory effect introduced by the proposed envelope. Experiments have been carried out on an ET system that is operated with the center frequency of 3.5 GHz, which have shown that the proposed technique can improve the PA efficiency by more than 2.2% with only 1.2× the modulated bandwidth compared to the state-of-the-art methods. The normalized mean square error can achieve −44.8 dB, and the adjacent channel leakage ratio can achieve better than −52 dBc. The proposed technique can improve the PA efficiency with limited envelope bandwidth compared to the state-of-the-art techniques, and the PA supplied by the proposed envelope can be linearized well, while it may cost more resources to find the proper coefficients of these three generalized rectification functions.

Linearization Schemes for Radio Over Fiber Systems Based on Machine Learning Algorithms

This work is regarding the concept and implementation of pre- and post-distortion schemes idealized for radio-over-fiber (RoF) systems. Analog RoF systems have been considered potential to increase the capillarity of future mobile networks. However, the integration of the radiofrequency (RF) and optical systems might introduce nonlinearities that increase the in-band and out-band interferences. The proposed schemes employ a multi-layer perceptron (MLP) artificial neural network (ANN) linearization for reducing the signal distortions. We have applied our linearization schemes to orthogonal frequency division multiplexing (OFDM) signals for investigating its performance, in terms of root mean square error vector magnitude (EVM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RMS</sub> ), normalized mean square error (NMSE) and adjacent channel leakage ratio (ACLR). Numerical results demonstrate promising linearization performance, since the EVM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RMS</sub> has been kept as low as 3%, attaining NMSE and ACLR lower than below −30 dB and −35 dB, for input RF power up to 23 dBm.

A Dual-Band RF All-Digital Transmitter Based on MPWM Encoding

Radio frequency (RF) all-digital transmitter (ADT) is one of the most attractive techniques in the next-generation RF transceivers, especially in the carrier aggregation and multiband, multistandard transmission scenario. Among the multiband RF ADTs reported in recent years, the delta–sigma modulation (DSM)-based scheme is the most popular. However, implementing multiband DSM-based RF ADT in field-programmable gate array (FPGA) produces problems of high complexity, high resource consumption, limited carrier frequency (CF) agility, and poor indicator performance. To address these problems, a dual-band ADT architecture with mapping-based pulse width modulation (MPWM) method is first presented in this article. In the ADT, the dual-band intermediate frequency (IF) signals are mapped to the RF sequence by a lookup table (LUT), and the CF can be adjusted by updating the LUT values. The operation principle of the ADT is explained, and the noise analysis model of MPWM is given. Furthermore, three optimization methods are presented to improve the performance of ADT. To evaluate the proposed architecture and methods, the ADT is implemented on an FPGA chip, and the resource consumption is relatively low. A dual band of 16- and 64-QAM signals with bandwidth (BW) of 20 MHz is tested with different CF and CF spacings. From 1 to 4.1 GHz, the adjacent channel leakage ratio (ACLR) values are below −43 dBc, and the error vector magnitude (EVM) values are below 3.5%. From 4.1 to 6.15 GHz, the ACLR values are below −40 dBc, and the EVM values are below 5%. The proposed architecture and design methods can be applied to triple-band or other more band ADT.

Low-Complexity Adaptive Frequency-Domain Nonlinear Equalization for Analog RoF Mobile Fronthaul Using FFT/IFFT-Assisted Channel Aggregation

Addressing the nonlinearity induced signal degradation is of critical importance for harvesting the transparent benefits of an analog radio over fiber (A-RoF) architecture, to support mobile fronthaul (MFH) with high spectral efficiency and reduced latency. Here, for linearizing the low-latency A-RoF MFH using digital-domain fast Fourier transform /inverse fast Fourier transform (FFT/IFFT) assisted channel aggregation/de-aggregation (CA/DA), we propose and experimentally demonstrate a compatible adaptive frequency-domain (FD) nonlinear equalization scheme. This scheme is characterized by a much lower computational complexity compared with the popular time-domain Volterra nonlinear equalizer while delivering a comparable performance. The proposed equalization scheme is implemented using the FD two-box cascaded Hammerstein structure. It enables simplified coefficients estimation, computationally efficient equalization, FFT/IFFT calculation reusing in channel DA, and shared legacy one-tap FD linear equalization in the OFDM system. Experimental validations of the proposed nonlinear equalization approach are carried out via typical electroabsorption modulator (EAM) and Mach-Zehnder modulator (MZM) based intensity modulation and direct detection (IMDD) A-RoF links. Cost-effective fiber-optic (with EAM) and optical up-conversion enabled V-band millimeter-wave (mm-wave) fiber-wireless (with MZM) transmissions are demonstrated. Experimental results show that the proposed scheme can effectively improve the performances of both EAM and MZM based 10-km fiber-optic A-RoF MFH links, in terms of the (>8 dB) reduction of adjacent channel leakage ratio, (>10 dB) improvement of error-vector magnitude (EVM) and (>5 dB) enhancement of input intermediate-frequency (IF) power range, which retains an acceptable (below 8 %) EVM performance for the 64-QAM modulation. The input IF signal aggregates 8 125-MHz 64-QAM OFDM channels. Furthermore, the proposed scheme enables the transmission of a 5-Gbit/s aggregated IF 64-QAM signal over a 10-km fiber link and 1.2-m 60-GHz wireless channel, wherein a >12 dB improved input power margin is observed.

8‐12 GHz single‐input GaN load modulated balanced amplifier monolithic microwave integrated circuit

In this article, a broadband single-input GaN load modulated balanced amplifier (LMBA) with prematching networks is presented. The prematching networks of main PA are set up to reduce the difficulty of load modulation caused by high power control signal. The compact phase shifter and compression characteristic of the CS PA are used to monolithically integrate a single-input LMBA. The experimental results under continuous wave demonstrate a peak output power of 43.1–43.6 dBm, with drain efficiency (DE) of 49%–54% over the band of 8–12 GHz. Moreover, the DE is in the range of 30%–37% at the 6-dB power back-off region. By introducing a 16-quadrature amplitude modulation signal with 6-dB peak-to-average power ratio, the proposed single-input LMBA monolithic microwave integrated circuit achieves better than −28-dBc adjacent channel leakage ratio and higher than 32% average DE without digital predistortion at 9 and 11 GHz.

Adjacent channel interference suppression based on spectral extrapolation to enhance electromagnetic compatibility of co‐site radio devices

AbstractInterference suppression is an effective technique to enhance the electromagnetic compatibility of co‐site radio devices. In adjacent channel interference (ACI) suppression, a wideband analog‐to‐digital converter (ADC) is always required to sample the nonlinear characteristics of the interference signal to reconstruct the ACI, resulting in a significant increase in the cost of the receiver. To solve the problem, this article adopts spectral extrapolation in the ACI suppression. First, narrowband bandpass filter and ADC are employed to sample the in‐band component of the interference signal. Second the original wideband signal is recovered from the filtered signal by an inverse filter. Finally, the recovered signal is used for ACI reconstruction and cancellation. Simulation and experimental results show that when the adjacent channel leakage ratio is 45 dBc, the proposed method can achieve ACI suppression performance equivalent to that of the wideband ADC method. However, the required ADC sampling rate is only 1/3 of that of the wideband ADC.

A Dual-Band and Dual-State Doherty Power Amplifier Using Metal-Integrated and Substrate-Integrated Suspended Line Technology

In this article, a novel design method of dual-band and dual-state (DBDS) Doherty power amplifier (DPA) is proposed. Considering the actual parasitic parameters, the DPA can be designed by using the impedance transformation of saturation and back-off points at dual frequency bands of DBDS as well as second harmonic matching. The DBDS DPA for dual-band (DB) 5G application, i.e., 3.4 and 4.9 GHz band are designed and implemented, for the first time, by using metal-integrated and substrate-integrated suspended line (MI-SISL) technology, which has advantages of high performance and self-packaging. The fabricated DBDS DPA achieves the measured 44 and 43.2 dBm saturated power at 3.4 and 4.9 GHz bands, respectively. For the 3.4 and 4.9 GHz bands, the measured drain efficiency (DE) is 70.7% and 70.4% at peak power levels and 38% and 42% at a 6-dB output back-off, respectively. When driven by a 20- and 100-MHz modulated signal with 6-dB peak-to-average power ratio (PAPR), the adjacent channel leakage ratio is better than −27 dBc at operating frequencies. The average output power of 38 and 37 dBm with an average efficiency of 37.9% and 40.9% is achieved at 3.4 and 4.9 GHz, respectively.

A 919 MHz—923 MHz, 21 dBm CMOS Power Amplifier With Bias Modulation Linearization Technique Achieving PAE of 29% for LoRa Application

This paper presents a bias modulation linearization technique for a 919-923MHz CMOS power amplifier which employs driver voltage modulation and main amplifier split bias. Through the proposed linearization technique, it is observed that the peak third-order intercept point (OIP3) across the output power is shifting according to the bias conditions of the split-bias power amplifier (SBPA). The third-order transconductance (gm₃) terms are suppressed at the output by phase cancellation achieved by optimization of the bias voltages of the PA. A high dynamic range bias circuit is integrated at the driver and split main to enhance the linearity of the CMOS PA, eradicating the need for pre-distortion linearizers. The two-stage SBPA is designed and fabricated in a 180 nm CMOS process with six-metal layers and a chip size of 1.820 x 1.771 mm² to operate at the supply voltage of 3.3 V. The bias voltages of both driver and split main stages are varied from 0 V to 2.0 V with a linear step size of 0.2 V. The proposed SBPA delivers a saturated output power (P_out) of 27 dBm with maximum power-added efficiency (PAE) of 44.4 % and peak OIP3 of 39 dBm. A maximum linear P_out of 21 dBm with 29 % PAE is achieved at an adjacent channel leakage ratio (ACLR) of -30 dBc and 4 % error vector magnitude (EVM), satisfying the LoRa specifications.

Hybrid Predistorter for Broadband Power Amplifiers Linearization With Relaxed DAC Speed in the Signal Transmit Path

This paper proposes a novel predistorter architecture suitable for hybrid baseband/RF implementation. The distortion function is split into a memory polynomial and an AM/AM only look-up table (LUT). The memory polynomial DPD is to be applied in the baseband digital domain whereas the LUT predistorter is suitable for low complexity implementation in either the baseband digital or the RF analog domains. The proposed model was compared to benchmark models using 20MHz and 40MHz wide 5G test signals, and found to be superior in terms of adjacent channel leakage ratio performance and complexity. Experimental results showed that the model can achieve ACLR levels of better than 50dBC with a relatively low number of coefficients. The proposed model requires around 20% less coefficients than the reverse twin-nonlinear two-box model, and achieves slightly better ACLR while easing the analog implementation of the static nonlinearity predistortion function. Most importantly, the low-complexity hybrid implementation of the proposed model can drastically reduce the speed requirements in the digital to analog converter of the signal transmit path by up to 80% when compared to traditional DPD systems.

On single-tap equalization for an FBMC multicarrier system in wireless channels

This paper deals with single-tap equalization for the recently introduced FBMC-PAM system, a multicarrier scheme able to meet the requirements of cognitive radio such as high level of adjacent channel leakage ratio and asynchronous communications. The optimum single-tap gain in the minimum mean square error (MMSE) sense is derived and its performance is compared with that of previously considered receivers. It is shown that, when the zero-mean output of the standard matched filter is noncircular, the proposed equalizer is superior to the existing single-tap alternative solution and comes close in performance to a more advanced previously considered structure.

Highly non‐linear and wide‐band mmWave active array OTA linearisation using neural network

This paper proposes a neural network (NN)-based over-the-air (OTA) linearisation technique for a highly non-linear and wide-band mmWave active phased array (APA) transmitter and compares it with the conventional memory polynomial model (MPM)-based technique. The proposed NN effectively learns the distinctive non-linear distortions, which may not easily fit to existing MPM solutions, and can, therefore, successfully cope with the challenges introduced by the high non-linearity and wide bandwidth. The proposed technique has been evaluated using a state-of-the-art 4 × 4 APA operating in highly non-linear regions at 28 GHz with a 100-MHz-wide 3GPP base-station signal as input. Experimental results show the pre-distortion signal generated by the NN exhibits the peak-to-average power ratio (PAPR) much lower than the one generated by MPM and consequently superior linearisation performance in terms of adjacent channel leakage ratio (ACLR) and error vector magnitude (EVM) for high non-linearity cases. Using the proposed NN-based linearisation technique, an improvement of 5-dB ACLR and 7% points in EVM are achieved, which demonstrates the promising potential of this technique for emerging broadband communication systems such as 5G/6G and low Earth orbit (LEO) satellite networks.

Dual‐mode linearity enhanced power amplifier with wideband AM‐PM compensation for 5–6‐GHz FeLAA applications

This letter presents a 5–6-GHz dual-mode power amplifier (PA) realized for further enhanced licensed assisted access application of downlink transmission. The output matching network with multiple harmonic traps and the wideband AM-PM compensation technique are used in the design. To achieve high linear output power with less variation in the wide frequency range, different bias voltages of the first stage PA are set for dual-mode operation. In the range 5–6 GHz, the PA delivers > 30 dBm saturated output power and reaches 24.4–24.8 dBm linear power at −35 dBc adjacent channel leakage ratio.

A 12-b 16-GS/s RF-Sampling Capacitive DAC for Multi-Band Soft Radio Base-Station Applications With On-Chip Transmission-Line Matching Network in 16-nm FinFET

A 16-GS/s single 1.2-V supply direct RF-sampling capacitive D/A converter for soft radio base-station applications is implemented in a 16-nm FinFET technology. Due to co-integration with a wideband on-chip matching network, the D/A converter (DAC) is capable of signal synthesis between 600 MHz and 8 GHz, with a measured peak RF output power of &#x002B;5.6 dBm. The linearity required by cellular base-station applications is achieved by employing several analog-domain linearization techniques, yielding a two-tone intermodulation distortion of better than &#x2212;70 dBc up to the first Nyquist frequency. When transmitting a true multiband signal covering an instantaneous bandwidth of 1 GHz, an adjacent channel leakage ratio (ACLR) of better than &#x2212;69 dBc is achieved. Digital segment mismatch correction is shown to improve the linearity of a segmented DAC in deep digital backoff operation. A full-rate digital pre-distortion (DPD) method with efficient model identification is experimentally demonstrated. Using DPD, the design achieves an spurious free dynamic range (SFDR) of better than 72 dBc over the entire 0.6&#x2013;6-GHz frequency range.