4H-SiC Epitaxial Layers Research Articles

Quantitative Analysis of Piezoresistive Characteristic Based on a P-type 4H-SiC Epitaxial Layer.

In this work, the piezoresistive properties of heavily doped p-type 4H-SiC at room temperature were investigated innovatively. It was verified by a field emission scanning electron microscope (FESEM), X-ray diffraction (XRD), and laser Raman spectroscopy (LRS) that the crystal quality of the epitaxial layer was good. The doping concentration and thickness of the epitaxial layer were measured by secondary ion mass spectrometry (SIMS) to be ~1.12 × 1019 cm−3 and ~1.1 µm, respectively. The 4H-SiC cantilever beam along crystal orientation was fabricated, and the fixed end of the cantilever beam was integrated with longitudinal and transverse p-type 4H-SiC piezoresistors. A good ohmic contact was formed between Ni/Ti/Al/Au and a p-type 4H-SiC piezoresistor under nitrogen environment annealing at 1050 °C for 5 min. The free end of the cantilever beam was forced to cause strain on the p-type 4H-SiC piezoresistor, and then the resistances were measured by a high precision multimeter. The experimental results illustrated that longitudinal and transverse gauge factors (GFs) of the p-type 4H-SiC piezoresistors were 26.7 and −21.5, respectively, within the strain range of 0–336µε. In order to further verify the electro-mechanical coupling effect of p-type 4H-SiC, the piezoresistors on the beam were connected to the Wheatstone full-bridge circuit and the output changes were observed under cyclic loading of 0–0.5 N. The measuring results revealed that the transducer based on the 4H-SiC piezoresistive effect exhibited good linearity and hysteresis, which confirmed that p-type 4H-SiC has the potential for pressure or acceleration sensing applications.

Stress Characterization of the Interface Between Thermal Oxide and the 4H-SiC Epitaxial Layer Using Near-Field Optical Raman Microscopy.

Stresses induced in the silicon carbide (SiC) epitaxial layer near the interface between thermal silicon oxide and 4H-SiC epitaxial substrate were measured using a near-field optical Raman microscope equipped with a hollow pyramid probe (aperture size: approximately 250 nm). The E2 phonon was observed to undergo a 0.17 cm-1 redshift owing to reduction in oxide-layer thickness from 300 nm to 0 nm; this result was compared against that obtained using a standard Raman microprobe sans the pyramidal probe. The result indicates that the epitaxial layer near the SiO2-4H-SiC interface was maintained under a constant tensile stress of the order of 50 MPa. This agrees well with the result obtained using the finite element method (FEM). Based on results obtained using the said Raman microprobe and Fourier transform infrared (FT-IR) measurements, use of an inhomogeneity formation model at the SiO2-4H-SiC interface has been proposed in this study.

Optical Discrimination of TSDs and TEDs in 4H-SiC Substrates and Epitaxial Layers by Phase Contrast Microscopy Method

Phase contrast microscopy (PCM) technique was demonstrated as the effective non-destructive discrimination method of TSDs and TEDs in 4H-SiC epitaxial layers in comparison with conventional polarized light microscopy, PL topography, KOH etch pit inspection and X-ray topography. The appearance of TSDs and TEDs by the PCM method is subtly modified by not only the consisting burgers vector but also the crystalline quality of the epitaxial layer or the substrate as the background. To extract more detailed information on the dislocations, the PCM inspection requires further investigation.

Surface Characterization of Ion Implanted 4H-SiC Epitaxial Layers with Ion Energy and Concentration Variations

In this study, Al and N implantation effect on surface properties of 4H-SiC epitaxial layers were investigated before annealing process. AFM results indicated that all implanted samples indicated relatively low RMS roughness values. From UPS and XPS analysis, work function and Si-C binding energy of implanted samples were increased compared to the reference 4H-SiC sample. Those variations may be caused by lattice disorder and amorphization. In addition, TEM image showed damaged area in 4H-SiC epitaxial layer.

Surface Morphology of 4H-SiC after Thermal Oxidation

Step-controlled growth of 4H-SiC epitaxial layers leads to the formation of a step-bunched morphology along the surface with larger macrosteps, composed of smaller microsteps of several Si-C bilayer heights. As thermal oxidation is an orientation-dependent process, a multi-faceted surface is expected to exhibit a different oxidation behavior compared to a perfectly planar surface. In this work, step-bunched surfaces after oxidation are investigated by high-resolution atomic force microscopy (HR-AFM) and transmission electron microscopy (TEM) indicating a morphological change in the early stages of thermal oxidation. An orientation-dependent oxidation model is used to correctly describe variations of the oxide thicknesses at isolated macrosteps.

High Quality 4H-SiC Epitaxial Layer by Tuning CVD Process

In this work many steps concerning the epitaxial layer growth on 4H-SiC are studied, evaluated and optimized to obtain high quality 4H-SiC epitaxy. The processes evaluated have been studied on a Hot Wall CVD reactor. The first step related to the substrate surface etching has been tuned by choosing the H2 flow, temperature and process time at which most of defects (mainly stacking faults) are not propagated. Then, the buffer layer step has been optimized by increasing the thickness at which an effective reduction of defect density and an improved electrical performance of power devices have been detected. Also, during the buffer layer growth a strong dependence between basal plane dislocations propagation and the growth rate has been observed. A crucial step carefully studied has been the drift layer growth. It was optimized by increasing the growth rate (13<GR<15µm/h) that results in a lower defectiveness, good thickness and doping uniformity. Final stage concerning the cooling of the process has been strongly revisited. A significant decreasing of the morphological defects (carrots, pits) and stacking faults has been observed by slowing the cool down process (~ 25 °C/min).

Extensive 99% Killer Defect Free 4H-SiC Epitaxial Layer toward High Current Large Chip Devices

Epitaxial growth of 4H-SiC on 150 mm wafers using 3 x 150 mm multi-wafer CVD has been investigated to realize extremely low defect density on the epitaxial layer in order to achieve stable fabrication of high current devices with large die size. By optimizing the epitaxial growth conditions as well as the improved procedures for the inside the furnace to remain cleaned stably for cumulative growth processes, we have demonstrated an extensive 99% defect free epitaxial inlayer in a 5 mm x 5 mm block evaluation which is having excellent doping and thickness uniformity simultaneously.

Thermal Annealing of High Dose P Implantation in 4H-SiC

In this work, we have studied the crystal defectiveness and doping activation subsequent to ion implantation and post-annealing by using various techniques including photoluminescence (PL), Raman spectroscopy and transmission electron microscopy (TEM). The aim of this work was to test the effectiveness of double step annealing to reduce the density of point defects generated during the annealing of a P implanted 4H-SiC epitaxial layer. The outcome of this work evidences that neither the first 1 hour isochronal annealing at 1650 - 1700 - 1750 °C, nor the second one at 1500 °C for times between 4 hour and 14 hour were able to recover a satisfactory crystallinity of the sample and achieve dopant activations exceeding 1%.

Effect of parasitic polytypes on ballistic electron transport in chemical vapor deposition grown 6H-SiC epitaxial layers

Effect of parasitic polytypes on ballistic electron transport in chemical vapor deposition grown 6H-SiC epitaxial layers

Proton Irradiation of 4H-SiC Photodetectors with Schottky Barriers

For the first time, comprehensive comparative investigations of ultraviolet photodetectors with Cr Schottky barriers formed on 4H-SiC epitaxial layers are carried out by the X-ray and optical methods before and after irradiation with 15-MeV protons with fluences in the range of (1–4) × 1012 cm–2. When increasing the fluence of proton irradiation, the formation of localized regions with negative deformation is observed along with the unperturbed silicon-carbide matrix. Agreement between the X-ray and optical studies is obtained, which makes it possible to explain the features of the spectral changes in the photosensitivity of detectors in the range of 200–400 nm with an increase in the fluence of proton irradiation. The ultraviolet Cr/4H-SiC photodetectors withstand irradiation by 15-MeV protons with a fluence of 4 × 1012 cm–2 virtually without any changes in the photosensitivity due to the gettering of simple defects by cluster and amorphous formations, which lead to partial structural improvement of the irradiated material.

Homoepitaxial Growth on Si-Face (0001) On-Axis 4H-SiC Substrates

Homoepitaxial growths of 4H-SiC were performed on Si-face (0001) on-axis substrates in a SiH4-C2H4-H2-HCl system by using our home-made vertical hot wall CVD reactor. The influence mechanism of the growth temperature and C/Si ratio on the morphology and growth rate was studied. It is found that the steps in the epilayer become more clear with the increasing temperatures. The result indicates that the C/Si ratio window of on-axis epitaxial growth is very narrow. Only when the C/Si ratio was 1.2, a slightly improved surface morphology can be achieved. The results indicate that 4H-SiC epitaxial layers were obtained on on-axis substrates and the films were highly-oriented 4H-SiC.

Characteristics of graphene/4H-SiC/graphene photodetector based on hydrogenated multilayer-graphene electrode

By utilizing a Joule heating decomposition method, hydrogenated multilayer graphene (MLG) has been grown on the surface of a semi-insulation 4H-SiC epitaxial layer. The Raman spectra have indicated that the sublimation speed of Si atoms, which corresponds positively to the Joule heat, had great influence on the hydrogenation degree and the layer number of the MLG. Then, a graphene/4H-SiC/graphene photodetector was fabricated and studied, showing hydrogenation-dependent dark current and photocurrent, depicting the influence of hydrogenation degree and the layer number on the Schottky barrier high (varying from 0.59 to 0.99 eV). Moreover, the sheet resistance of MLG and the specific contact resistance of graphene/Cr/Au came out to be ∼3.2 kΩ / sq and 7.5 × 10 − 3 Ω · cm2.

Expansion and contraction of single Shockley stacking faults in SiC epitaxial layer under ultraviolet irradiation

Behaviors such as expansion and contraction of single Shockley stacking faults (1SSFs) in a 4H-SiC epitaxial layer under various ultraviolet (UV) irradiation conditions were systematically investigated. We demonstrate that the area of the 1SSF has a key role in its behavior during UV light exposure. Contraction immediately progresses after a relatively weak UV irradiation at a high-temperature. The contraction velocity gradually decreases and eventually becomes zero at a certain area, which is dependent on the UV irradiation.

Reducing warpage of thick 4H-SiC epitaxial layers by grinding the back of the substrate

We grew 3 inch thick 4H-SiC epitaxial layers on the substrate Si-face, and attempted warpage reduction. The substrates were coved by grinding their C-face before the epitaxial growth to cancel out the increase in convex warpage due to the epitaxial growth. We found that the amount of convex warpage change was approximately 26 μm, when the thickness of the epitaxial layer was 200 μm. To reduce warpage, we prepared the substrate with concave warpage of about 27 μm by grinding the C-face, whose roughness was 60 nm. Then, we grew an epitaxial layer of 200 μm thickness on this and we succeeded in reducing the warpage to 5 μm. We concluded that the warpage of thick epitaxial layers on the substrates can be reduced by controlling the roughness of the ground back side, in accordance with the estimated amount of warpage change from the objective thickness of the epitaxial layers.

Correlation between Stacking Faults in Epitaxial Layers of 4H-SiC and Defects in 4H-SiC Substrate

Correlation between Stacking Faults in Epitaxial Layers of 4H-SiC and Defects in 4H-SiC Substrate

Calculation of 4H-SiC Schottky Diode with Breakdown Voltage Up to 3 KV

The current-voltage characteristic of the 4H-SiC Schottky diode for forward and reverse current direction was calculated and simulated on the base of the theory of thermionic emission and a physical analytical model based on the Poisson equation, the diffusive and continuity equations. It is shown that as follows from the theoretical calculations and calculations carried out in ATLAS that breakdown voltage of Schottky diode more than 2 kV is provided at a thickness of 4H-SiC of epitaxial layer from 18 mm. It is established that thickness of epitaxial layer from 20 mm will provide breakdown voltage of Schottky diode more than 2 kV. In addition the current-vltage characteristic for perspective Schottky diode (with breakdown voltage ~3 kV) with thickness of 4H-SiC epitaxial layer of 20 mm, p+ ring of 30 microns wide and five rings of 5 mm wide with a gap width of 2.5 mm, JTE layer of 80 mm wide. It is shown that the diode with the above specified structure can stand breakdown voltage up to ~3 kVÂ

Ti/4H-SiC Schottky diode breakdown voltage with different thickness of 4H-SiC epitaxial layer

Breakdown voltage for Ti/4H-SiC type Schottky diode with six guard rings have been calculated theoretically and by mean of numerical simulations. It is shown that the breakdown voltage can be increase at the minimum on 100 V in case when thickness of the n-type 4H-SiC epitaxial layer increase from 18 up to 22 μm. It is established that the breakdown voltage value for Ti/4H-SiC type Schottky diode with guard rings calculated by mean simulation in ATLAS program and theoretically have good approximation. Thus, above approach gives the possibility for projection of diode structure with different 4H-SiC epitaxial layer thickness with higher breakdown voltage value.

Reduction of morphological defects in 4H-SiC epitaxial layers

Correlation between morphological defects and device yield in the 4H-SiC epitaxial layers were investigated with overlapped morphological defect mapping and device yield mapping figures. The results show the harmful level of various morphological defects for device yield should be triangular > downfall > carrot > particle. Origins of the triangular defects were traced by a multiple cycle of polishing and molten KOH etching process, revealing that the triangular defects are mainly formed at initially epitaxial stage and caused by threading screw dislocations (TSDs) in substrates or spontaneous nucleation. Etching temperature and time of the hydrogen surface etching process and C/Si ratio in buffer layer growth process were also systematically optimized. The density of triangular defects can be reduced to 0.1 cm−2. Meanwhile, an additional buffer layer with a step-bunching surface was applied and can effectively restrain the extending of triangular defect along 〈1 −1 0 0〉 direction.

X-ray topographical analysis of 4H-SiC epitaxial layers using a forward-transmitted beam under a multiple-beam diffraction condition

Multiple-beam diffraction X-ray topography was used to determine the Burgers vector b of threading edge dislocations (TEDs) and basal plane dislocations (BPDs) in 4H-SiC epitaxial layers. In hexagonal crystals, the technique simultaneously yields five different diffractions corresponding to different diffraction vectors g. Hence, this method enables us to determine the components of b using the g · b = 0 rule without widely changing the diffraction geometry. The b vectors of TEDs and BPDs were successfully determined by the method. These results were then confirmed by ordinary grazing-incidence X-ray topography in order to verify the validity of this technique.

(Invited) Controlling the Carbon Vacancy in 4H-SiC by Thermal Processing

The carbon vacancy (VC) is perhaps the most prominent point defect in silicon carbide (SiC) and it is an efficient charge carrier lifetime killer in high-purity epitaxial layers of 4H-SiC. The VC concentration needs to be controlled and minimized for optimum materials and device performance, and an approach based on post-growth thermal processing under C-rich ambient conditions is presented. It utilizes thermodynamic equilibration and after heat treatment at 1500 °C for 1 h, the VC concentration is shown to be reduced by a factor ~25 relative to that in as-grown state-of-the-art epi-layers. Concurrently, a considerable enhancement of the carrier lifetime occurs throughout the whole of >40 µm thick epi-layers.