4H-SiC VJFET Research Articles

Cross-Section Doping Topography of 4H-SiC VJFETs by Various Techniques

Different methods for cross-section characterization of SiC Trenched-singly-implanted vertical junction field effect transistors (TSI-VJFETs) are presented with the purpose to determine the epitaxial structure in terms of doping topography.

Salicide-Like Process for the Formation of Gate and Source Contacts in 4H-SiC TSI-VJFETs

The self-aligned approach allowed to fabricate 4H-SiC VJFETs with conventional contact lithography with only 4 lithography steps. The main problem of this approach was the gate-source leakage current. In order to address this issue, a salicide process has been adopted resulting in a substantial reduction of the gate-source leakage current. The success of this approach paved the way for fabricating high power 4H-SiC devices with extremely low fabrication cost.

Modelling of 4H-SiC VJFETs with Self-Aligned Contacts

Purely vertical 4H-SiC JFETs have been modeled by using three different approaches: the analytical model, the finite element model and the compact model. The results of the modeling have been compared with experimental results on a series of fabricated self-aligned devices with two different channel lengths (0.3 and 1.1μm) and various channel widths (1.5, 2, 2.5, 3, 4 and 5 μm). For all the considered models I-V and C-V characteristics could be satisfactorily simulated.

4H-SiC VJFETs with Self-Aligned Contacts

Trenched-implanted-gate 4H–SiC vertical-channel JFET (TI-VJFET) have been fabricated with self-aligned nickel silicide source and gate contacts using a process sequence that greatly reduces process complexity as it includes only four lithography steps. The effect of the channel geometry on the electrical characteristics has been studied by varying its length (0.3 and 1.2μm) and its width (1.5-5μm). The transistors exhibited high current handling capabilities (Direct Current density 330A/cm2). The output current reduces with the increase of the measurements temperature due to the decrease of the electron mobility value. The voltage breakdown exhibits a triode shape, which is typical for a static-induction transistor operation.

Bulk Thickness and Short Circuit Capacity of a 1200V 4H-SiC VJFET

In many power electronic inverters, the gate drive failure may put the switch normally-on in short-circuit (SC) risk. The high power density generated thus leads rapidly to the transistor failure. This paper presents our study via electro-thermal simulation of a 1200 V JFET under short circuit. It provides deep insight of physical phenomena present in the JFET during the short-circuit and will allow further improvements and understanding of it.

Study of Theoretical Investigation of Bipolar Effect in 4H-SiC VJFET

In the present work, forward characteristics of normally-off 4H-SiC VJFET are simulated using commercial Sentaurus TCAD simulator. In the forward characteristics, the effect of channel concentration is analyzed to investigate the normally-off behavior and the device exhibits positive threshold voltage. At VGS = 3V, due to injection of significant holes in the channel, a large drain current is observed which shows bipolar mode in the device. In addition, it is also observed that at low doping concentration i.e. 1×1015 cm-3 the increase in IDS is 79% as VGS increase from 2.9 to 3.0V. But this increase in IDS reduces with increase in channel doping and it becomes 56% at channel doping of 9×1015 cm-3. The influence of bipolar effect on current gain and specific on resistance is also discussed in this paper.

High Breakdown Voltage Characteristics in Normally-off 4H-SiC VJFET Using TCAD Simulation

The high temperature dependent breakdown voltages in normally-off 4H-SiC VJFET are simulated using Sentaurus TCAD at different temperatures ranging from 27 to 500˚C. Temperature dependent breakdown voltages simulations reveal the decrement in breakdown voltages with increasing temperature, and device exhibits negative temperature coefficient. In addition, breakdown voltages are straight forwardly linked with associated parameters like impact ionization, which is strongly dependant on electric field. The improved breakdown voltage of 14kV (drain leakage current 10-8 A) indicates relatively high electric field of 2.2 MV/cm. In addition, its high breakdown capability and low leakage current with adjustable channel width make 4H-SiC VJFET a desirable device for high voltage power applications.

Theoretical Investigation of Breakdown Voltage in Normally-on 4H-SiC VJFET

Theoretical Investigation of Breakdown Voltage in Normally-on 4H-SiC VJFET

Modeling of the Impact of Parameter Spread on the Switching Performance of Parallel-Connected SiC VJFETs

Operation of parallel-connected 4H-SiC VJFETs from SemiSouth was measured and modeled using numerical simulations. The unbalanced current waveforms in parallel-connected VJFETs were related to spread in the critical parameters of the device structure and to the influence of the parasitic inductances in the measurement circuit. The physical device structure was reconstructed based on SEM analysis, electrical characterization, and device simulations. The two hypothetical critical design parameters that were studied with respect to spread were the p-gate doping profile (Case 1) and the emitter doping (Case 2). Variation in both parameters could be related to variation in the emitter breakdown voltage, the on-state characteristics, and the threshold voltage of the experimental devices. The switching performance of the parallel-connected JFETs was measured using a single gate driver in a double pulse test and compared with simulations. In both investigated cases a very good agreement between measurements and simulations was obtained. The modeling of the transient performance relies on good reproduction of transfer characteristics and circuit parasitics.

4H-SiC VJFET Based Normally-off Cascode Switches for 300°C Electronic Applications

4H-SiC VJFET Based Normally-off Cascode Switches for 300°C Electronic Applications

Design of 1.7 to 14 kV Normally-Off Trenched and Implanted Vertical JFET in 4H-SiC

In this paper, a high voltage normally-off trenched-and-implanted vertical JFET (TIVJFET) in 4H-SiC is investigated by way of two-dimensional numerical simulations. The structure is simple to fabricate and is expected to be able to achieve a high current density. Detailed designs are presented for 1.7kV to 14kV normally-off 4H-SiC VJFETs. A good agreement has been reached between computer modeling and experimental 1.7kV normally-off TI-VJFET in 4H-SiC. The fabricated 1.7kV device shows a VB 2 /Ron,sp value of 827MW/cm 2 at room temperature, which represents a substantial performance improvement to the state-of-the-art.

1,530V, 17.5mΩcm<sup>2</sup> Normally-Off 4H-SiC VJFET Design, Fabrication and Characterization

This paper reports the design, fabrication and characterization of a double-gated, normally-off 4H-SiC VJFETs with implanted vertical channel, which eliminates the need of epitaxial re-growth in the middle of the device fabrication. A normally-off VJFET, which is based on a 15 μm n-type drift layer doped to n=5.7x10 15 cm -3 , is demonstrated with a blocking voltage (V B) of 1,530V with a leakage current of 15mA. The specific on-resistance (R SP_ON ) is found to be 17.5 mΩcm 2 at J D=100A/cm 2 and V G=3.5V. The VJFET conducts a drain current of 1.13A (227A/cm 2 ) at V G=3.5V and V D=5V with a corresponding gate current of 16mA, resulting in an I D/I G ratio of 70. VJFETs with different lateral JFET channel opening dimensions have been designed and fabricated. Detailed design, fabrication and characterization results of the VJFETs are reported, including the DC I-V relations, the effects of LJFET channel opening dimensions, the specific on-resistance, and the temperature-dependent performance.