Abstract

In many power electronic inverters, the gate drive failure may put the switch normally-on in short-circuit (SC) risk. The high power density generated thus leads rapidly to the transistor failure. This paper presents our study via electro-thermal simulation of a 1200 V JFET under short circuit. It provides deep insight of physical phenomena present in the JFET during the short-circuit and will allow further improvements and understanding of it.

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