Abstract

Trenched-implanted-gate 4H–SiC vertical-channel JFET (TI-VJFET) have been fabricated with self-aligned nickel silicide source and gate contacts using a process sequence that greatly reduces process complexity as it includes only four lithography steps. The effect of the channel geometry on the electrical characteristics has been studied by varying its length (0.3 and 1.2μm) and its width (1.5-5μm). The transistors exhibited high current handling capabilities (Direct Current density 330A/cm2). The output current reduces with the increase of the measurements temperature due to the decrease of the electron mobility value. The voltage breakdown exhibits a triode shape, which is typical for a static-induction transistor operation.

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