4H-SiC Power Devices Research Articles

Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation

Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation

Detailed Analysis on Determining Effective Dose for Various JTE-Based Edge Terminations Utilized on 4H-SiC Power Devices

The article discusses the impact of thermal oxidation process conditions on the implanted junction-termination-extension (JTE) dose using various edge termination structures for 1700 V rated 4H-silicon carbide (4H-SiC) power devices. During the formation of gate oxide (Gox) via thermal oxidation, the surface of the SiC area is also consumed, resulting in a silicon dioxide layer. The surface consumption from the Gox process can significantly alter the blocking capabilities of the JTE-based edge termination structures due to a change in the ``effective'' dose. In addition, the fixed oxide charge and activation ratio can also fluctuate the charge in the JTE region. Therefore, all these factors should be considered when designing JTE-based edge terminations for 4H-SiC devices. Investigation of various edge termination structures such as single zone JTE (SZ-JTE), ring-assisted JTE (RA-JTE), multiple floating zone JTE (MFZ-JTE), Hybrid-JTE, and floating field rings (FFRs) allowed the identification of determining process steps. Detailed analysis of the effective JTE dose is reported by examining experimental and simulation results.

Simulation of gradient floating field limiting rings for 4H-SiC power devices

In order to have higher breakdown voltage (BV) for 4H-SiC power devices, a novel edge termination structure with gradient floating field limiting rings (FFLR) is proposed. The device blocking performance between conventional FFLR and proposed structures are compared by 2-D numerical device simulation. The BV can be increased by 10% and 20% of parallel plane breakdown voltage with the same P-well and epitaxial parameters when step is 0.2μm and 0.4μm.

Structural and Electrical Characterization of Ni-Based Ohmic Contacts on 4H-SiC Formed by Solid-State Laser Annealing

Laser annealing process for ohmic contact formation on 4H-SiC has attracted increasing attention in the last years, because it enables the fabrication of SiC power devices on very thin substrates. We have investigated the formation of Nickel-based ohmic contact on 4H-SiC by using a Yb:YAG laser in scanning mode, with a wavelength of 515 nm and a pulse duration of 1200 ns. A 100 nm thick Ni layer has been deposited on SiC and irradiated at different process conditions. The reaction process has been studied, as a function of fluence and scan number of laser annealing, by means of X-Ray Diffraction (XRD) and Transmission Electron Microscopy (TEM) analyses. The electrical properties of the annealed layers have been evaluated on Schottky Barrier Diodes (SBDs) devices, confirming the ohmic behavior of the reacted contact and showing improved performances respect to RTA approach. The compatibility of thermal budget of the process in the front side has been verified by means process simulation. A strong relationship between structural properties of reacted layers and electrical behavior of SBDs devices has been revealed. Solid-state laser annealing process, with wavelength in green light region, can indeed represent a suitable solution for ohmic contact formation of 4H-SiC power devices, fabricated on thin substrates.

Edge Terminations for 4H-SiC Power Devices: A Critical Issue

Edge termination is a critical part of a power devices. Numerous edge termination types have been developed for silicon devices. Implementation of these termination architectures are not straightforward in SiC due to physical and processing specificities: lower junction depths, higher electric field, trench depth and shaping limitations, etc. Two main families of terminations are currently used in commercial devices, pure Field Guard Rings, and JTE + Rings combination. The increasing number of trench commercial devices requires new approaches based on etched rings filled with dielectrics or polysilicon. For epitaxied bipolar devices, MESA with bevel angle termination combined with JTE based architecture are also suitable. In any case, and especially regarding avalanche capability requirements, not only the termination architecture is relevant, but also the passivation type, the channel stopper design, the 3D design. As modelling using conventional tools is not fully reliable, specific complementary characterization methods are needed. For instance, micro-OBIC can be very effective to determine the electric field distribution in the periphery of the power devices.

Compensation of p-type doping in Al-doped 4H-SiC

One of the major challenges of 4H-silicon carbide (4H-SiC) is that the preparation of low resistivity p-type 4H-SiC single crystals lags seriously behind that of low resistivity n-type 4H-SiC single crystals, hindering the development of important 4H-SiC power devices such as n-channel insulated gate bipolar transistors. In particular, the resistivity of p-type 4H-SiC single crystals prepared through the physical vapor transport technique can only be lowered to around 100 mΩ cm. One of the key causes is the incomplete ionization of the p-type dopant Al with an ionization energy ∼0.23 eV. Another factor is the compensating effect. It cannot simply assume nitrogen (N) is the sole compensatory center, since the number of the compensating center is larger than the concentration of N doping. In this work, we systematically investigate the compensation of native defects and self-compensation in Al-doped 4H-SiC. It is found that the positively charged carbon vacancies (VC2+) are also the dominant compensating centers in Al-doped 4H-SiC. When the Al concentration is in the range of 1016–1019 cm−3, the concentration of holes is lower by one order of magnitude than the Al concentration because of the compensation of VC2+. As the Al concentration exceeds 1020 cm−3, the concentration of holes is only in the order of magnitude of 1019 cm−3 owing to the dominant compensation of VC2+ and supplementary self-compensation of interstitial Al (Ali3+). We propose that the passivation of VC2+ as well as quenching is effective to enhance the hole concentration of Al-doped 4H-SiC.

Experiment and analysis of repetitive avalanche low-current stress on 4H-SiC power devices

As a kind of 4H-SiC power device, the junction barrier Schottky (JBS) rectifiers, only containing the transition p + implantation region at the edge of the active region in the termination region, are adopted and fabricated to analyze the effect of the repetitive avalanche low-current stress on the SiO2/4H-SiC interfacial state of the devices. The breakdown voltage (BV) of the device shifts after the repetitive avalanche current stress, which results from the electron injects into the SiO2/4H-SiC interface and trapped by the interface states. Meanwhile, there is a tradeoff between the quantities of the trapped and de-trapped electrons by the SiO2/4H-SiC interface states when the BV reaches its saturated value. The junction temperature, total amount of carriers generated in the single avalanche event and repetitive total avalanche energy, affected by the pulse period (T), pulse number and turn-on period (D), are the key factors that affect the level of the BV shift.

Modeling of Bipolar Degradations in 4H-SiC Power MOSFET Devices by a 3C-SiC Inclusive Layer Consideration in the Drift Region

The reliability of 4H-SiC power devices account not only to power packages but as well to SiC materials which contain defects that impact the performance of power converters. A detrimental material defect that is still hindering the development of high power MOSFET devices is the so-called bipolar degradation. It is mainly due to Shockley stacking sequence faults (SFs) within the hexagonal SiC structure lattice creating 3C-SiC- regions embedded within the main 4H-SiC structure. In this paper, we have modelled the bipolar degradation of a power MOSFET device rated at 1.7kV by considering the drift layer formed by a 4H-3C-4H heterojunction. In term of electrical parameters, the bipolar degradation which manifests itself as the increase of the forward voltage of the device, TCAD simulation results showed an increase of 0.7 V and 1 V of the forward voltage at a current level of -3A and 4A for the body diode and the MOSFET operating in the first quadrant respectively. These were of the same order of magnitude as experimental results obtained on degraded power MOSFET devices. Additionally, we have presented a novel method to ascertain the presence of SFs within the power device by measuring the electroluminescence of the body diode.

Conversion of Shockley partial dislocation pairs from unexpandable to expandable combinations after epitaxial growth of 4H-SiC

Conversion of Shockley partial dislocation pairs from unexpandable to expandable combinations has been considered possible during epitaxial growth. The step-flow model was proposed to explain the conversion, in which an unexpandable 30° C-core partial dislocation in the substrate changes into an expandable 30° Si-core partial dislocation in the epitaxial grown layer. We observed this conversion experimentally by a transmission electron microscope and confirmed the core-species change by high-angle annular dark-field scanning transmission electron microscopy. In addition, other unexpandable combinations of partial dislocations were examined for the possibility of converting to expandable. As a result, the unexpandable basal plane dislocations with a Burgers vector of ±(1/3)[112¯0] in the substrate were confirmed to be a necessary condition for forming expandable 30° Si-core partial dislocations after epitaxial growth that could expand single Shockley-type stacking faults and degrade reliability of 4H-SiC power devices.

Investigation of 3.3 kV 4H-SiC DC-FSJ MOSFET Structures.

This research proposes a novel 4H-SiC power device structure—different concentration floating superjunction MOSFET (DC-FSJ MOSFET). Through simulation via Synopsys Technology Computer Aided Design (TCAD) software, compared with the structural and static characteristics of the traditional vertical MOSFET, DC-FSJ MOSFET has a higher breakdown voltage (BV) and lower forward specific on-resistance (Ron,sp). The DC-FSJ MOSFET is formed by multiple epitaxial technology to create a floating P-type structure in the epitaxial layer. Then, a current spreading layer (CSL) is added to reduce the Ron,sp. The floating P-type structure depth, epitaxial layer concentration and thickness are optimized in this research. This structure can not only achieve a breakdown voltage over 3300 V, but also reduce Ron,sp. Under the same conditions, the Baliga Figure of Merit (BFOM) of DC-FSJ MOSFET increases by 27% compared with the traditional vertical MOSFET. Ron,sp is 25% less than that of the traditional vertical MOSFET.

Ion-Induced Mesoplasma Formation and Thermal Destruction in 4H-SiC Power MOSFET Devices

Both experiments and simulations have shown that single-event burnout (SEB), a catastrophic event, occurs at less than half of the rated blocking voltage in commercial 4H-SiC power devices under a heavy-ion strike. The failure was shown to be due to significant impact ionization near the epi/substrate interface. Adding a buffer layer between the drift epi and substrate layers reduces the impact ionization effect and changes the thermal failure location. In this article, the SEB phenomenon in a 4H-SiC power MOSFET utilizing a buffer layer is investigated. Heavy-ion transport and 3-D electro-thermal transient simulations were performed to study the device response to a heavy-ion strike. In examining the time evolution of electric field profile, charge carrier dynamics, and thermal heat transfer, it is determined that the failure mode for this design is the location shift of the mesoplasma (or hot spot) to within the drift epi region, away from the high field area. A sensitivity analysis was conducted to identify the dominant electrical or thermal factors contributing to device failure due to second breakdown. From these simulations, it is found that the semiconductor thermal conductivity is the primary material parameter that influences the mesoplasma formation.

Analysis on the Shapes of the Shockley type Stacking Faults Generated by the REDG Effect in the 4H-SiC Power Devices

Analysis on the Shapes of the Shockley type Stacking Faults Generated by the REDG Effect in the 4H-SiC Power Devices

The Ohmic Contact of 4H-SiC Power Devices by Pulse Laser Annealing and Rapid Thermal Annealing

The preparation of ohmic contact with high stability and low resistance is critical, and the quality of ohmic contact will directly affect the performance of devices as the efficiency, gain and switching speed. In this work, the I-V characteristic of the 4H-SiC devices under rapid thermal annealing and pulsed laser annealing were compared, the pulsed laser annealing process could obtain the lower ohmic contact resistant. The surface morphology, material composition, and elemental analysis were clarified by optical microscopy (OM), X-ray diffraction (XRD) and Energy Dispersive Spectroscopy (EDS), respectively. This research suggests that more Ni2Si and carbon vacancy can form at the interface under pulsed laser annealing.

Modeling the effect of mechanical stress on bipolar degradation in 4H-SiC power devices

Bipolar degradation, which is caused by the expansion of stacking faults (SFs) during operation, has been a serious issue in 4H-SiC power devices. To evaluate the threshold minority carrier density of SF expansion, ρth, Maeda et al. proposed a theoretical model based on quantum well action and dislocation theory. This model includes SF energy variations, electronic energy lowering due to carrier trapping, and resolved shear stress applied to partial dislocations, τrss. Though the SF energy and the electric energy lowering were quantitatively established, the effect of τrss has not been discussed well yet. In this study, we first conducted theoretical predictions of the effect of τrssonρth. Then, based on our previous experiment on the dependence of threshold current density on mechanical external stress, we investigated the dependence of ρthonτrss. We conducted submodeling finite element analysis to obtain τrss induced by both residual stress due to the fabrication process and experimentally applied external stress. Finally, we obtained ρth at the origin of SF expansion from the experimentally measured threshold current density using device simulation. It was found that the dependence of ρthonτrss was almost linear. Its gradient was −0.04 ± 0.01 × 1016 cm−3/MPa, which well agrees with the theoretical prediction of −0.03 ± 0.02 × 1016 cm−3/MPa. Our study makes possible a comprehensive evaluation of the critical condition of bipolar degradation.

High-Concentration, Low-Temperature, and Low-Cost Excimer Laser Doping for 4H-SiC Power Device Fabrication

We developed a novel KrF excimer laser doping system for 4H-SiC power devices, and demonstrated laser doping of 4H-SiC with Al thin film deposited on the surface. As seen from the results of the Al depth profile, high concentration implantation (~ 1021 cm-3 at the surface) of Al was achieved by laser ablation of the Al thin film. A high, built-in-potential (~3.5 V) of the pn junction diode was clearly seen in the I-V curve. In addition, the contact resistivity of the deposited Al/Ti electrodes on the surface was 1.9 × 10−4 Ωcm2 by TLM (Transmission Line Model). It was confirmed that a high concentration of Al doping and low contact resistivity were achieved by the KrF excimer laser doping system.

Radiation Effects on 1.7kV Class 4H-SiC Power Devices: Development of Compact Simulation Models

Compact simulation models of two key silicon carbide power components, the Junction Barrier Schottky diode and the power MOSFET, which are taking into account the effect of irradiation by highenergy electrons, were developed. Two 1.7 kV class devices: the 14 A JBS diode C3D10170H and the 5 A SiC power MOSFETs C2M1000170D produced by Wolfspeed were irradiated by 4.5 MeV electrons in the dose range up to 2000 kGy. Electrical characteristics were measured prior to and after irradiation. Radiation defects were studied by deep level transient spectroscopy and the effect of irradiation on device characteristics was established. SPICE models taking into account the irradiation fluence were proposed and calibrated using the parameters extracted from experiment. Simulated characteristics show a very good agreement with reality.

Development of a method to evaluate the stress distribution in 4H-SiC power devices

We detected all components of the deformation potential constants of 4H-SiC by first-principles calculations and developed a method to estimate the stress distribution in 4H-SiC power devices by Finite Element Method (FEM) and Raman spectroscopy. The values of bA1, aE2, and bE2 obtained by calculations agreed well with experimental results, while those of aA1, bE1, and cE2 were about 45% larger. The relationship between phonon frequency and stress was nonlinear as shear stress increased. The multistep FEM analysis reproducing the manufacturing process is also conducted. The stress distribution was converted to the Raman shift and compared with results of micro-Raman spectroscopy. Except for the interface between SiC and the electrode, the analysis results agreed well with the experimental results. It was found that a compressive stress of about 200 MPa at the SiC/electrode interface and a resolved shear stress of about 20 MPa at the epilayer/substrate interface were generated.

Performance and Reliability Impacts of Extended Epitaxial Defects on 4H-SiC Power Devices

This work explores the effects of extended epitaxial defects on 4H-SiC power devices. Advanced defect mapping techniques were used on large quantities of power device wafers, and data was aggregated to correlate device electrical characteristics to defect content. 1200 V class Junction Barrier Schottky (JBS) diodes and MOSFETs were examined in this manner; higher voltage 3.3 kV class devices were examined as well. 3C inclusions and triangular defects, as well as heavily decorated substrate scratches, were found to be device killing defects. Other defects were found to have negligible impacts on device yield, even in the case of extremely high threading dislocation content. Defect impacts on device reliability was explored on MOS-gate structures, as well as long-term device blocking tests on both MOSFETs and JBS diodes. Devices that passed on-wafer electrical parametric tests were found to operate reliably in these tests, regardless of defect content.

PRESiCE<sup>TM</sup>: Process Engineered for Manufacturing SiC Electronic Devices

PowerAmerica sponsored the development by NCSU of a process for manufacturing power MOSFETs and JBS Rectifiers in 2015. This process, named PRESiCETM, was successful in making 1.2 kV rated state-of-the-art 4H-SiC power devices (MOSFETs, BiDFETs, and JBS Rectifiers) in the X-Fab foundry. In addition, we were successful in monolithically integrating a JBS fly-back rectifier into the power MOSFET structure to create the power JBSFET which allows saving significant (~ 40 %) chip area and reducing package count in half. In the second year (2016), NCSU has qualified the process for manufacturing these power devices at X-Fab.

Influence of Triangular Defects on the Electrical Characteristics of 4H-SiC Devices

Using a combination of photoluminescence and electrical characterization, defects in the epitaxial layer of unipolar 4H-SiC power devices were matched to device characteristics and statistically analyzed. In-grown triangles had no significant effect on diode and VDMOS blocking or conduction mode, while surface triangles lead to high leakage currents even below 1 V reverse bias.