3D Interconnects Research Articles

Superconformal Cu Electrodeposition: Seiras and STM Study of the Polyether-SPS-Cl System

State of the art manufacturing of semiconductor devices involves electrodeposition of copper for device wiring and chip stacking. The success of the electroplating process depends on electrolyte additives that affect the local deposition rate to yield void-free superconformal, or bottom–up filling of trenches and vias that comprise 3D interconnects. Quantitative chemical process models have been shown to be effective in describing the filling of high aspect ratio features that range from nanometers to millimeters in scale. Nevertheless, much remains to be known about the molecular nature of the additives and the competitive, co-adsorption dynamics involved in both suppression and acceleration of metal deposition. Accordingly, a variety of surface science tools, such as STM and SEIRAS, are being used to investigate additive function. These studies point to controlling interface hydrophilicity as a key principle in the design and operation of additives used for superconformal film growth.

Effects of Microstructure of Nickel Electrodeposits on the Growth of Tin-Nickel Intermetallic Compound and Joint Reliability

The mechanical breakage and electrical open failure of the flipchip bump interconnection are main issues that retarding the scale shrinkage of the 3D interconnections. In this study, the effects of the microstructure of the nickel electrodeposits on the growth of Sn-Ni intermetallic compound (IMC) and on the electro-migration (EM) reliability were investigatged. The crystal structure of the Ni diffusion barrier can be controlled by addition of additives in electroplating bath. When both coumarin and cis-2-butene-1,4-diol were contained in the bath, extremely fine grain Ni electrodeposits were deposited by the synergistic effects of the additives. The growth rate of Ni3Sn4 IMC formed on the interface between the extremely fine grain structured Ni layer and Sn solder is higher than that of the IMC formed on the interface between the large grain structured Ni layer and Sn solder. The EM failure stage corresponds to large void propagation at the Sn-Ni3Sn4 interface due to volume consumption of Sn for IMC formation. The results of STEM analysis in an early stage of the heat treatment of the solder demonstrated that substantial quantities of Ni atoms were dominantly dissolved into the liquid Sn layer. Ni3Sn4 IMC was mainly formed on the finely grained Ni layer due to the high dissolution of Ni atoms into the solute Sn during the reflow process. IMC growth was suppressed at the interface between the large and fine grain structured area. This study suggests a robust concept of the vertical structure of Ni diffusion barrier having a multi layered Ni microstructure, which can reinforce an adhesion property as well as diffusion barrier properties Figure 1

Exploiting the Spatial Homogeneity of Adlayer Breakdown on Microelectrodes to Develop a Kinetic Model for S-NDR Copper Electrodeposition

Copper electrodeposition is a major component in integrated circuit manufacturing, ranging across lengthscales from nanoscale damascene plating to 100s of microns for thorugh-silicon-vias used in 3D interconnect packaging.1 Critical to this process is electrodeposition of void-free copper structures in high aspect ratio cavities, which is achieved with various additives that enable superconformal bottom-up filling. This physicochemical phenomenon is driven by an S-shaped negative-differential resistance (S-NDR), which promotes spatial bifurcation of the electrode surface into active and passive deposition regions. 2 Electrode bifurcation is dependent on additive adsorption/desorption kinetics, chemical species transport, and electrode geometry. Prior studies have demonstrated that the active/passive bifurcation is dependent on electrode size and that reduced electrode dimensions will permit a homogeneous reaction across the electrode.3 In this work, microelectrodes are used to experimentally probe the critical breakdown behavior in acid copper-sulfate electrolytes in the presence of micromolar concentrations of chloride and a single polymeric additive. In-situ optical microscopy indicates that the entirety of the microelectrode surface (either 12.5 or 25 μm in diameter) is either active or passive during cyclic voltammetry measurements, permitting current to be normalized to the geometric electrode area. Experimental electrolyte parameter sweeps cover chloride concentration, polymer concentration, copper concentration, and polymer adsorption kinetics (i.e. polymer type). These measurements are compared to static macroscopic electrodes and rotating disk electrodes at dimensions known to exhibit active/passive bifurcation. Experimental measurements are fit to finite element method computations using a two-additive model tracking the adsorption and rate-dependent desorption for chloride and polymer species. This work is an extension of previous computational models for describing S-NDR behavior in single additive systems.4-5 Kinetic constants for copper electrodeposition as well as adsorption and desorption dependent rate constants for chloride and polymer are fit to experimental cyclic voltammograms. Electrochemical kinetic constructs using microelectrodes and a 2-additive adsorption/consumption model provide a more accurate representation of critical breakdown phenomenon in S-NDR electrochemical systems. References T.P. Moffat, J.E. Bonevich, W.H. Huber, A. Stanishevsky, D.R. Kelly, G.R. Stafford, and D. Josell, “Superconformal Electrodeposition of Copper in 500-90 nm Features”, J. Electrochem. Soc., 147 (2000) 4524.T.P. Moffat and D. Josell, “Extreme Bottom-Up Superfilling of Through-Silicon-Vias by Damascene Processing: Suppressor Disruption, Positive Feedback and Turing Patterns”, J. Electrochem. Soc., 159 (2012) D208.S. Bozdech, K. Krischer, DA. Crespo-Yapur, E. Savinova, and A. Bonnefont, “1/f2 noise in bistable electrocatalytic reactions on mesoscale electrodes”, Faraday Discuss., 193 (2016) 187.D. Wheeler, T.P. Moffat, and D. Josell, “Spatial-temporal modeling of extreme bottom-up filling of through-silicon vias”, J. Electrochem. Soc., 160 (2013) D3260.D. Josell and T.P. Moffat, “Superconformal bottom-up nickel electrodeposition in high aspect ratio through silicon vias”, J. Electrochem. Soc., 163 (2016) D322.

Additively Manufactured Inkjet-/3D-/4D-Printed Wireless Sensors Modules

This publication considers the use of a variety of additive manufacturing techniques in the development of wireless modules and sensors. The opportunities and advantages of these manufacturing techniques are explored from an application point of view. We discuss first the origami (4D-printed) structures which take advantage of the ability to alter the shape of the inkjet-printed conductive traces on the paper substrate to produce a reconfigurable behavior. Next, focus is shifted towards the use of additive manufacturing technology to develop skin-like flexible electrical system for wireless sensing applications. We then discuss the development of a fully flexible energy autonomous body area network for autonomous sensing applications, the system is fabricated using 3D and inkjet printing techniques. Finally, an integration of inkjet and 3D printing for the realization of efficient mm-wave 3D interconnects up to 60GHz is discussed.

Cu Pillar Low Temperature Bonding and Interconnection Technology of for 3D RF Microsystem

In this paper 3D interconnects technologies used Cu pillars are discussed with respect to RF microsystem. While 2.5D Si interposer and 3D packaging seem to rely to cu pillars for the coming years, RF microsystem used the heterogeneous chip such as GaAs integration with Si interposers should be at low temperature. The pillars were constituted by Cu (2 micron) -Ni (2 micron) -Cu (3 micron) -Sn (1 micron) multilayer metal and total height is 8 micron on the front-side of the wafer by using electroplating. The wafer backside Cu pillar is obtained by temporary bonding, thinning and silicon surface etching. The RF interposers are stacked by Cu-Sn eutectic bonding at 260 °C. Analyzed the reliability of different pillar bonding structure.

A Comprehensive Study of the Sintering of Copper Nanoparticles Using Femtosecond, Nanosecond, and Continuous Wave Lasers

A high electrical and thermal conductivity coupled with low costs make copper (Cu) an enticing alternative to aluminum for the fabrication of interconnects in packaging applications. To tap into the benefits of the ever-reducing size of transistors, it is required to increase the input/output pin count on electronic chips, and thus, minimize the size of chip to board interconnects. Laser sintering of Cu nanoparticle (NP) inks can serve as a promising process for developing these micron sized, 3D interconnect structures. However, the exact processing windows for Cu NP sintering are not well known. Therefore, this paper presents an extensive experimental investigation of the sintering processing window with different lasers including femtosecond (fs), nanosecond (ns), and continuous-wave (CW) lasers. The dependence of the processing window on Cu layer thicknesses and laser exposure durations has also been investigated. A simplified model to estimate optimum laser sintering windows for Cu NPs using pulsed lasers is presented and the predicted estimates are compared against the experimental results. Given the simplicity of the model, it is shown to provide good estimates for fluence required for the onset of sintering and the processing window for good sintering of Cu NPs.

Flip chip reliability and design rules for SIP module

Abstract The first part of this work is dedicated to the study of “system in package” (SiP) solutions based on different substrates, namely organic or silicon. Generally speaking a SIP is composed by several active and passive components stacked on an interposer. Benchmarks done by Safran have demonstrated that in terms of substrate, embedded die technology leads to several advantages compared to 3D TSV or TGV based packaging approaches. The benefits leaded by this substrate is the possibility to embed some Surface Mount Technologies, bare chips or integrated passives devices (IPD) banks directly above or below the stacked active components. This way, top and bottom surface of the substrate can be used to integrate several heterogeneous dies side by side while using low profile flip-chip assemblies on the C4 side. Finally, in this kind of 3D architecture, this embedded technology enable a gain of integration, without using costly TSV connections. Substrates of high quality allow a reduction of interconnection pitches leading to very aggressive integration. Secondly, a 3D stack with 3 levels of components, as described above, means to, at least, 2 or 3 REACH compliant sequential assembly processes, depending on the needs. In order to consider all the solutions for an optimized integration and a high reliability, this work focused on the study of a simple SIP, which includes the top die assembled by flip-chip. For the flip chip hybridization, copper-pillars technologies are studied in the case of both organic and silicon interposers. The aim of this study is to understand in depth both processes and to obtain information on the reliability aspect after thermal cycling stress of the flip chip assembly. Thirdly, we built many silicon test chips with different characteristics with a dedicated daisy chain test vehicle. The different parameters are: chips' thicknesses (50 to 200 μm), chips' sizes (2 to 8 mm), bump structures (diameter), and the pitches of the interconnection (from 50 to 250 μm) and the number of interconnection rows. Designs were chosen in order to fit real operational configurations. Moreover, these configurations are interesting to build a comprehensive model in order to understand the failure mechanisms. These chips are then stacked by flip-chip on the silicon and on the organic substrate. We are also designing the two configurations of substrates. Only the production of the organics part is outsourced. Fourth, with all these configurations we will be able to fit the thermo-cycling test results with thermos-mechanical simulations done by finite elements. 3D models will take into account the different geometries in order to understand and quantify the various key parameters. The analysis will mainly focus on 3D interconnections. Design rules based on the results will be derivate. The aim is to obtain dimensional criteria based on stress versus deformation responses. Information obtained will be exploited for designing the future functional SIP. Fifth, in order to assess the electrical behaviors of this 3D architecture, signal integrity aspect will be considered as well. As for the design, the migration from an existing 2D electrical design to a 3D architecture design will be studied keeping the signal transmission without any degradation. The ultimate aim of this work is to define mechanical and electrical design rules that can then be used in functional SiP modules.

Inkjet and 3D Printing Technology for Fundamental Millimeter-Wave Wireless Packaging

Abstract This paper outlines the design, processing, and implementation of inkjet and 3D printing technologies for the development of fully-printed, highly-integrated millimeter-wave (mm-wave) wireless packages. The materials, tools, and processes of each technology are outlined and justified for their respective purposes. Inkjet-printed 3D interconnects directly interfacing a packaging substrate with an IC die are presented using printed dielectric ramps and coplanar waveguide (CPW) transmission lines exhibiting low loss (0.6–0.8 dB/mm at 40 GHz). Stereolithography (SLA) 3D printing is presented for the encapsulation of IC dies, enabling the application-specific integration of on-package structures, including dielectric lenses and frequency selective surface (FSS)-based wireless filters. Finally, inkjet and 3D printing technology are combined to present sloped mm-wave interconnects through an encapsulation, or through-mold vias (TMVs), achieving a slope up to 65° and low loss (0.5–0.6 dB/mm at 60 GHz). The combination of these additive techniques is highlighted for the development of scalable, application-specific wireless packages.

Self-assembled three dimensional network designs for soft electronics

Low modulus, compliant systems of sensors, circuits and radios designed to intimately interface with the soft tissues of the human body are of growing interest, due to their emerging applications in continuous, clinical-quality health monitors and advanced, bioelectronic therapeutics. Although recent research establishes various materials and mechanics concepts for such technologies, all existing approaches involve simple, two-dimensional (2D) layouts in the constituent micro-components and interconnects. Here we introduce concepts in three-dimensional (3D) architectures that bypass important engineering constraints and performance limitations set by traditional, 2D designs. Specifically, open-mesh, 3D interconnect networks of helical microcoils formed by deterministic compressive buckling establish the basis for systems that can offer exceptional low modulus, elastic mechanics, in compact geometries, with active components and sophisticated levels of functionality. Coupled mechanical and electrical design approaches enable layout optimization, assembly processes and encapsulation schemes to yield 3D configurations that satisfy requirements in demanding, complex systems, such as wireless, skin-compatible electronic sensors.

A flexible and stackable 3D interconnect system using growth-engineered carbon nanotube scaffolds

One of the critical challenges for realizing flexible electronic systems for a wide range of applications is the development of materials for flexible and stackable interconnects. We propose and demonstrate a three-dimensional (3D) interconnect structure embedded in a polymeric substrate using metal-coated carbon nanotube (CNT) scaffolds. By using two different underlayer materials for the catalyst, one-step synthesis of a dual-height CNT interconnect scaffold was realized. The CNT scaffolds serve as flexible cores for both annular metal through-substrate-vias and for horizontal metal interconnect. The 3D-CNT network was fabricated on a silicon substrate, and once the scaffolds were covered by metal, they were embedded in a polymer serving as a flexible substrate after peel-off from the silicon substrate. The 3D-CNT interconnect network was exposed to mechanical bending and stretching tests while monitoring its electrical properties. Even after 300 cycles no significant increase of resistances was found. Electrically there is a trade-off between flexibility and conductivity due to the surface roughness of the scaffold. However, this is to some extent alleviated by the metalized sidewalls giving the horizontal wires a cross-sectional area larger than indicated by their footprint. For gold wires 200 nm thick, measurements indicated a resistivity of 18 μΩ cm, a value less than one order of magnitude larger than that of bulk gold, and a value that is expected to improve as technology improves. The mechanical properties of the metalized scaffolds were simulated using a finite element model. The potential scale-up capability of the proposed 3D-CNT network was demonstrated by the stacking of two such polymer-embedded interconnect systems.

Study of Seed-Layer Stability on Copper Electrolytic Bath

In microelectronic field, 3D interconnects are processed by copper electrodeposition using a copper seed-layer to ensure the electrical contact. A uniform and homogeneous seed-layer is necessary to guarantee full filling of structures without any defect. This research work is focused on the seed-layer stability in electrolytic copper bath and its dissolution rate, during the idle time just before the plating.

Incorporation of the Organic Additives during the Damascene or TSV Process: Influence of the Applied Waveform

In microelectronic field, 3D interconnects are processed by copper electrodeposition with the assistance of additives in order to promote a superfilling effect. The role of the different additives and the interaction between them and also with the copper ions are well described in the literature and by the CEAC model. However, few research works have been dedicated to the additives incorporation throughout the copper layer. Therefore, this study was focused on the additive trace detection by XPS and SIMS measurements and the impact of the applied waveform on the incorporation rate.

Fabrication of β-tricalcium phosphate composite ceramic sphere-based scaffolds with hierarchical pore structure for bone regeneration

sPolymer sphere-based scaffolds, which are prepared by bonding the adjacent spheres via sintering the randomly packed spheres, feature uniform pore structure, full three-dimensional (3D) interconnection, and considerable mechanical strength. However, bioceramic sphere-based scaffolds fabricated by this method have never been reported. Due to high melting temperature of bioceramic, only limited diffusion rate can be achieved when sintering the bioceramic spheres, which is far from enough to form robust bonding between spheres. In the present study, for the first time we fabricated 3D interconnected β-tricalcium phosphate ceramic sphere-based (PG/TCP) scaffolds by introducing phosphate-based glass (PG) as sintering additive and placing uniaxial pressure during the sintering process. The sintering mechanism of PG/TCP scaffolds was unveiled. The PG/TCP scaffolds had hierarchical pore structure, which was composed by interconnected macropores (>200 μm) among spheres, pores (20–120 μm) in the interior of spheres, and micropores (1–3 μm) among the grains. During the sintering process, partial PG reacted with β-TCP, forming β-Ca2P2O7; metal ions from PG substituted to Ca2+ sites of β-TCP. The mechanical properties (compressive strength 2.8–10.6 MPa; compressive modulus 190–620 MPa) and porosity (30%–50%) of scaffolds could be tailored by manipulating the sintering temperatures. The introduction of PG accelerated in vitro degradation of scaffolds, and the PG/TCP scaffolds showed good cytocompatibility. This work may offer a new strategy to prepare bioceramic scaffolds with satisfactory physicochemical properties for application in bone regeneration.

Incorporation of the Organic Additives during the Damascene or TSV Process: Influence of the Applied Waveform

The today increase demand for high-performance microelectronic products requires new reliable interconnection metallization for microelectronic packaging. Copper electroplating is a cost-effective technology, mainly adopted to manufacture interconnects in integrated semiconductor devices [1-3]. In copper 3D interconnections, Damascene or Through Silicon Via (TSV) technologies; numerous factors have an influence on the filling and microstructural results, as the copper bath composition, the applied current density and waveform, the plating cell hydrodynamics…, conditioning the final resistivity of the copper layer. These parameters must be more and more optimised to achieve the filling of a large challenging range via dimensions and very aggressive aspect–ratio. Nevertheless whatever the design of the vias, the substrate composition, the plating cell and other parameters, the free-defect filling of interconnections is obtained only by bottom-up mechanism, where the copper deposition is promoted by superfilling effect and limited on the top, thanks to the addition of two or three organic additives. Without organic additives, only conformal or sub-conformal platings can be grown, causing voids, defects, lack of adherence and poor compactness. The superfilling mechanisms, depending on the additive composition, their relative concentration and the competition between them, are well described and simulated by the curvature-enhanced acceleration accumulation (CEAC) mechanism [4]. Determined first from steady-state measurements, this model permit to predict the evolution of via filling by copper [5], with no information concerning additives incorporation or signature throughout this layer. Indeed, the use of additives introduces also impurities and additives breakdown products during the copper growing. These contaminating agents create defects during the crystallisation like vacancies or dilatation sites of dislocation and limit grain boundary motion and growth during the self-annealing of the copper layer. These phenomena are well deal in the works of Koh et al. [6], and Stangl et al. [7] and particularly well observed with the use of aged bathes. Strangl et al. [7] have demonstrated the incorporation differences between a regular plated copper film and a pulse plated. Favry et al. [5] have also investigated the organic adsorption and inclusion during the copper growing as a function of the additive concentrations or current density. By the combination of electrochemical measurements and SIMS analysis, they have proved an increase of organic inclusion during a regime modification in the plating process. In this present research work, the influence of the applied waveform on the organic additives incorporations is discussed. The work focuses on the organic trace analyses by complementary analysis methods: XPS and SIMS. Firstly, XPS for X-ray photoelectron spectroscopy is a surface (10 nm) sensitive quantitative technique. The resulting spectrum allows the determination of the elementary and chemical composition of the analysed material and the concentration of the different detected elements. The XPS sensitivity is around 0.1 at.%, allowing a chemical cartography of the sample surface composition just after the bath extraction, with the determination of additive adsorptions during an OCP time. Then thanks to an ionic abrasion during the acquisition, a depth analysis is possible, profiling the elements concentration in the bulk material and not only on the surface. Secondly, based on heavy ions bombardment, SIMS for secondary ion mass spectrometry allows a surface composition analysis by sputtering, collecting and mass analysing of ejected secondary ions. This destructive method enables the determination of the elemental, isotopic and molecular composition of a surface or a bulk. The SIMS sensitivity is around 10-4 and 1 at%, but the quantitative analyse is limited. After electrochemical considerations concerning the influence of applied current density waveforms, this research work presents a comparative study of organic incorporations by XPS and SIMS analyses for different copper layers, taking into account the applied waveforms and the bath composition. [1] M. Paunovic at al, Fundamental Considerations in Modern Electroplating 5th edition, edited by M. Schlesinger and M. Paunovic, Wiley edition (2010) [2] M. Datta, Electrochemical processing technologies and their impact in microelectronic packaging in Microelectronic Packaging, edited by M. Datta, T. Osaka and J.W. Schultze, CRC Press edition (2005) [3] J.W. Dini et al, Electrodeposition of copper in Modern Electroplating 5th edition, edited by M. Schlesinger and M. Paunovic, Wiley edition (2010) [4] P.M. Vereecken et al, IBM J. Res. & Dev., 49 1 (2005) [5] E. Favry et al, Electrochimica Acta 53 (2008) 7004-7011 [6] L.T. Koh et al, Microelectronics Journal 33 (2002) 229-234 [7] M. Stangl et al, Microelectronic Engineering 84 (2007) 54-59 Figure 1

3D printed conductive patterns based on laser irradiation

In recent years, there has been significant interest in simple and affordable technologies that produce 3D printed embedded electronics and interconnects, in order to increase the functionality of these structures. This study describes the development of 3D printing processes for conductive patterns using 3D printing of metal particle dispersed polymer. This fabrication method is based on 3D molded interconnect device (MID) technology with laser direct structuring. The pattern on 3D printed structure is selectively activated by laser ablation and acquires high conductivity after electroless plating. The method described can be used to directly print a variety of customized and fully‐functional product prototypes using a general ME (material extrusion)‐type polymer 3D‐printer based on laser irradiation.The schematic of the suggested manufacturing method. With proper laser processing, the surface of 3D printed substrate is selectively activated as a seed layer and acquires high conductivity after electroless plating.

The properties and structure of Ge[sbnd]Se[sbnd]Te glasses and thin films

Ge30Se70−xTex bulk glasses and thin films for x=0, 10 and 20 were prepared. The properties and structure were characterized by differential scanning calorimetry (DSC), Raman spectroscopy and also by 77Se and 125Te MAS NMR spectroscopy. The optical properties were also measured. The absence of crystalline phases was verified by XRD, while DSC indicated that the glasses were not phase separated. Although the glass transition temperature of both Ge30Se70 glass and thin film is the same, different ΔCp reveal a higher disorder of the thin film. Both the glass transition temperature and ΔCp of Te glasses as well as crystallization temperatures decrease when Te increases due to increasing GeTe2/2 instead of GeSe4/2 structural units thereby reducing 3D interconnection of the glassy network. Based on the 77Se MAS NMR results, the short-range order model was determined as a suitable structural model for Ge30Se70 glass. 77Se and 125Te MAS NMR confirmed that Ge in alloys with Te only reaches oxidation state +II in agreement with GeTe phase diagram and therefore no GeTe4/2 tetrahedra can be present in these glasses and/or films. Raman spectroscopy confirmed that the short-range order of glasses and films is basically the same. The refractive index of thin films increases with tellurium content. The optical band gap of the thin films strongly decreases from 2.02eV to 1.36eV with increasing Te content and simultaneously the increasing structural disorder and width of the band tails increase. Reduction of the oxidation state of germanium to GeII caused by a reaction with tellurium ultimately leads to a reduction in 3D connectivity of the non-crystalline matrix and the loss of the glass-forming ability of the GeSeTe system.

Novel Three-Dimensional Embedded FPGA Technology and Achitecture

In this paper we present a high density three-dimensional (3D) interconnect network implementation based on a modified Mesh-of-Trees (MoT) topology for an embedded FPGA architecture design targeted for high performance 3D integration. To obtain the optimal MoT-based interconnect structure, the routing architecture of the 2D MoT-based FPGA is modified to include long routing segments that span multiple switch blocks in every row and column. By adjusting the percentage of long wire and span, a 2.5D or 3D high density MoT-based embedded FPGAs can be designed. For the 3D multi-stacked MoT-based FPGAs, the 2D MoTbased FPGA is sliced into two or more equal sections by adjusting the length of the long wire span. The long wire segments are realized using 3D through silicon via (TSVs) and 2.5D interposer-based multi-FPGAs, we increase the number of cuts and apply appropriate optimization models to scale down the number of long wires and horizontal inter-FPGA interposer wires. Using our 2.5/3D CAD models, we demonstrate the speed and area of 3D MoT-based FPGA architecture improved by 54% and 41% respectively in comparison to 3D Mesh-based FPGAs.

Easily Separated a Novel rGO‐MMT Three‐Dimensional Aerogel with Good Adsorption and Recyclable Property

AbstractA novel reduced graphene oxide‐montmorillonite three‐dimensional composite aerogel (rGO‐MMT aerogel) was synthesized successfully. The rGO‐MMT aerogel with good adsorption and recyclable property due to special 3D interconnection porous structure and good mechanical strength. The preparation process was carried out in aqueous solution under atmosphere pressure without any toxic agents or special instruments, which is a facile, green, and low‐cost method. The aerogel was characterized by X‐ray diffraction (XRD), Fourier transform infrared spectroscopy (FT‐IR), Transmission electron microscopy (TEM), Brunner‐Emmet‐Teller (BET) and X‐ray photoelectron spectroscopy (XPS). The adsorptive capacity and recycling of the aerogel were studied, including remove organic dyes (such as Methyl orange and Methylene blue) from wastewater and cycled five runs. The adsorption equilibrium data, adsorption process, and thermodynamic parameters were investigated. Moreover, the rGO‐MMT aerogel absorbent could be easily and directly separated with tweezers. The rGO‐MMT aerogel may find important environmental applications.

Analysis of Microstructure of the Cardiac Conduction System Based on Three-Dimensional Confocal Microscopy.

The specialised conducting tissues present in the ventricles are responsible for the fast distribution of the electrical impulse from the atrio-ventricular node to regions in the subendocardial myocardium. Characterisation of anatomical features of the specialised conducting tissues in the ventricles is highly challenging, in particular its most distal section, which is connected to the working myocardium via Purkinje-myocardial junctions. The goal of this work is to characterise the architecture of the distal section of the Purkinje network by differentiating Purkinje cells from surrounding tissue, performing a segmentation of Purkinje fibres at cellular scale, and mathematically describing its morphology and interconnections. Purkinje cells from rabbit hearts were visualised by confocal microscopy using wheat germ agglutinin labelling. A total of 16 3D stacks including labeled Purkinje cells were collected, and semi-automatically segmented. State-of-the-art graph metrics were applied to estimate regional and global features of the Purkinje network complexity. Two types of cell types, tubular and star-like, were characterised from 3D segmentations. The analysis of 3D imaging data confirms the previously suggested presence of two types of Purkinje-myocardium connections, a 2D interconnection sheet and a funnel one, in which the narrow side of a Purkinje fibre connect progressively to muscle fibres. The complex network analysis of interconnected Purkinje cells showed no small-world connectivity or assortativity properties. These results might help building more realistic computational PK systems at high resolution levels including different cell configurations and shapes. Better knowledge on the organisation of the network might help in understanding the effects that several treatments such as radio-frequency ablation might have when the PK system is disrupted locally.

Correlation of Through-silicon Via (TSV) Dimension Scaling to TSV Stress and Reliability for 3D Interconnects

Abstract Through-silicon vias (TSVs) are a crucial technology for enabling full three dimensional integration, yet they pose unique reliability risks, including thermal stress buildup due to the mismatch in the coefficient of thermal expansion between the silicon and the copper and the via extrusion phenomena. These effects can degrade device performance and it has been proposed that smaller TSV dimensions will reduce these reliability risks. In this paper, the correlation of shrinking dimensions to TSV stress and reliability is investigated, focusing on the effect of the microstructure on the plasticity and extrusion for 10, 5, and 2 μm diameter copper vias. Synchrotron x-ray microdiffraction revealed local plasticity concentrated in the tops of the vias of all diameters, and showed that the TSV stress behavior seemed to depend on the variations in the grain structure. Electron backscatter diffraction quantified the microstructure to show a tight distribution of grain sizes after the post-plating anneal, but further annealing to 400°C causes considerable data scatter for vias of all diameters. This result is consistent with the observed via extrusion statistics, in which the absolute values and variations in the extrusion heights increased significantly with further annealing. The wafer curvature technique is also used to observe the TSV stress relaxation behavior. Overall, these results suggest that scaling down TSV dimensions may not improve the stress and reliability behavior, particularly after further annealing at 400°C. Since such annealing processes are required for via-middle fabrication, it seems that via reliability will continue to be a challenge as TSV scaling continues.