Warpage Reduction on a Typical Fan-out Wafer Level Process by an Encircling Silicon Ring

Abstract

Due to temperature variation during the manufacturing process, and CTE (coefficient of thermal expansion) mismatch from different structure materials, thermal warpages were created on each fabrication step of a Fan-Out Wafer Level Packaging (FOWLP) process. In this study, a silicon ring encircles the dies above the temporary glass carrier was proposed for a typical FOWLP process. With the new ring, structure strength was increased during the manufacturing process so that the warpages were reduced. To verify process warpage reductions, finite element simulations were first performed through a commercialize software (ANSYS) for different structures designs, and effective material property equations for the redistribution layer (RDL) were employed to simplify the simulated structure. Taguchi method was next used to identify the optimal factorial combinations on design parameters. After obtaining warpages data in each of the FOWLP process step, the maximum warpage were found after glass carrier de-bonding. With the ring, warpage reductions were obtained in each of the manufacturing step, and maximum 86% of reduction was observed through Taguchi analyses for the warpage after glass de-bonding process. Since the ring was bonded to the glass carrier simultaneously with die bonding process, no additional process step is needed for the new methodology. Consequently, merit of the new encircling silicon ring has been verified.