Very high-speed and high-accuracy current-steering CMOS D/A converter using a novel 3-D decoder

Abstract

In this paper a 10-bit 1.2-GSample/s Nyquist current-steering CMOS digital-to-analog converter (DAC) is presented. Segmentation (90%) has been used to get the best DNL and reduce glitch energy. This segmentation ratio guarantees the monotonicity. Higher performance is achieved using a novel 3-D thermometer decoding method which reduces the area, power consumption, and the number of control signals of the digital section. Simulation results show that the spurious-free-dynamic-range (SFDR) in Nyquist rate is better than 65 dB for sampling frequency up to 1.2-GSample/s. The analog voltage supply is 3.3 V while the digital part of the chip operates at only 2.4 V. Total power consumption in Nyquist rate measurement is 149 mW. The chip has been processed in a standard 0.35 μm CMOS technology. Active area of chip is 1.97 mm2.