Using M-Series with Adaptive Patterning to shrink PCB systems into System-In-Packages

Abstract

Traditional system-level design typically includes several Integrated Circuits (IC’s) that get individually packaged and implemented onto a Printed Circuit Board (PCB). This PCB includes the required support circuitry for the IC’s to complete the full system design. This architecture creates a system that is far larger and more power intensive than a single package. It also suffers from greater bandwidth and signal integrity limitations. To counter these shortcomings, many companies are migrating away from PCB to System-in-Package (SiP) designs. In a SiP design, these chips are integrated into a single package along with all the supporting passive devices. The die of the package may be configured through vertical stacking or lateral interconnects to improve design density. For semiconductor companies that design both the IC’s and the system-level PCB, there is an emerging trend in which the existing PCB designs are reused and re-purposed to generate a new SiP design. This allows for companies to leverage known-good design data to create a smaller form factor, higher density package, while requiring fewer engineering design hours. While the prominent solution for SiP designs has been laminate substrates, as the demand for further density scaling and heterogeneous integration grows, advanced packaging technologies are being leveraged. Using a fan-out RDL based solution can accommodate increased interconnect density and reduced layer count as compared to a laminate substrate. Deca’s Adaptive Patterning® technology ensures companies are able to manufacture fan-out wafer-level packages (FOWLP) with the highest possible yield. This paper details the benefits of migrating from PCB to package level integration as well as how utilizing Adaptive Patterning® technology further benefits this migration with increased density and performance as compared to traditional packaging technology