Abstract

A novel resistive memory with the TiN/Ti/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /TiN stack is proposed and fully integrated with 0.18 μm CMOS technology. The excellent memory performances such as low operation current (down to 25 μA), low operation voltage (<;1.5 V), high ON/OFF resistance ratio (above 100), and fast switching speed (10 ns) have been demonstrated for this ReRAM. Moreover, the device exhibits excellent scalability (scaling down to 50 nm), high switching endurance (>100 M cycles), and reliable data retention (10 years extrapolation at 220°C), good read disturb performance, and excellent program (PGM)/erase(ERS) disturb immunity. A 1 Kb array with robust characteristics was also fabricated successfully. The endurance for all devices can exceed 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> cycles by a pulse width of 40 ns. New verification methods, which give tight distribution for high resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">HIGH</sub> ) and low resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LOW</sub> ), are proposed to ensure a good operation window. The future challenges for the ReRAM, such as the issue of resistance fluctuation, the lack of a comprehensive resistance switching mechanism, and the need to develop a bi-directional diode for 3D stacked application, are discussed.

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