Abstract

A novel HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based resistive memory with the TiN electrodes is proposed and fully integrated with 0.18 mum CMOS technology. By using a thin Ti layer as the reactive buffer layer into the anodic side of capacitor-like memory cell, excellent memory performances, such as low operation current (down to 25 muA), high on/off resistance ratio (above 1,000), fast switching speed (5 ns), satisfactory switching endurance (>10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> cycles), and reliable data retention (10 years extrapolation at 200degC) have been demonstrated in our memory device. Moreover, the benefits of high yield, robust memory performance at high temperature (200degC), excellent scalability, and multi-level operation promise its application in the next generation nonvolatile memory.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.