Abstract
A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal current bipolar transistor (HCBT) was simulated assuming the 1 /spl mu/m technology. The surface of the device is at least one order of magnitude smaller than conventional SST devices with the same emitter area. The same doping profile as in known vertical current devices is achieved by simpler technology using single polysilicon layer, without conventional epitaxial and n/sup +/ buried layers and with reduced number of lithography masks and technological steps. The electrical analysis of HCBT results in maximum small signal current gain of 158, and maximum cutoff frequency of 16 GHz at U/sub CE/=3 V.
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