Abstract
Dynamic reconfigurable field-programmable logic arrays (FPGAs) are receiving notable attention because of their much shorter reconfiguration time as compared with traditional FPGAs. The short reconfiguration time is vital to applications such as reconfigurable computing and emulation. We show in this paper that testing and diagnosis of the FPGA also can take advantage of its dynamic reconfigurability. We first propose an efficient methodology for testing the interconnects of the FPGA, then present several universal test and diagnosis approaches which cover all functional units of the FPGA. Experimental results show that our approach significantly reduces the testing time, without additional cost for diagnosis.
Highlights
With the advent of deep-submicron VLSI technology, system-on-a-chip is no longer a dream
In this paper we focus on testing and diagnosis of dynamic reconfigurable field-programmable logic arrays (FPGAs)
FPGA has been widely used in hardware prototyping and emulation, and considered the key hardware component in custom and reconfigurable computing
Summary
With the advent of deep-submicron VLSI technology, system-on-a-chip is no longer a dream. To speed up the universal testing process, we must reduce the total number of TCs while still able to cover all target faults in the programmable resources of the FPGA, i.e., function units and interconnects. The reported works in FPGA testing are all for boot-up configurable FPGAs, including testing and diagnosis for LUTs [3,4,5], interconnect testing [6,7,8,9], array approaches for testing CLBs in FPGA [10,11,12], and BIST-based approaches [13 15] These approaches can be applied to dynamic reconfigurable FPGAs if their architectures are similar, especially for interconnect testing. Approaches for testing LUTs or CLBs in RAM-based FPGAs are not suitable for dynamic reconfigurable FPGAs because the architectures of their function units are different. We propose universal test and diagnosis approaches for dynamic reconfigurable FPGAs. Our approaches significantly reduce the testing time, and concurrently provide diagnosis capability for faulty function units
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