Suppression of reverse drain induced barrier lowering in negative capacitance FDSOI field effect transistor using oxide charge trapping layer

Abstract

In this paper, we investigate the suppression of reverse drain induced barrier lowering (RDIBL) in negative capacitance field effect transistors (NCFETs) with a multi-domain ferroelectric layer (FE) on a fully depleted silicon-on-insulator. We identify the challenges derived from the polarization variation along the channel. Through computer-aided design simulations, the transfer characteristics of the NCFET are analyzed at various drain voltages (V DS). It is found that the threshold voltage is positive-shifted by the increased V DS (RDIBL) and the RDIBL degrades the subthreshold swing (SS) and on-current. Based on the energy band analysis at various V DSs, it is revealed that the local drain-side energy band rising by the V DS–induced polarization variation along the channel causes the RDIBL. To suppress the RDIBL, an NCFET with an oxide trapping layer between the FE and the SiO2 inter-layer is proposed. In the proposed NCFET, electrons are injected into the drain-side trapping layer by hot carrier injection and the trapped electrons compensate the V DS effects on the FE at the drain side. As a result, uniform polarization is obtained along the channel and the SS/on-current degradation caused by the RDIBL is improved.