Submicrometer self-aligned recessed gate InGaAs MISFET exhibiting very high transconductance

Abstract

A new submicrometer InGaAs depletion-mode MISFET with a self-aligned recessed gate structure is presented. The techniques used to implement this FET structure are angle evaporation for submicrometer pattern definition and sputter etching/wet chemical etching for channel recess. Highest transconductance observed was in excess of 250 mS/mm, with 200 mS/mm as a more typical value. The very high transconductance is attributed partly to the low source series resistance achieved in this structure, typically 0.5 Ω.mm or less. From the IV characteristics of these FET's, a saturation velocity equal to 2.4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> cm/s at the drain end was deduced.