Abstract

The advances in wireless technology have made the transfer or sharing of information simple and efficient thereby maximizing its impact to society around the globe. Due to these advances more memory space is required to store such a large transfer of information. This can only be done by reducing the device size which means scaling of MOS transistor to deep submicron levels. The most important part of wireless technology is the wireless trans-receiver. Its role is to transmit or receive the information to (or from) the wireless device. In the wireless trans-receiver, the frequency synthesizer is responsible for generating a stable output frequency which is used further to mix the received signal down to lower frequencies and vice-versa. This stable output frequency is generated by using Phase Locked Loop (PLL). While working at high frequency at the range of 12GHz to 40 GHz, where the operation is carried out at a very high speed and the coverage is done with the multiple beams, the circuits used at high frequency should be compatible with high speed. So, in this paper one very basic component which is the heart of communication system i.e., VCO is studied and the design parameters has been listed in this paper.

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