Abstract

In this work, a study of the impact of compressive vertical mechanical stress, imposed using a nanoindenter, is achieved for both a silicon bipolar junction transistor (BJT) and an n-well diffusion resistance. The stress induced changes of I-V characteristics are observed for these devices. Based on the linear regression of the stress impact, compact models of the BJT and diffusion resistor which include the stress sensitivity are implemented in verilog-A. These models are employed for the simulation of a bandgap reference circuit in Cadence. A significant output voltage shift due to stress is observed.

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