Abstract
This paper presents measurements performed on charge-coupled device (CCD) structures manufactured on a deep micrometer CMOS imaging technology, in surface channel CCD and in buried channel CCD mode. The charge transfer inefficiency is evaluated for both CCD modes with regard to the injected charge, and the influence of the rising and falling time effect is explored. Controlling the ramp and especially reducing its abruptness allows to get much lower charge transfer inefficiency in buried CCD mode. On the contrary, we did not observe any effect of the ramp on surface channel CCD mode because of the presence of interface traps at the silicon-oxide interface.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
