Abstract

Rigorous technology scaling of integrated circuits to nanometer range aids to acquire prodigious operational speed and versatile functionality in system-on-chip. However, this leads to escalation in interconnect parasitics and non-ideal issues that have become primary bottleneck in the existing copper based on-chip interconnect system. Graphene based carbon nanotube bundle has emerged as prospective interconnect for high speed applications. This paper focuses on bundled carbon nanotubes and their different spatial arrangements viz. single wall CNTs (SWCNTs), multiwall CNTs (MWCNTs) and mixed CNT bundles (MCBs). Such bundle configurations boost the performance of system in terms of reducing system latency and power consumption in addition providing system reliability. The significant novel contribution of this paper lies in executing eye-diagram analysis of the futuristic bundled CNT structures as interconnects. Eye-diagram is an important tool for analysing signal integrity effects. The several performance analyses have been performed in SPICE and ADS EDA tools at 22 nm technology node.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call